diff --git a/source/platform/stm32f0/Makefile b/source/platform/stm32f0/Makefile
index f7c22f9..0d2e774 100644
--- a/source/platform/stm32f0/Makefile
+++ b/source/platform/stm32f0/Makefile
@@ -1,6 +1,7 @@
 obj-y += source/platform/spi_flash.o
 obj-y += source/platform/usart.o
 
+obj-y += source/platform/stm32f0/alarm.o
 obj-y += source/platform/stm32f0/gpio.o
 obj-y += source/platform/stm32f0/rcc.o
 obj-y += source/platform/stm32f0/rtc.o
diff --git a/source/platform/stm32f0/alarm.c b/source/platform/stm32f0/alarm.c
new file mode 100644
index 0000000..9c2f62b
--- /dev/null
+++ b/source/platform/stm32f0/alarm.c
@@ -0,0 +1,78 @@
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/stm32/exti.h>
+#include <libopencm3/stm32/rtc.h>
+
+static inline uint32_t rtc_to_sec(uint32_t rtc)
+{
+	uint32_t sec;
+
+	sec = (rtc & 0xf) + ((rtc >> 4) & 0xf) * 10;
+	sec += (((rtc >> 8) & 0xf) + ((rtc >> 12) & 0xf) * 10) * 60;
+	sec += (((rtc >> 16) & 0xf) + ((rtc >> 20) & 0xf) * 10) * 3600;
+
+	return sec;
+}
+
+static inline uint32_t sec_to_rtc(uint32_t sec)
+{
+	uint32_t rtc;
+	uint32_t hour, min;
+
+	hour = sec / 3600;
+	min = (sec % 3600) / 60;
+	sec = sec % 60;
+
+	rtc = ((hour / 10) << 20) | ((hour % 10) << 16);
+	rtc |= ((min / 10) << 12) | ((min % 10) << 8);
+	rtc |= ((sec / 10) << 4) | (sec % 10);
+
+	return rtc;
+}
+
+void rtc_alarm_isr(void)
+{
+	uint32_t alarm_sec;
+
+	exti_reset_request(EXTI17);
+
+	rtc_unlock();
+
+	/* Disable the alarm. */
+	RTC_CR &= ~RTC_CR_ALRAE;
+	while (!(RTC_ISR & RTC_ISR_ALRAWF));
+	RTC_ISR &= ~RTC_ISR_ALRAF;
+
+	/* Set the alarm time. */
+	alarm_sec = rtc_to_sec(RTC_TR) + 10;
+	RTC_ALRMAR = sec_to_rtc(alarm_sec);
+	RTC_ALRMAR |= 0xc0000000;
+
+	/* Enable the alarm. */
+	EXTI_IMR |= EXTI17;
+	exti_set_trigger(EXTI17, EXTI_TRIGGER_RISING);
+	RTC_CR |= RTC_CR_ALRAE;
+
+	rtc_lock();
+}
+
+int alarm_init(void)
+{
+	uint32_t alarm_sec;
+
+	rtc_unlock();
+
+	/* Set the alarm time. */
+	alarm_sec = rtc_to_sec(RTC_TR) + 10;
+	RTC_ALRMAR = sec_to_rtc(alarm_sec);
+	RTC_ALRMAR |= 0xc0000000;
+
+	RTC_CR |= RTC_CR_ALRAIE | RTC_CR_BYPSHAD;
+
+	nvic_enable_irq(NVIC_RTC_IRQ);
+	EXTI_IMR |= EXTI17;
+	exti_set_trigger(EXTI17, EXTI_TRIGGER_RISING);
+
+	rtc_lock();
+
+	return 0;
+}
diff --git a/source/platform/stm32f1/Makefile b/source/platform/stm32f1/Makefile
index febfc27..820f4a0 100644
--- a/source/platform/stm32f1/Makefile
+++ b/source/platform/stm32f1/Makefile
@@ -1,6 +1,7 @@
 obj-y += source/platform/spi_flash.o
 obj-y += source/platform/usart.o
 
+obj-y += source/platform/stm32f1/alarm.o
 obj-y += source/platform/stm32f1/gpio.o
 obj-y += source/platform/stm32f1/rcc.o
 obj-y += source/platform/stm32f1/rtc.o
diff --git a/source/platform/stm32f1/alarm.c b/source/platform/stm32f1/alarm.c
new file mode 100644
index 0000000..bc76bd7
--- /dev/null
+++ b/source/platform/stm32f1/alarm.c
@@ -0,0 +1,29 @@
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/stm32/exti.h>
+#include <libopencm3/stm32/rtc.h>
+
+void rtc_alarm_isr(void)
+{
+	exti_reset_request(EXTI17);
+
+	if (rtc_check_flag(RTC_ALR)) {
+		rtc_clear_flag(RTC_ALR);
+
+		rtc_set_alarm_time(rtc_get_counter_val() + 10);
+
+		EXTI_IMR |= EXTI17;
+		exti_set_trigger(EXTI17, EXTI_TRIGGER_RISING);
+	}
+}
+
+int alarm_init(void)
+{
+	rtc_enable_alarm();
+	rtc_set_alarm_time(rtc_get_counter_val() + 10);
+
+	nvic_enable_irq(NVIC_RTC_ALARM_IRQ);
+	EXTI_IMR |= EXTI17;
+	exti_set_trigger(EXTI17, EXTI_TRIGGER_RISING);
+
+	return 0;
+}