upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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18 lines
786 B
18 lines
786 B
14 years ago
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U-Boot for Freescale i.MX5x
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This file contains information for the port of U-Boot to the Freescale
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i.MX5x SoCs.
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1. CONFIGURATION OPTIONS/SETTINGS
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---------------------------------
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1.1 CONFIG_MX51_PLL_ERRATA: Workaround for i.MX51 PLL errata.
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This option should be enabled by all boards using the i.MX51 silicon
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version up until (including) 3.0 running at 800MHz.
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The PLL's in the i.MX51 processor can go out of lock due to a metastable
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condition in an analog flip-flop when used at high frequencies.
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This workaround implements an undocumented feature in the PLL (dither
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mode), which causes the effect of this failure to be much lower (in terms
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of frequency deviation), avoiding system failure, or at least decreasing
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the likelihood of system failure.
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