upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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94 lines
2.8 KiB
94 lines
2.8 KiB
21 years ago
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/*
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* (C) Copyright 2004
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* Pierre AUBERT, Staubli Faverges, <p.aubert@staubli.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Init is derived from Linux code.
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*/
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#include <common.h>
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#ifdef CFG_CMD_IDE
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#include <mpc5xxx.h>
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#define CALC_TIMING(t) (t + period - 1) / period
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#define GPIO_PSC1_4 0x01000000ul
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int ide_preinit (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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long period, t0, t1, t2_8, t2_16, t4, ta;
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vu_long reg;
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struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA;
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reg = *(vu_long *) MPC5XXX_GPS_PORT_CONFIG;
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reg = (reg & ~0x03000000ul) | 0x01000000ul;
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*(vu_long *) MPC5XXX_GPS_PORT_CONFIG = reg;
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/* All sample codes do that... */
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*(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0;
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/* Configure and reset host */
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*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY |
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MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
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udelay (10);
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*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY;
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/* Disable prefetch on Commbus */
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psdma->PtdCntrl |= 1;
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/* Init timings : we use PIO mode 0 timings */
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period = 1000000000 / gd->ipb_clk; /* period in ns */
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t0 = CALC_TIMING (600);
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t2_8 = CALC_TIMING (290);
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t2_16 = CALC_TIMING (165);
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reg = (t0 << 24) | (t2_8 << 16) | (t2_16 << 8);
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*(vu_long *) MPC5XXX_ATA_PIO1 = reg;
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t4 = CALC_TIMING (30);
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t1 = CALC_TIMING (70);
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ta = CALC_TIMING (35);
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reg = (t4 << 24) | (t1 << 16) | (ta << 8);
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*(vu_long *) MPC5XXX_ATA_PIO2 = reg;
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#if defined (CONFIG_ICECUBE) && defined (CONFIG_IDE_RESET)
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/* Configure PSC1_4 as GPIO output for ATA reset */
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*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
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*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
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*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
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#endif /* defined (CONFIG_ICECUBE) && defined (CONFIG_IDE_RESET) */
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return (0);
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}
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#if defined (CONFIG_ICECUBE) && defined (CONFIG_IDE_RESET)
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void ide_set_reset (int idereset)
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{
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if (idereset) {
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*(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
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} else {
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*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
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}
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}
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#endif /* defined (CONFIG_ICECUBE) && defined (CONFIG_IDE_RESET) */
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#endif /* CFG_CMD_IDE */
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