upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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59 lines
1.5 KiB
59 lines
1.5 KiB
8 years ago
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Overview
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--------
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The LS1021A-IOT is a Freescale reference board that hosts
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the LS1021A SoC.
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LS1021AIOT board Overview
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-------------------------
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- DDR Controller
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- Supports 1GB un-buffered DDR3L SDRAM discrete
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devices(32-bit bus) with 4 bit ECC
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- DDR power supplies 1.35V to all devices with
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automatic tracking of VTT
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- Soldered DDR chip
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- Supprot one fixed speed
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- Ethernet
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- Two on-board SGMII 10/100/1G ethernet ports
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- One Gbit Etherent RGMII interface to 4-ports switch
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with 4x 10/100/1000 RJ145 ports
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- CPLD
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- 8-bit registers in CPLD for system configuration
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- connected to IFC_AD[0:7]
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- Power Supplies
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- 12V@5A DC
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- SDHC
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- SDHC port connects directly to a full 8-bit SD/MMC slot
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- Support for SDIO devices
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- USB
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- Two on-board USB 3.0
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- One on-board USB k22
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- PCIe
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- Two MiniPCIe Solts
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- SATA
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- Support SATA Connector
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- AUDIO
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- AUDIO in and out
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- I/O Expansion
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- Arduino Shield Connector
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- Port0 - CAN/GPIO/Flextimer
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- Port1 - GPIO/CPLD Expansion
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- Port2 - SPI/I2C/UART
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Memory map
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-----------
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The addresses in brackets are physical addresses.
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Start Address End Address Description Size
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0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB
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0x00_4000_0000 0x00_43FF_FFFF QSPI(Chip select 0) 64MB
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0x00_4400_0000 0x00_47FF_FFFF QSPI(Chip select 1) 64MB
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0x00_6000_0000 0x00_6000_FFFF CPLD 64K
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0x00_8000_0000 0x00_BFFF_FFFF DDR 1GB
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Boot description
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-----------------
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LS1021A-IOT support two ways of boot:
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Qspi boot and SD boot
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The board doesn't support boot from another
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source without changing any switch/jumper.
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