upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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74 lines
2.2 KiB
74 lines
2.2 KiB
17 years ago
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/*
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*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <spi.h>
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#if defined(CONFIG_CF_DSPI)
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#include <asm/immap.h>
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void dspi_init(void)
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{
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volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
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volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
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gpio->par_dspi = GPIO_PAR_DSPI_PCS5_PCS5 | GPIO_PAR_DSPI_PCS2_PCS2 |
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GPIO_PAR_DSPI_PCS1_PCS1 | GPIO_PAR_DSPI_PCS0_PCS0 |
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GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
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GPIO_PAR_DSPI_SCK_SCK;
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dspi->dmcr = DSPI_DMCR_MSTR | DSPI_DMCR_CSIS7 | DSPI_DMCR_CSIS6 |
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DSPI_DMCR_CSIS5 | DSPI_DMCR_CSIS4 | DSPI_DMCR_CSIS3 |
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DSPI_DMCR_CSIS2 | DSPI_DMCR_CSIS1 | DSPI_DMCR_CSIS0 |
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DSPI_DMCR_CRXF | DSPI_DMCR_CTXF;
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dspi->dctar0 = DSPI_DCTAR_TRSZ(7) | DSPI_DCTAR_CPOL | DSPI_DCTAR_CPHA |
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DSPI_DCTAR_PCSSCK_1CLK | DSPI_DCTAR_PASC(0) |
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DSPI_DCTAR_PDT(0) | DSPI_DCTAR_CSSCK(0) |
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DSPI_DCTAR_ASC(0) | DSPI_DCTAR_PBR(0) |
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DSPI_DCTAR_DT(1) | DSPI_DCTAR_BR(1);
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}
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void dspi_tx(int chipsel, u8 attrib, u16 data)
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{
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volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
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while ((dspi->dsr & 0x0000F000) >= 4) ;
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dspi->dtfr = (attrib << 24) | ((1 << chipsel) << 16) | data;
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}
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u16 dspi_rx(void)
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{
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volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
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while ((dspi->dsr & 0x000000F0) == 0) ;
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return (dspi->drfr & 0xFFFF);
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}
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#endif /* CONFIG_HARD_SPI */
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