upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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95 lines
2.1 KiB
95 lines
2.1 KiB
22 years ago
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/*
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* Memory Setup stuff - taken from blob memsetup.S
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*
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* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
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* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <version.h>
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/* some parameters for the board */
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MEM_BASE: .long 0xa0000000
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MEM_START: .long 0xc0000000
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#define MDCNFG 0x00
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#define MDCAS0 0x04
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#define MDCAS1 0x08
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#define MDCAS2 0x0c
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#define MSC0 0x10
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#define MSC1 0x14
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#define MECR 0x18
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mdcas0: .long 0xc71c703f
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mdcas1: .long 0xffc71c71
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mdcas2: .long 0xffffffff
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/* mdcnfg: .long 0x0bb2bcbf */
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mdcnfg: .long 0x0334b22f @ alt
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/* mcs0: .long 0xfff8fff8 */
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msc0: .long 0xad8c4888 @ alt
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mecr: .long 0x00060006
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/* mecr: .long 0x994a994a @ alt */
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/* setting up the memory */
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.globl memsetup
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memsetup:
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ldr r0, MEM_BASE
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/* Setup the flash memory */
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ldr r1, msc0
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str r1, [r0, #MSC0]
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/* Set up the DRAM */
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/* MDCAS0 */
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ldr r1, mdcas0
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str r1, [r0, #MDCAS0]
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/* MDCAS1 */
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ldr r1, mdcas1
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str r1, [r0, #MDCAS1]
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/* MDCAS2 */
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ldr r1, mdcas2
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str r1, [r0, #MDCAS2]
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/* MDCNFG */
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ldr r1, mdcnfg
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str r1, [r0, #MDCNFG]
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/* Set up PCMCIA space */
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ldr r1, mecr
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str r1, [r0, #MECR]
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/* Load something to activate bank */
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ldr r1, MEM_START
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.rept 8
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ldr r0, [r1]
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.endr
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/* everything is fine now */
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mov pc, lr
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