upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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70 lines
2.9 KiB
70 lines
2.9 KiB
24 years ago
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CPU module revisions
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My cpu module has the model number "CMA286-60-990526-01". My motherboard
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has the model number "CMA102-32M-990526-01". These are both fairly old,
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and may not reflect current design. In particular, I can see from the
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Cogent web site that the CMA286 has been significantly redesigned - it
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now has on board RAM (4M), ethernet 10baseT PHY (on SCC2), 2 serial ports
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(SMC1 and SMC2), and 48pin DIN for the FEC (if present i.e. MPC860T), and
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also the EPROM is 512K.
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My CMA286-60 has none of this, and only 128K EPROM. In addition, the CPU
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clock is listed as 66MHz, whereas mine is 33.333MHz.
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Clocks
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Quote from my "CMA286 MPC860/821 User's Manual":
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"When setting up the Periodic Interrupt Timer (PIT), be aware that the
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CMA286 places the MPC860/821 in PLL X1 Mode. This means that we feed
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a 25MHz clock directly into the MPC860/821. This mode sets the divisor
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for the PIT to be 512. In addition, the Time Base Register (TMB)
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divisor is set to 16."
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I interpreted this information to mean that EXTCLK is 25MHz and that at
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power on reset, MODCK1=1 and MODCK2=0, which selects EXTCLK as the
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source for OSCCLK and PITRTCLK, sets RTDIV to 512 and sets MF (the
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multiplication factor) to 1 (I assume this is what they mean by X1
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mode above). MF=1 means the cpus internal clock runs at the same
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rate as EXTCLK i.e. 25MHz.
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Furthermore, since SCCR[TBS] (the Time Base Source selector bit in the
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System Clock and Reset Control register) is set in the cpu initialisation
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code, the TMBCLK source is forced to be GCLK2 and the TMBCLK prescale is
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forced to be 16. This results in TMBCLK=1562500.
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One problem - since PITRTCLK source is EXTCLK (25Mhz) and RTDIV is 512,
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PITRTCLK will be 48828.125 (huh?). Another quote from the MPC860 Users
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Manual:
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"When used by the real-time clock (RTC), the PITRTCLK source is first
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divided as determined by RTDIV, and then divided in the RTC circuits by
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either 8192 or 9600. Therefore, in order for the RTC to count in
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seconds, the clock source must satisfy:
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(EXTCLK or OSCM) / [(4 or 512) x (8192 or 9600)] = 1
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The RTC will operate with other frequencies, but it will not count in
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units of seconds."
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Therefore, the internal RTC of the MPC860 is not going to count in
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seconds, so we must use the motherboard RTC (if we need a RTC).
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I presume this means that they do not provide a fixed oscillator for
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OSCM. The code in get_gclk_freq() assumes PITRTCLK source is OSCM,
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RTDIV is 4, and that OSCM/4 is 8192 (i.e. a ~32KHz oscillator). Since
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the CMA286-60 doesn't have this (at least mine doesn't) we can't use
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the code in get_gclk_freq().
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Finally, it appears that the internal clock in my CMA286-60 is actually
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33.333MHz. Which makes TMBCLK=2083312.5 (another huh?) and
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PITRTCLK=65103.515625 (bloody hell!).
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If anyone finds anything wrong with the stuff above, I would appreciate
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an email about it.
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Murray Jensen <Murray.Jensen@cmst.csiro.au>
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21-Aug-00
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