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/*
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* (C) Copyright 2012 SAMSUNG Electronics
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* SAMSUNG EXYNOS5250 SoC device tree source
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/include/ "exynos5.dtsi"
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/ {
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i2c@12ca0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CA0000 0x100>;
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interrupts = <0 60 0>;
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};
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i2c@12cb0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CB0000 0x100>;
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interrupts = <0 61 0>;
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};
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i2c@12cc0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CC0000 0x100>;
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interrupts = <0 62 0>;
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};
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i2c@12cd0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CD0000 0x100>;
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interrupts = <0 63 0>;
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};
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sound@3830000 {
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compatible = "samsung,exynos-sound";
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reg = <0x3830000 0x50>;
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samsung,i2s-epll-clock-frequency = <192000000>;
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samsung,i2s-sampling-rate = <48000>;
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samsung,i2s-bits-per-sample = <16>;
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samsung,i2s-channels = <2>;
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samsung,i2s-lr-clk-framesize = <256>;
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samsung,i2s-bit-clk-framesize = <32>;
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samsung,i2s-id = <0>;
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};
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sound@12d60000 {
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compatible = "samsung,exynos-sound";
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reg = <0x12d60000 0x20>;
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samsung,i2s-epll-clock-frequency = <192000000>;
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samsung,i2s-sampling-rate = <48000>;
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samsung,i2s-bits-per-sample = <16>;
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samsung,i2s-channels = <2>;
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samsung,i2s-lr-clk-framesize = <256>;
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samsung,i2s-bit-clk-framesize = <32>;
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samsung,i2s-id = <1>;
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};
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xhci@12000000 {
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compatible = "samsung,exynos5250-xhci";
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reg = <0x12000000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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phy {
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compatible = "samsung,exynos5250-usb3-phy";
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reg = <0x12100000 0x100>;
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};
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};
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};
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