upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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55 lines
1.6 KiB
55 lines
1.6 KiB
13 years ago
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/*
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* Copyright (C) 2012 Samsung Electronics
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* Donghwa Lee <dh09.lee@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/power.h>
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static void exynos4_mipi_phy_control(unsigned int dev_index,
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unsigned int enable)
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{
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struct exynos4_power *pmu =
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(struct exynos4_power *)samsung_get_base_power();
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unsigned int addr, cfg = 0;
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if (dev_index == 0)
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addr = (unsigned int)&pmu->mipi_phy0_control;
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else
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addr = (unsigned int)&pmu->mipi_phy1_control;
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cfg = readl(addr);
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if (enable)
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cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
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else
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cfg &= ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
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writel(cfg, addr);
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}
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void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)
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{
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if (cpu_is_exynos4())
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exynos4_mipi_phy_control(dev_index, enable);
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}
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