upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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125 lines
2.7 KiB
125 lines
2.7 KiB
17 years ago
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/*
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* U-boot - serial.c Blackfin Serial Driver
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*
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* Copyright (c) 2005-2008 Analog Devices Inc.
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*
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* Copyright (c) 2003 Bas Vermeulen <bas@buyways.nl>,
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* BuyWays B.V. (www.buyways.nl)
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*
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* Based heavily on:
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* blkfinserial.c: Serial driver for BlackFin DSP internal USRTs.
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* Copyright(c) 2003 Metrowerks <mwaddel@metrowerks.com>
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* Copyright(c) 2001 Tony Z. Kou <tonyko@arcturusnetworks.com>
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* Copyright(c) 2001-2002 Arcturus Networks Inc. <www.arcturusnetworks.com>
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*
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* Based on code from 68328 version serial driver imlpementation which was:
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* Copyright (C) 1995 David S. Miller <davem@caip.rutgers.edu>
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* Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
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* Copyright (C) 1998, 1999 D. Jeff Dionne <jeff@uclinux.org>
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* Copyright (C) 1999 Vladimir Gurevich <vgurevic@cisco.com>
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*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/blackfin.h>
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#include <asm/mach-common/bits/uart.h>
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#if defined(UART_LSR) && (CONFIG_UART_CONSOLE != 0)
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# error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
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#endif
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#include "serial.h"
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/* Symbol for our assembly to call. */
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void serial_set_baud(uint32_t baud)
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{
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serial_early_set_baud(baud);
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}
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/* Symbol for common u-boot code to call.
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* Setup the baudrate (brg: baudrate generator).
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*/
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void serial_setbrg(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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serial_set_baud(gd->baudrate);
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}
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/* Symbol for our assembly to call. */
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void serial_initialize(void)
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{
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serial_early_init();
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}
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/* Symbol for common u-boot code to call. */
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int serial_init(void)
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{
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serial_initialize();
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serial_setbrg();
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return 0;
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}
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void serial_putc(const char c)
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{
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/* send a \r for compatibility */
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if (c == '\n')
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serial_putc('\r');
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WATCHDOG_RESET();
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/* wait for the hardware fifo to clear up */
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while (!(*pUART_LSR & THRE))
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continue;
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/* queue the character for transmission */
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*pUART_THR = c;
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SSYNC();
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WATCHDOG_RESET();
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/* wait for the byte to be shifted over the line */
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while (!(*pUART_LSR & TEMT))
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continue;
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}
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int serial_tstc(void)
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{
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WATCHDOG_RESET();
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return (*pUART_LSR & DR) ? 1 : 0;
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}
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int serial_getc(void)
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{
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uint16_t uart_lsr_val, uart_rbr_val;
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/* wait for data ! */
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while (!serial_tstc())
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continue;
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/* clear the status and grab the new byte */
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uart_lsr_val = *pUART_LSR;
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uart_rbr_val = *pUART_RBR;
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if (uart_lsr_val & (OE|PE|FE|BI)) {
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/* Some parts are read-to-clear while others are
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* write-to-clear. Just do the write for everyone
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* since it cant hurt (other than code size).
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*/
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*pUART_LSR = (OE|PE|FE|BI);
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return -1;
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}
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return uart_rbr_val & 0xFF;
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}
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void serial_puts(const char *s)
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{
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while (*s)
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serial_putc(*s++);
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}
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