upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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164 lines
5.4 KiB
164 lines
5.4 KiB
19 years ago
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/**
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* @file IxEthDBPortDefs.h
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*
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* @brief Public definition of the ports and port capabilities
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*
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* @par
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* IXP400 SW Release version 2.0
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*
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* -- Copyright Notice --
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*
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* @par
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* Copyright 2001-2005, Intel Corporation.
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* All rights reserved.
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*
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* @par
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* @par
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @par
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* -- End of Copyright Notice --
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*/
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/**
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* @defgroup IxEthDBPortDefs IXP400 Ethernet Database Port Definitions (IxEthDBPortDefs)
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*
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* @brief IXP400 Public definition of the ports and port capabilities
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*
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* @{
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*/
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#ifndef IxEthDBPortDefs_H
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#define IxEthDBPortDefs_H
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/**
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* @brief Port types - currently only Ethernet NPEs are recognized as specific types
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* All other (user-defined) ports must be specified as IX_ETH_GENERIC
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*/
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typedef enum
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{
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IX_ETH_GENERIC = 0, /**< generic ethernet port */
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IX_ETH_NPE /**< specific Ethernet NPE */
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} IxEthDBPortType;
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/**
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* @brief Port capabilities - used by ixEthAccDatabaseMaintenance to decide whether it
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* should manually age entries or not depending on the port capabilities.
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*
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* Ethernet NPEs have aging capabilities, meaning that they will age the entries
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* automatically (by themselves).*/
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typedef enum
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{
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IX_ETH_NO_CAPABILITIES = 0, /**< no aging capabilities */
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IX_ETH_ENTRY_AGING = 0x1 /**< aging capabilities present */
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} IxEthDBPortCapability;
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/**
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* @brief Port Definition - a structure contains the Port type and capabilities
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*/
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typedef struct
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{
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IxEthDBPortType type;
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IxEthDBPortCapability capabilities;
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} IxEthDBPortDefinition;
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/**
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* @brief Port definitions structure, indexed on the port ID
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* @warning Ports 0 and 1 are used by the Ethernet access component therefore
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* it is essential to be left untouched. Port 2 here (WAN) is given as
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* an example port. The NPE firmware also assumes the NPE B to be
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* the port 0 and NPE C to be the port 1.
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*
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* @note that only 32 ports (0..31) are supported by EthDB
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*/
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static const IxEthDBPortDefinition ixEthDBPortDefinitions[] =
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{
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/* id type capabilities */
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{ /* 0 */ IX_ETH_NPE, IX_ETH_NO_CAPABILITIES }, /* Ethernet NPE B */
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{ /* 1 */ IX_ETH_NPE, IX_ETH_NO_CAPABILITIES }, /* Ethernet NPE C */
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{ /* 2 */ IX_ETH_NPE, IX_ETH_NO_CAPABILITIES }, /* Ethernet NPE A */
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{ /* 3 */ IX_ETH_GENERIC, IX_ETH_NO_CAPABILITIES }, /* WAN port */
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};
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/**
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* @def IX_ETH_DB_NUMBER_OF_PORTS
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* @brief number of supported ports
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*/
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#define IX_ETH_DB_NUMBER_OF_PORTS (sizeof (ixEthDBPortDefinitions) / sizeof (ixEthDBPortDefinitions[0]))
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/**
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* @def IX_ETH_DB_UNKNOWN_PORT
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* @brief definition of an unknown port
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*/
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#define IX_ETH_DB_UNKNOWN_PORT (0xff)
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/**
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* @def IX_ETH_DB_ALL_PORTS
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* @brief Special port ID indicating all the ports
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* @note This port ID can be used only by a subset of the EthDB API; each
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* function specifically mentions whether this is a valid parameter as the port ID
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*/
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#define IX_ETH_DB_ALL_PORTS (IX_ETH_DB_NUMBER_OF_PORTS + 1)
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/**
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* @def IX_ETH_DB_PORTS_ASSERTION
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* @brief catch invalid port definitions (<2) with a
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* compile-time assertion resulting in a duplicate case error.
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*/
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#define IX_ETH_DB_PORTS_ASSERTION { switch(0) { case 0 : ; case 1 : ; case IX_ETH_DB_NUMBER_OF_PORTS : ; }}
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/**
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* @def IX_ETH_DB_CHECK_PORT(portID)
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* @brief safety checks to verify whether the port is invalid or uninitialized
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*/
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#define IX_ETH_DB_CHECK_PORT(portID) \
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{ \
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if ((portID) >= IX_ETH_DB_NUMBER_OF_PORTS) \
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{ \
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return IX_ETH_DB_INVALID_PORT; \
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} \
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\
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if (!ixEthDBPortInfo[(portID)].enabled) \
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{ \
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return IX_ETH_DB_PORT_UNINITIALIZED; \
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} \
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}
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/**
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* @def IX_ETH_DB_CHECK_PORT_ALL(portID)
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* @brief safety checks to verify whether the port is invalid or uninitialized;
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* tolerates the use of IX_ETH_DB_ALL_PORTS
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*/
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#define IX_ETH_DB_CHECK_PORT_ALL(portID) \
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{ \
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if ((portID) != IX_ETH_DB_ALL_PORTS) \
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IX_ETH_DB_CHECK_PORT(portID) \
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}
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#endif /* IxEthDBPortDefs_H */
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/**
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*@}
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*/
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