upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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68 lines
1.5 KiB
68 lines
1.5 KiB
17 years ago
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Freescale MPC8610HPCD board
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===========================
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Building U-Boot
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---------------
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$ make MPC8610HPCD_config
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Configuring for MPC8610HPCD board...
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$ make
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Flashing U-Boot
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---------------
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The flash is 128M starting at 0xF800_0000.
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The alternate image is at 0xFBF0_0000
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The boot image is at 0xFFF0_0000.
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To Flash U-Boot into the booting bank:
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tftp 1000000 u-boot.bin
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protect off all
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erase fff00000 +$filesize
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cp.b 1000000 fff00000 $filesize
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To Flash U-boot into the alternate bank
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tftp 1000000 u-boot.bin
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erase fbf00000 +$filesize
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cp.b 1000000 fbf00000 $filesize
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pixis_reset command
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-------------------
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A new command, "pixis_reset", is introduced to reset mpc8610hpcd board
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using the FPGA sequencer. When the board restarts, it has the option
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of using either the current or alternate flash bank as the boot
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image, with or without the watchdog timer enabled, and finally with
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or without frequency changes.
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Usage is;
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pixis_reset
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pixis_reset altbank
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pixis_reset altbank wd
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pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
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pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
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Examples;
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/* reset to current bank, like "reset" command */
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pixis_reset
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/* reset board but use the to alternate flash bank */
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pixis_reset altbank
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/* reset board, use alternate flash bank with watchdog timer enabled*/
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pixis_reset altbank wd
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/* reset board to alternate bank with frequency changed.
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* 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio
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*/
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pixis-reset altbank cf 40 2.5 10
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