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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* for now: just dummy functions to satisfy the linker */
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#include <common.h>
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void __flush_cache(unsigned long start, unsigned long size)
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{
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#if defined(CONFIG_ARM1136)
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void arm1136_cache_flush(void);
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arm1136_cache_flush();
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#endif
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ARM (ARM926ejs): add data cache support, tested on magnesium and tx25 board
Enable "cache" command on tx25 and magnesium board and test performance.
Test 1: Loading 127 MB of data from NAND flash into RAM:
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
magnesium 32,6s 22,5s 30s = x 1,09
tx25 (29MB only) 9,69s 5,05s 8,16s = x 1,19
Test 2: uncompressing a gzipped image from RAM to RAM
(size compressed: 6.5 MiB, uncompressed: 35 MiB):
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
magnesium 4,25s 2,08s 1,72s = x 2,47
tx25 4,82s 2,04s 1,84s = x 2,62
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Alessandro Rubini <rubini@gnudd.com>
14 years ago
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#ifdef CONFIG_ARM926EJS
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/* test and clean, page 2-23 of arm926ejs manual */
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asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
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/* disable write buffer as well (page 2-22) */
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asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
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#endif
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return;
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}
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void flush_cache(unsigned long start, unsigned long size)
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__attribute__((weak, alias("__flush_cache")));
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/*
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* Default implementation:
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* do a range flush for the entire range
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*/
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void __flush_dcache_all(void)
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{
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flush_cache(0, ~0);
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}
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void flush_dcache_all(void)
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__attribute__((weak, alias("__flush_dcache_all")));
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/*
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* Default implementation of enable_caches()
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* Real implementation should be in platform code
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*/
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void __enable_caches(void)
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{
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puts("WARNING: Caches not enabled\n");
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}
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void enable_caches(void)
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__attribute__((weak, alias("__enable_caches")));
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