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upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/arch/arm/include/asm/arch-meson/gxbb.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
6 years ago
/* SPDX-License-Identifier: GPL-2.0+ */
arm: add initial support for Amlogic Meson and ODROID-C2 This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
8 years ago
/*
* (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
*/
#ifndef __GXBB_H__
#define __GXBB_H__
ARM: arch-meson: build memory banks using reported memory from registers As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
7 years ago
#define GXBB_FIRMWARE_MEM_SIZE 0x1000000
#define GXBB_AOBUS_BASE 0xc8100000
arm: add initial support for Amlogic Meson and ODROID-C2 This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
8 years ago
#define GXBB_PERIPHS_BASE 0xc8834400
#define GXBB_HIU_BASE 0xc883c000
#define GXBB_ETH_BASE 0xc9410000
ARM: arch-meson: build memory banks using reported memory from registers As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
7 years ago
/* Always-On Peripherals registers */
#define GXBB_AO_ADDR(off) (GXBB_AOBUS_BASE + ((off) << 2))
#define GXBB_AO_SEC_GP_CFG0 GXBB_AO_ADDR(0x90)
#define GXBB_AO_SEC_GP_CFG3 GXBB_AO_ADDR(0x93)
#define GXBB_AO_SEC_GP_CFG4 GXBB_AO_ADDR(0x94)
#define GXBB_AO_SEC_GP_CFG5 GXBB_AO_ADDR(0x95)
#define GXBB_AO_MEM_SIZE_MASK 0xFFFF0000
#define GXBB_AO_MEM_SIZE_SHIFT 16
#define GXBB_AO_BL31_RSVMEM_SIZE_MASK 0xFFFF0000
#define GXBB_AO_BL31_RSVMEM_SIZE_SHIFT 16
#define GXBB_AO_BL32_RSVMEM_SIZE_MASK 0xFFFF
arm: add initial support for Amlogic Meson and ODROID-C2 This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
8 years ago
/* Peripherals registers */
#define GXBB_PERIPHS_ADDR(off) (GXBB_PERIPHS_BASE + ((off) << 2))
/* GPIO registers 0 to 6 */
#define _GXBB_GPIO_OFF(n) ((n) == 6 ? 0x08 : 0x0c + 3 * (n))
#define GXBB_GPIO_EN(n) GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 0)
#define GXBB_GPIO_IN(n) GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 1)
#define GXBB_GPIO_OUT(n) GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 2)
#define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50)
#define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51)
arm: meson: Add supplementary ethernet registers definitions On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers were added to configure the internal RMII PHY interface. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
7 years ago
#define GXBB_ETH_REG_2 GXBB_PERIPHS_ADDR(0x56)
#define GXBB_ETH_REG_3 GXBB_PERIPHS_ADDR(0x57)
arm: add initial support for Amlogic Meson and ODROID-C2 This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
8 years ago
#define GXBB_ETH_REG_0_PHY_INTF BIT(0)
#define GXBB_ETH_REG_0_TX_PHASE(x) (((x) & 3) << 5)
#define GXBB_ETH_REG_0_TX_RATIO(x) (((x) & 7) << 7)
#define GXBB_ETH_REG_0_PHY_CLK_EN BIT(10)
arm: meson: Add supplementary ethernet registers definitions On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers were added to configure the internal RMII PHY interface. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
7 years ago
#define GXBB_ETH_REG_0_INVERT_RMII_CLK BIT(11)
arm: add initial support for Amlogic Meson and ODROID-C2 This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
8 years ago
#define GXBB_ETH_REG_0_CLK_EN BIT(12)
/* HIU registers */
#define GXBB_HIU_ADDR(off) (GXBB_HIU_BASE + ((off) << 2))
#define GXBB_MEM_PD_REG_0 GXBB_HIU_ADDR(0x40)
/* Ethernet memory power domain */
#define GXBB_MEM_PD_REG_0_ETH_MASK (BIT(2) | BIT(3))
/* Clock gates */
#define GXBB_GCLK_MPEG_0 GXBB_HIU_ADDR(0x50)
#define GXBB_GCLK_MPEG_1 GXBB_HIU_ADDR(0x51)
#define GXBB_GCLK_MPEG_2 GXBB_HIU_ADDR(0x52)
#define GXBB_GCLK_MPEG_OTHER GXBB_HIU_ADDR(0x53)
#define GXBB_GCLK_MPEG_AO GXBB_HIU_ADDR(0x54)
odroid-c2: enable I2C Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
7 years ago
#define GXBB_GCLK_MPEG_0_I2C BIT(9)
arm: add initial support for Amlogic Meson and ODROID-C2 This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
8 years ago
#define GXBB_GCLK_MPEG_1_ETH BIT(3)
#endif /* __GXBB_H__ */