upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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109 lines
2.6 KiB
109 lines
2.6 KiB
23 years ago
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#include <common.h>
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#include <mii_phy.h>
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#include "ep8260.h"
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#define MII_MDIO 0x01
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#define MII_MDCK 0x02
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#define MII_MDIR 0x04
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void
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mii_discover_phy(void)
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{
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int known;
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unsigned short phy_reg;
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unsigned long phy_id;
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known = 0;
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printf("Discovering phy @ 0: ");
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phy_id = mii_phy_read(2) << 16;
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phy_id |= mii_phy_read(3);
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if ((phy_id & 0xFFFFFC00) == 0x00137800) {
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printf("Level One ");
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if ((phy_id & 0x000003F0) == 0xE0) {
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printf("LXT971A Revision %d\n", (int)(phy_id & 0xF));
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known = 1;
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}
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else printf("unknown type\n");
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}
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else printf("unknown OUI = 0x%08lX\n", phy_id);
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phy_reg = mii_phy_read(1);
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if (!(phy_reg & 0x0004)) printf("Link is down\n");
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if (!(phy_reg & 0x0020)) printf("Auto-negotiation not complete\n");
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if (phy_reg & 0x0002) printf("Jabber condition detected\n");
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if (phy_reg & 0x0010) printf("Remote fault condition detected \n");
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if (known) {
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phy_reg = mii_phy_read(17);
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if (phy_reg & 0x0400)
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printf("Phy operating at %d MBit/s in %s-duplex mode\n",
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phy_reg & 0x4000 ? 100 : 10,
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phy_reg & 0x0200 ? "full" : "half");
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else
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printf("bad link!!\n");
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/*
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left off: no link, green 100MBit, yellow 10MBit
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right off: no activity, green full-duplex, yellow half-duplex
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*/
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mii_phy_write(20, 0x0452);
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}
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}
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unsigned short
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mii_phy_read(unsigned short reg)
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{
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int i;
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unsigned short tmp, val = 0, adr = 0;
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t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
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tmp = 0x6002 | (adr << 7) | (reg << 2);
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regs->bcsr4 = 0xC3;
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for (i = 0; i < 64; i++) {
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regs->bcsr4 ^= MII_MDCK;
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}
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for (i = 0; i < 16; i++) {
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regs->bcsr4 &= ~MII_MDCK;
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if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
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else regs->bcsr4 &= ~MII_MDIO;
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regs->bcsr4 |= MII_MDCK;
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tmp <<= 1;
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}
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regs->bcsr4 |= MII_MDIR;
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for (i = 0; i < 16; i++) {
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val <<= 1;
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regs->bcsr4 = MII_MDIO | (regs->bcsr4 | MII_MDCK);
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if (regs->bcsr4 & MII_MDIO) val |= 1;
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regs->bcsr4 = MII_MDIO | (regs->bcsr4 &= ~MII_MDCK);
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}
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return val;
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}
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void
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mii_phy_write(unsigned short reg, unsigned short val)
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{
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int i;
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unsigned short tmp, adr = 0;
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t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
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tmp = 0x5002 | (adr << 7) | (reg << 2);
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regs->bcsr4 = 0xC3;
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for (i = 0; i < 64; i++) {
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regs->bcsr4 ^= MII_MDCK;
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}
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for (i = 0; i < 16; i++) {
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regs->bcsr4 &= ~MII_MDCK;
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if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO;
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else regs->bcsr4 &= ~MII_MDIO;
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regs->bcsr4 |= MII_MDCK;
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tmp <<= 1;
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}
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for (i = 0; i < 16; i++) {
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regs->bcsr4 &= ~MII_MDCK;
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if (val & 0x8000) regs->bcsr4 |= MII_MDIO;
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else regs->bcsr4 &= ~MII_MDIO;
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regs->bcsr4 |= MII_MDCK;
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val <<= 1;
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}
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}
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