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upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/board/LaCie/common/cpld-gpio-bus.h

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LaCie/common: add support for the CPLD GPIO bus This patch adds support for the CPLD GPIO bus found on some LaCie boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO bus exposes two registers (address and data). Each of this register is made up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that the registers have been updated. Mostly this bus is used to configure the LEDs on LaCie boards. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
12 years ago
/*
* Copyright (C) 2013 Simon Guinot <simon.guinot@sequanux.org>
*
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
12 years ago
* SPDX-License-Identifier: GPL-2.0+
LaCie/common: add support for the CPLD GPIO bus This patch adds support for the CPLD GPIO bus found on some LaCie boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO bus exposes two registers (address and data). Each of this register is made up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that the registers have been updated. Mostly this bus is used to configure the LEDs on LaCie boards. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
12 years ago
*/
#ifndef _LACIE_CPLD_GPI0_BUS_H
#define _LACIE_CPLD_GPI0_BUS_H
struct cpld_gpio_bus {
unsigned *addr;
unsigned num_addr;
unsigned *data;
unsigned num_data;
unsigned enable;
};
void cpld_gpio_bus_write(struct cpld_gpio_bus *cpld_gpio_bus,
unsigned addr, unsigned value);
#endif /* _LACIE_CPLD_GPI0_BUS_H */