upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
61 lines
1.5 KiB
61 lines
1.5 KiB
14 years ago
|
/*
|
||
|
|
* arch/arm/include/asm/assembler.h
|
||
|
|
*
|
||
|
|
* Copyright (C) 1996-2000 Russell King
|
||
|
|
*
|
||
|
|
* This program is free software; you can redistribute it and/or modify
|
||
|
|
* it under the terms of the GNU General Public License version 2 as
|
||
|
|
* published by the Free Software Foundation.
|
||
|
|
*
|
||
|
|
* This file contains arm architecture specific defines
|
||
|
|
* for the different processors.
|
||
|
|
*
|
||
|
|
* Do not include any C declarations in this file - it is included by
|
||
|
|
* assembler source.
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Endian independent macros for shifting bytes within registers.
|
||
|
|
*/
|
||
|
|
#ifndef __ARMEB__
|
||
|
|
#define pull lsr
|
||
|
|
#define push lsl
|
||
|
|
#define get_byte_0 lsl #0
|
||
|
|
#define get_byte_1 lsr #8
|
||
|
|
#define get_byte_2 lsr #16
|
||
|
|
#define get_byte_3 lsr #24
|
||
|
|
#define put_byte_0 lsl #0
|
||
|
|
#define put_byte_1 lsl #8
|
||
|
|
#define put_byte_2 lsl #16
|
||
|
|
#define put_byte_3 lsl #24
|
||
|
|
#else
|
||
|
|
#define pull lsl
|
||
|
|
#define push lsr
|
||
|
|
#define get_byte_0 lsr #24
|
||
|
|
#define get_byte_1 lsr #16
|
||
|
|
#define get_byte_2 lsr #8
|
||
|
|
#define get_byte_3 lsl #0
|
||
|
|
#define put_byte_0 lsl #24
|
||
|
|
#define put_byte_1 lsl #16
|
||
|
|
#define put_byte_2 lsl #8
|
||
|
|
#define put_byte_3 lsl #0
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Data preload for architectures that support it
|
||
|
|
*/
|
||
|
|
#if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) || \
|
||
|
|
defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \
|
||
|
|
defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || \
|
||
|
|
defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_7A__) || \
|
||
|
|
defined(__ARM_ARCH_7R__)
|
||
|
|
#define PLD(code...) code
|
||
|
|
#else
|
||
|
|
#define PLD(code...)
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Cache alligned
|
||
|
|
*/
|
||
|
|
#define CALGN(code...) code
|