upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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110 lines
2.6 KiB
110 lines
2.6 KiB
18 years ago
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/*
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*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <asm/immap.h>
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DECLARE_GLOBAL_DATA_PTR;
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int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
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{
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volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
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ccm->rcr = CCM_RCR_SOFTRST;
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/* we don't return! */
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return 0;
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};
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int checkcpu(void)
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{
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volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
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u16 msk;
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u16 id = 0;
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u8 ver;
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puts("CPU: ");
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msk = (ccm->cir >> 6);
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ver = (ccm->cir & 0x003f);
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switch (msk) {
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case 0x31:
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id = 5235;
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break;
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}
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if (id) {
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printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
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ver);
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printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
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(int)(gd->cpu_clk / 1000000),
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(int)(gd->bus_clk / 1000000));
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}
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return 0;
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};
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#if defined(CONFIG_WATCHDOG)
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/* Called by macro WATCHDOG_RESET */
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void watchdog_reset(void)
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{
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volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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wdp->sr = 0x5555; /* Count register */
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asm("nop");
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wdp->sr = 0xAAAA; /* Count register */
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}
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int watchdog_disable(void)
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{
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volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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/* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
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wdp->cr |= WTM_WCR_HALTED; /* halted watchdog timer */
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puts("WATCHDOG:disabled\n");
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return (0);
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}
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int watchdog_init(void)
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{
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volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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u32 wdog_module = 0;
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/* set timeout and enable watchdog */
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wdog_module = ((CFG_CLK / CFG_HZ) * CONFIG_WATCHDOG_TIMEOUT);
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wdog_module |= (wdog_module / 8192);
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wdp->mr = wdog_module;
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wdp->cr = WTM_WCR_EN;
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puts("WATCHDOG:enabled\n");
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return (0);
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}
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#endif /* CONFIG_WATCHDOG */
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