upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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362 lines
9.8 KiB
362 lines
9.8 KiB
17 years ago
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/*
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* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include "version.h"
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#ifndef CONFIG_IDENT_STRING
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#define CONFIG_IDENT_STRING ""
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#endif
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/* last three long word reserved for cache status */
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#define ICACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 4)
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#define DCACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 8)
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#define CACR_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-12)
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#define _START _start
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#define _FAULT _fault
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#define SAVE_ALL \
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move.w #0x2700,%sr; /* disable intrs */ \
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subl #60,%sp; /* space for 15 regs */ \
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moveml %d0-%d7/%a0-%a6,%sp@;
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#define RESTORE_ALL \
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moveml %sp@,%d0-%d7/%a0-%a6; \
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addl #60,%sp; /* space for 15 regs */ \
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rte;
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.text
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/*
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* Vector table. This is used for initial platform startup.
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* These vectors are to catch any un-intended traps.
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*/
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_vectors:
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INITSP: .long 0x00000000 /* Initial SP */
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INITPC: .long _START /* Initial PC */
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vector02: .long _FAULT /* Access Error */
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vector03: .long _FAULT /* Address Error */
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vector04: .long _FAULT /* Illegal Instruction */
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vector05: .long _FAULT /* Reserved */
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vector06: .long _FAULT /* Reserved */
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vector07: .long _FAULT /* Reserved */
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vector08: .long _FAULT /* Privilege Violation */
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vector09: .long _FAULT /* Trace */
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vector0A: .long _FAULT /* Unimplemented A-Line */
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vector0B: .long _FAULT /* Unimplemented F-Line */
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vector0C: .long _FAULT /* Debug Interrupt */
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vector0D: .long _FAULT /* Reserved */
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vector0E: .long _FAULT /* Format Error */
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vector0F: .long _FAULT /* Unitialized Int. */
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/* Reserved */
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vector10_17:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector18: .long _FAULT /* Spurious Interrupt */
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vector19: .long _FAULT /* Autovector Level 1 */
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vector1A: .long _FAULT /* Autovector Level 2 */
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vector1B: .long _FAULT /* Autovector Level 3 */
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vector1C: .long _FAULT /* Autovector Level 4 */
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vector1D: .long _FAULT /* Autovector Level 5 */
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vector1E: .long _FAULT /* Autovector Level 6 */
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vector1F: .long _FAULT /* Autovector Level 7 */
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/* TRAP #0 - #15 */
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vector20_2F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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/* Reserved */
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vector30_3F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector64_127:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector128_191:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector192_255:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.text
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.globl _start
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_start:
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nop
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nop
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move.w #0x2700,%sr /* Mask off Interrupt */
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/* Set vector base register at the beginning of the Flash */
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move.l #CFG_FLASH_BASE, %d0
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movec %d0, %VBR
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move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
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movec %d0, %RAMBAR0
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move.l #(CFG_INIT_RAM1_ADDR + CFG_INIT_RAM1_CTRL), %d0
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movec %d0, %RAMBAR1
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move.l #CFG_MBAR, %d0 /* set MBAR address */
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move.c %d0, %MBAR
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/* invalidate and disable cache */
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move.l #0x01040100, %d0 /* Invalidate cache cmd */
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movec %d0, %CACR /* Invalidate cache */
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move.l #0, %d0
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movec %d0, %ACR0
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movec %d0, %ACR1
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movec %d0, %ACR2
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movec %d0, %ACR3
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/* initialize general use internal ram */
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move.l #0, %d0
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move.l #(ICACHE_STATUS), %a1 /* icache */
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move.l #(DCACHE_STATUS), %a2 /* icache */
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move.l #(CACR_STATUS), %a3 /* CACR */
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move.l %d0, (%a1)
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move.l %d0, (%a2)
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move.l %d0, (%a3)
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/* set stackpointer to end of internal ram to get some stackspace for the
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first c-code */
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move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
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clr.l %sp@-
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move.l #__got_start, %a5 /* put relocation table address to a5 */
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bsr cpu_init_f /* run low-level CPU init code (from flash) */
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bsr board_init_f /* run low-level board init code (from flash) */
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/* board_init_f() does not return */
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/*------------------------------------------------------------------------------*/
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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* This "function" does not return, instead it continues in RAM
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* after relocating the monitor code.
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*
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* r3 = dest
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* r4 = src
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* r5 = length in bytes
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* r6 = cachelinesize
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*/
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.globl relocate_code
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relocate_code:
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link.w %a6,#0
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move.l 8(%a6), %sp /* set new stack pointer */
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move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
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move.l 16(%a6), %a0 /* Save copy of Destination Address */
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move.l #CFG_MONITOR_BASE, %a1
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move.l #__init_end, %a2
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move.l %a0, %a3
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/* copy the code to RAM */
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1:
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move.l (%a1)+, (%a3)+
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cmp.l %a1,%a2
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bgt.s 1b
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/*
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* We are done. Do not return, instead branch to second part of board
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* initialization, now running from RAM.
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*/
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move.l %a0, %a1
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add.l #(in_ram - CFG_MONITOR_BASE), %a1
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jmp (%a1)
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in_ram:
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clear_bss:
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/*
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* Now clear BSS segment
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*/
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move.l %a0, %a1
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add.l #(_sbss - CFG_MONITOR_BASE),%a1
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move.l %a0, %d1
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add.l #(_ebss - CFG_MONITOR_BASE),%d1
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6:
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clr.l (%a1)+
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cmp.l %a1,%d1
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bgt.s 6b
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/*
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* fix got table in RAM
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*/
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move.l %a0, %a1
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add.l #(__got_start - CFG_MONITOR_BASE),%a1
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move.l %a1,%a5 /* * fix got pointer register a5 */
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move.l %a0, %a2
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add.l #(__got_end - CFG_MONITOR_BASE),%a2
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7:
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move.l (%a1),%d1
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sub.l #_start,%d1
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add.l %a0,%d1
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move.l %d1,(%a1)+
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cmp.l %a2, %a1
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bne 7b
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/* calculate relative jump to board_init_r in ram */
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move.l %a0, %a1
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add.l #(board_init_r - CFG_MONITOR_BASE), %a1
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/* set parameters for board_init_r */
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move.l %a0,-(%sp) /* dest_addr */
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move.l %d0,-(%sp) /* gd */
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jsr (%a1)
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/*------------------------------------------------------------------------------*/
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/* exception code */
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.globl _fault
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_fault:
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jmp _fault
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.globl _exc_handler
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_exc_handler:
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SAVE_ALL
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movel %sp,%sp@-
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bsr exc_handler
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addql #4,%sp
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RESTORE_ALL
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.globl _int_handler
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_int_handler:
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SAVE_ALL
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movel %sp,%sp@-
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bsr int_handler
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addql #4,%sp
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RESTORE_ALL
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/*------------------------------------------------------------------------------*/
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/* cache functions */
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.globl icache_enable
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icache_enable:
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move.l #(CFG_SDRAM_BASE + 0x1c000), %d0
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movec %d0, %ACR2 /* Enable cache */
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move.l #0x020C8100, %d0 /* Setup cache mask */
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movec %d0, %CACR /* Enable cache */
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nop
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move.l #(ICACHE_STATUS), %a1
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moveq #1, %d0
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move.l %d0, (%a1)
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rts
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.globl icache_disable
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icache_disable:
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move.l #0x000C8100, %d0 /* Setup cache mask */
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movec %d0, %CACR /* Disable cache */
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clr.l %d0 /* Setup cache mask */
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movec %d0, %ACR2
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movec %d0, %ACR3
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move.l #(ICACHE_STATUS), %a1
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moveq #0, %d0
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move.l %d0, (%a1)
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rts
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.globl icache_invalid
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icache_invalid:
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move.l #0x000C8100, %d0 /* Setup cache mask */
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movec %d0, %CACR /* Enable cache */
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rts
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.globl icache_status
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icache_status:
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move.l #(ICACHE_STATUS), %a1
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move.l (%a1), %d0
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rts
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.globl dcache_enable
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dcache_enable:
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bsr icache_disable
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move.l #(CFG_SDRAM_BASE + 0xc000), %d0
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movec %d0, %ACR0 /* Enable cache */
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move.l #0xA30C8100, %d0 /* Invalidate cache cmd */
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movec %d0, %CACR /* Invalidate cache */
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move.l #(DCACHE_STATUS), %a1
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moveq #1, %d0
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move.l %d0, (%a1)
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rts
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.globl dcache_disable
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dcache_disable:
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move.l #0xA30C8100, %d0 /* Setup cache mask */
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movec %d0, %CACR /* Disable cache */
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clr.l %d0 /* Setup cache mask */
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movec %d0, %ACR0
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movec %d0, %ACR1
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move.l #(DCACHE_STATUS), %a1
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moveq #0, %d0
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move.l %d0, (%a1)
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rts
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|
|
||
|
|
.globl dcache_status
|
||
|
|
dcache_status:
|
||
|
|
move.l #(DCACHE_STATUS), %a1
|
||
|
|
move.l (%a1), %d0
|
||
|
|
rts
|
||
|
|
|
||
|
|
/*------------------------------------------------------------------------------*/
|
||
|
|
|
||
|
|
.globl version_string
|
||
|
|
version_string:
|
||
|
|
.ascii U_BOOT_VERSION
|
||
|
|
.ascii " (", __DATE__, " - ", __TIME__, ")"
|
||
|
|
.ascii CONFIG_IDENT_STRING, "\0"
|