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upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.h

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arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr This patch adds the DDR3 setup and training code taken from the Marvell U-Boot repository. This code used to be included as a binary (bin_hdr) into the Armada A38x boot image. Not linked with the main U-Boot. With this code addition and the serdes/PHY setup code, the Armada A38x support in mainline U-Boot is finally self-contained. So the complete image for booting can be built from mainline U-Boot. Without any additional external inclusion. Note: This code has undergone many hours (days!) of coding-style cleanup and refactoring. It still is not checkpatch clean though, I'm afraid. As the factoring of the code has so many levels of indentation that many lines are longer than 80 chars. Signed-off-by: Stefan Roese <sr@denx.de>
10 years ago
/*
* Copyright (C) Marvell International Ltd. and its affiliates
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef _DDR3_TRAINING_HW_ALGO_H_
#define _DDR3_TRAINING_HW_ALGO_H_
int ddr3_tip_vref(u32 dev_num);
int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id);
int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap);
#endif /* _DDR3_TRAINING_HW_ALGO_H_ */