upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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59 lines
1.5 KiB
59 lines
1.5 KiB
9 years ago
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/*
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* (C) Copyright 2015
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* Texas Instruments Incorporated
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*
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* Lokesh Vutla <lokeshvutla@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _DRA7_IODELAY_H_
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#define _DRA7_IODELAY_H_
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#include <common.h>
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#include <asm/arch/sys_proto.h>
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/* CONFIG_REG_0 */
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#define CFG_REG_0_OFFSET 0xC
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#define CFG_REG_ROM_READ_SHIFT 1
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#define CFG_REG_ROM_READ_MASK (1 << 1)
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#define CFG_REG_CALIB_STRT_SHIFT 0
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#define CFG_REG_CALIB_STRT_MASK (1 << 0)
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#define CFG_REG_CALIB_STRT 1
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#define CFG_REG_CALIB_END 0
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#define CFG_REG_ROM_READ_START (1 << 1)
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#define CFG_REG_ROM_READ_END (0 << 1)
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/* CONFIG_REG_2 */
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#define CFG_REG_2_OFFSET 0x14
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#define CFG_REG_REFCLK_PERIOD_SHIFT 0
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#define CFG_REG_REFCLK_PERIOD_MASK (0xFFFF << 0)
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#define CFG_REG_REFCLK_PERIOD 0x2EF
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/* CONFIG_REG_8 */
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#define CFG_REG_8_OFFSET 0x2C
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#define CFG_IODELAY_UNLOCK_KEY 0x0000AAAA
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#define CFG_IODELAY_LOCK_KEY 0x0000AAAB
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/* CTRL_CORE_SMA_SW_0 */
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#define CTRL_ISOLATE_SHIFT 2
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#define CTRL_ISOLATE_MASK (1 << 2)
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#define ISOLATE_IO 1
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#define DEISOLATE_IO 0
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/* PRM_IO_PMCTRL */
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#define PMCTRL_ISOCLK_OVERRIDE_SHIFT 0
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#define PMCTRL_ISOCLK_OVERRIDE_MASK (1 << 0)
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#define PMCTRL_ISOCLK_STATUS_SHIFT 1
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#define PMCTRL_ISOCLK_STATUS_MASK (1 << 1)
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#define PMCTRL_ISOCLK_OVERRIDE_CTRL 1
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#define PMCTRL_ISOCLK_NOT_OVERRIDE_CTRL 0
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#define ERR_CALIBRATE_IODELAY 0x1
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#define ERR_DEISOLATE_IO 0x2
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#define ERR_ISOLATE_IO 0x4
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#define ERR_UPDATE_DELAY 0x8
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void __recalibrate_iodelay(struct pad_conf_entry const *array, int npads);
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#endif
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