upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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37 lines
987 B
37 lines
987 B
13 years ago
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/*
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* linux/include/asm-arm/byteorder.h
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* ARM Endian-ness. In little endian mode, the data bus is connected such
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* that byte accesses appear as:
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* 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
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* and word accesses (data or instruction) appear as:
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* d0...d31
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*
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* When in big endian mode, byte accesses appear as:
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* 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
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* and word accesses (data or instruction) appear as:
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* d0...d31
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*/
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#ifndef __ASM_NDS_BYTEORDER_H
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#define __ASM_NDS_BYTEORDER_H
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#include <asm/types.h>
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#ifdef __NDSEB__
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#include <linux/byteorder/big_endian.h>
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#else
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#include <linux/byteorder/little_endian.h>
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#endif
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#endif
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