wdenk
22 years ago
parent
67fc21f34e
commit
012771d88a
@ -0,0 +1,47 @@ |
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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SOBJS = init.o
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$(LIB): $(OBJS) $(SOBJS) |
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$(AR) crv $@ $^
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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sinclude .depend |
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#########################################################################
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@ -0,0 +1,123 @@ |
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/* |
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* (C) Copyright 2001 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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OUTPUT_ARCH(powerpc) |
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SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
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/* Do we need any of these for elf? |
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__DYNAMIC = 0; */ |
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SECTIONS |
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{ |
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/* Read-only sections, merged into text segment: */ |
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. = + SIZEOF_HEADERS; |
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.interp : { *(.interp) } |
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.hash : { *(.hash) } |
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.dynsym : { *(.dynsym) } |
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.dynstr : { *(.dynstr) } |
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.rel.text : { *(.rel.text) } |
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.rela.text : { *(.rela.text) } |
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.rel.data : { *(.rel.data) } |
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.rela.data : { *(.rela.data) } |
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.rel.rodata : { *(.rel.rodata) } |
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.rela.rodata : { *(.rela.rodata) } |
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.rel.got : { *(.rel.got) } |
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.rela.got : { *(.rela.got) } |
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.rel.ctors : { *(.rel.ctors) } |
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.rela.ctors : { *(.rela.ctors) } |
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.rel.dtors : { *(.rel.dtors) } |
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.rela.dtors : { *(.rela.dtors) } |
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.rel.bss : { *(.rel.bss) } |
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.rela.bss : { *(.rela.bss) } |
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.rel.plt : { *(.rel.plt) } |
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.rela.plt : { *(.rela.plt) } |
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.init : { *(.init) } |
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.plt : { *(.plt) } |
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.text : |
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{ |
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cpu/mpc8xx/start.o (.text) |
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common/environment.o(.text) |
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*(.text) |
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*(.fixup) |
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*(.got1) |
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} |
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_etext = .; |
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PROVIDE (etext = .); |
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.rodata : |
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{ |
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*(.rodata) |
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*(.rodata1) |
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} |
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.fini : { *(.fini) } =0 |
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.ctors : { *(.ctors) } |
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.dtors : { *(.dtors) } |
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/* Read-write section, merged into data segment: */ |
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. = (. + 0x00FF) & 0xFFFFFF00; |
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_erotext = .; |
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PROVIDE (erotext = .); |
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.reloc : |
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{ |
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*(.got) |
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_GOT2_TABLE_ = .; |
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*(.got2) |
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_FIXUP_TABLE_ = .; |
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*(.fixup) |
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} |
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__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
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__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
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.data : |
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{ |
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*(.data) |
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*(.data1) |
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*(.sdata) |
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*(.sdata2) |
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*(.dynamic) |
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CONSTRUCTORS |
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} |
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_edata = .; |
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PROVIDE (edata = .); |
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__start___ex_table = .; |
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__ex_table : { *(__ex_table) } |
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__stop___ex_table = .; |
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. = ALIGN(256); |
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__init_begin = .; |
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.text.init : { *(.text.init) } |
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.data.init : { *(.data.init) } |
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. = ALIGN(256); |
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__init_end = .; |
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__bss_start = .; |
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.bss : |
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{ |
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*(.sbss) *(.scommon) |
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*(.dynbss) |
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*(.bss) |
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*(COMMON) |
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} |
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_end = . ; |
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PROVIDE (end = .); |
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} |
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@ -0,0 +1,94 @@ |
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(cpu/mpc7xxx/start.S) |
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start: |
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b boot_cold |
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start_warm: |
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b boot_warm |
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boot_cold: |
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boot_warm: |
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clear bats |
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init l2 (if enabled) |
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init altivec (if enabled) |
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invalidate l2 (if enabled) |
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setup bats (from defines in config_EVB) |
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enable_addr_trans: (if MMU enabled) |
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enable MSR_IR and MSR_DR |
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jump to in_flash |
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in_flash: |
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enable l1 dcache |
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gal_low_init: (board/evb64260/sdram_init.S) |
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config SDRAM (CFG, TIMING, DECODE) |
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init scratch regs (810 + 814) |
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detect DIMM0 (bank 0 only) |
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config SDRAM_PARA0 to 256/512Mbit |
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bl sdram_op_mode |
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detect bank0 width |
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write scratch reg 810 |
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config SDRAM_PARA0 with results |
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config SDRAM_PARA1 with results |
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detect DIMM1 (bank 2 only) |
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config SDRAM_PARA2 to 256/512Mbit |
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detect bank2 width |
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write scratch reg 814 |
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config SDRAM_PARA2 with results |
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config SDRAM_PARA3 with results |
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setup device bus timings/width |
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setup boot device timings/width |
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setup CPU_CONF (0x0) |
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setup cpu master control register 0x160 |
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setup PCI0 TIMEOUT |
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setup PCI1 TIMEOUT |
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setup PCI0 BAR |
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setup PCI1 BAR |
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setup MPP control 0-3 |
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setup GPP level control |
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setup Serial ports multiplex |
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setup stack pointer (r1) |
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setup GOT |
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call cpu_init_f |
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debug leds |
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board_init_f: (common/board.c) |
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board_pre_init: |
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remap gt regs? |
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map PCI mem/io |
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map device space |
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clear out interupts |
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init_timebase |
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env_init |
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serial_init |
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console_init_f |
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display_options |
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initdram: (board/evb64260/evb64260.c) |
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detect memory |
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for each bank: |
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dram_size() |
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setup PCI slave memory mappings |
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setup SCS |
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setup monitor |
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alloc board info struct |
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init bd struct |
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relocate_code: (cpu/mpc7xxx/start.S) |
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copy,got,clearbss |
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board_init_r(bd, dest_addr) (common/board.c) |
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setup bd function pointers |
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trap_init |
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flash_init: (board/evb64260/flash.c) |
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setup bd flash info |
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cpu_init_r: (cpu/mpc7xxx/cpu_init.c) |
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nothing |
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mem_malloc_init |
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malloc_bin_reloc |
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spi_init (r or f)??? (CFG_ENV_IS_IN_EEPROM) |
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env_relocated |
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misc_init_r(bd): (board/evb64260/evb64260.c) |
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mpsc_init2 |
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@ -0,0 +1,84 @@ |
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#ifndef _ADDRESS_TABLE_H |
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#define _ADDRESS_TABLE_H 1 |
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/*
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* ---------------------------------------------------------------------------- |
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* addressTable.h - this file has all the declarations of the address table |
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*/ |
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#define _8K_TABLE 0 |
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#define ADDRESS_TABLE_ALIGNMENT 8 |
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#define HASH_DEFAULT_MODE 14 |
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#define HASH_MODE 13 |
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#define HASH_SIZE 12 |
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#define HOP_NUMBER 12 |
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#define MAC_ADDRESS_STRING_SIZE 12 |
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#define MAC_ENTRY_SIZE sizeof(addrTblEntry) |
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#define MAX_NUMBER_OF_ADDRESSES_TO_STORE 1000 |
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#define PROMISCUOUS_MODE 0 |
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#define SKIP 1<<1 |
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#define SKIP_BIT 1 |
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#define VALID 1 |
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/*
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* ---------------------------------------------------------------------------- |
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* XXX_MIKE - potential sign-extension bugs lurk here... |
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*/ |
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#define NIBBLE_SWAPPING_32_BIT(X) ( (((X) & 0xf0f0f0f0) >> 4) \ |
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| (((X) & 0x0f0f0f0f) << 4) ) |
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#define NIBBLE_SWAPPING_16_BIT(X) ( (((X) & 0x0000f0f0) >> 4) \ |
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| (((X) & 0x00000f0f) << 4) ) |
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#define FLIP_4_BITS(X) ( (((X) & 0x01) << 3) | (((X) & 0x002) << 1) \ |
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| (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) ) |
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#define FLIP_6_BITS(X) ( (((X) & 0x01) << 5) | (((X) & 0x020) >> 5) \ |
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| (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \
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| (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) ) |
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#define FLIP_9_BITS(X) ( (((X) & 0x01) << 8) | (((X) & 0x100) >> 8) \ |
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| (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \
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| (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \
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| ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) ) |
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/*
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* V: value we're operating on |
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* O: offset of rightmost bit in field |
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* W: width of field to shift |
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* S: distance to shift left |
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*/ |
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#define MASK( fieldWidth ) ((1 << (fieldWidth)) - 1) |
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#define leftShiftedBitfield( V,O,W,S) (((V) & (MASK(W) << (O))) << (S)) |
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#define rightShiftedBitfield(V,O,W,S) (((u32)((V) & (MASK(W) << (O)))) >> (S)) |
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/*
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* Push to main memory all cache lines associated with |
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* the specified range of virtual memory addresses |
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* |
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* A: Address of first byte in range to flush |
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* N: Number of bytes to flush |
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* Note - flush_dcache_range() does a "sync", does NOT invalidate |
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*/ |
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#define DCACHE_FLUSH_N_SYNC( A, N ) flush_dcache_range( (A), ((A)+(N)) ) |
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typedef struct addressTableEntryStruct { |
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u32 hi; |
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u32 lo; |
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} addrTblEntry; |
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u32 |
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uncachedPages( u32 pages ); |
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u32 |
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hashTableFunction( u32 macH, u32 macL, u32 HashSize, u32 hash_mode ); |
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unsigned int |
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initAddressTable( u32 port, u32 hashMode, u32 hashSize ); |
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int |
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addAddressTableEntry( u32 port, u32 macH, u32 macL, u32 rd, u32 skip ); |
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#endif /* #ifndef _ADDRESS_TABLE_H */ |
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@ -0,0 +1,142 @@ |
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/*
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* (C) Copyright 2001 |
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* John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/*
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* mpsc.h - header file for MPSC in uart mode (console driver) |
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*/ |
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#ifndef __MPSC_H__ |
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#define __MPSC_H__ |
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/* include actual Galileo defines */ |
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#include <galileo/gt64260R.h> |
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/* driver related defines */ |
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int mpsc_init(int baud); |
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void mpsc_init2(void); |
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char mpsc_getchar(void); |
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int mpsc_test_char(void); |
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int galbrg_set_baudrate(int channel, int rate); |
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int mpsc_putchar_early(char ch); |
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extern int (*mpsc_putchar)(char ch); |
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#define CHANNEL CONFIG_MPSC_PORT |
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#define TX_DESC 5 |
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#define RX_DESC 20 |
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#define DESC_FIRST 0x00010000 |
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#define DESC_LAST 0x00020000 |
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#define DESC_OWNER 0x80000000 |
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#define TX_DEMAND 0x00800000 |
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#define TX_STOP 0x00010000 |
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#define RX_ENABLE 0x00000080 |
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#define SDMA_RX_ABORT (1 << 15) |
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#define SDMA_TX_ABORT (1 << 31) |
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#define MPSC_TX_ABORT (1 << 7) |
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#define MPSC_RX_ABORT (1 << 23) |
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#define MPSC_ENTER_HUNT (1 << 31) |
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/* MPSC defines */ |
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#define GALMPSC_CONNECT 0x1 |
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#define GALMPSC_DISCONNECT 0x0 |
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#define GALMPSC_UART 0x1 |
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#define GALMPSC_STOP_BITS_1 0x0 |
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#define GALMPSC_STOP_BITS_2 0x1 |
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#define GALMPSC_CHAR_LENGTH_8 0x3 |
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#define GALMPSC_CHAR_LENGTH_7 0x2 |
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#define GALMPSC_PARITY_ODD 0x0 |
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#define GALMPSC_PARITY_EVEN 0x2 |
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#define GALMPSC_PARITY_MARK 0x3 |
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#define GALMPSC_PARITY_SPACE 0x1 |
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#define GALMPSC_PARITY_NONE -1 |
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#define GALMPSC_SERIAL_MULTIPLEX SERIAL_PORT_MULTIPLEX /* 0xf010 */ |
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#define GALMPSC_ROUTING_REGISTER MAIN_ROUTING_REGISTER /* 0xb400 */ |
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#define GALMPSC_RxC_ROUTE RECEIVE_CLOCK_ROUTING_REGISTER /* 0xb404 */ |
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#define GALMPSC_TxC_ROUTE TRANSMIT_CLOCK_ROUTING_REGISTER /* 0xb408 */ |
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#define GALMPSC_MCONF_LOW MPSC0_MAIN_CONFIGURATION_LOW /* 0x8000 */ |
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#define GALMPSC_MCONF_HIGH MPSC0_MAIN_CONFIGURATION_HIGH /* 0x8004 */ |
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#define GALMPSC_PROTOCONF_REG MPSC0_PROTOCOL_CONFIGURATION /* 0x8008 */ |
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#define GALMPSC_REG_GAP 0x1000 |
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#define GALMPSC_MCONF_CHREG_BASE CHANNEL0_REGISTER1 /* 0x800c */ |
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#define GALMPSC_CHANNELREG_1 CHANNEL0_REGISTER1 /* 0x800c */ |
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#define GALMPSC_CHANNELREG_2 CHANNEL0_REGISTER2 /* 0x8010 */ |
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#define GALMPSC_CHANNELREG_3 CHANNEL0_REGISTER3 /* 0x8014 */ |
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#define GALMPSC_CHANNELREG_4 CHANNEL0_REGISTER4 /* 0x8018 */ |
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#define GALMPSC_CHANNELREG_5 CHANNEL0_REGISTER5 /* 0x801c */ |
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#define GALMPSC_CHANNELREG_6 CHANNEL0_REGISTER6 /* 0x8020 */ |
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#define GALMPSC_CHANNELREG_7 CHANNEL0_REGISTER7 /* 0x8024 */ |
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#define GALMPSC_CHANNELREG_8 CHANNEL0_REGISTER8 /* 0x8028 */ |
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#define GALMPSC_CHANNELREG_9 CHANNEL0_REGISTER9 /* 0x802c */ |
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#define GALMPSC_CHANNELREG_10 CHANNEL0_REGISTER10 /* 0x8030 */ |
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#define GALMPSC_CHANNELREG_11 CHANNEL0_REGISTER11 /* 0x8034 */ |
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#define GALSDMA_COMMAND_FIRST (1 << 16) |
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#define GALSDMA_COMMAND_LAST (1 << 17) |
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#define GALSDMA_COMMAND_ENABLEINT (1 << 23) |
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#define GALSDMA_COMMAND_AUTO (1 << 30) |
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#define GALSDMA_COMMAND_OWNER (1 << 31) |
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#define GALSDMA_RX 0 |
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#define GALSDMA_TX 1 |
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/* CHANNEL2 should be CHANNEL1, according to documentation,
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* but to work with the current GTREGS file... |
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*/ |
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#define GALSDMA_0_CONF_REG CHANNEL0_CONFIGURATION_REGISTER /* 0x4000 */ |
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#define GALSDMA_1_CONF_REG CHANNEL2_CONFIGURATION_REGISTER /* 0x6000 */ |
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#define GALSDMA_0_COM_REG CHANNEL0_COMMAND_REGISTER /* 0x4008 */ |
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#define GALSDMA_1_COM_REG CHANNEL2_COMMAND_REGISTER /* 0x6008 */ |
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#define GALSDMA_0_CUR_RX_PTR CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER /* 0x4810 */ |
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#define GALSDMA_0_CUR_TX_PTR CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER /* 0x4c10 */ |
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#define GALSDMA_0_FIR_TX_PTR CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER /* 0x4c14 */ |
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#define GALSDMA_1_CUR_RX_PTR CHANNEL2_CURRENT_RX_DESCRIPTOR_POINTER /* 0x6810 */ |
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#define GALSDMA_1_CUR_TX_PTR CHANNEL2_CURRENT_TX_DESCRIPTOR_POINTER /* 0x6c10 */ |
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#define GALSDMA_1_FIR_TX_PTR CHANNEL2_FIRST_TX_DESCRIPTOR_POINTER /* 0x6c14 */ |
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#define GALSDMA_REG_DIFF 0x2000 |
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/* WRONG in gt64260R.h */ |
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#define GALSDMA_INT_CAUSE 0xb800 /* SDMA_CAUSE */ |
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#define GALSDMA_INT_MASK 0xb880 /* SDMA_MASK */ |
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|
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#define GALSDMA_MODE_UART 0 |
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#define GALSDMA_MODE_BISYNC 1 |
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#define GALSDMA_MODE_HDLC 2 |
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#define GALSDMA_MODE_TRANSPARENT 3 |
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|
||||
#define GALBRG_0_CONFREG BRG0_CONFIGURATION_REGISTER /* 0xb200 */ |
||||
#define GALBRG_REG_GAP 0x0008 |
||||
#define GALBRG_0_BTREG BRG0_BAUDE_TUNING_REGISTER /* 0xb204 */ |
||||
|
||||
#endif /* __MPSC_H__ */ |
||||
@ -0,0 +1,63 @@ |
||||
/* serial.h - mostly useful for DUART serial_init in serial.c */ |
||||
|
||||
#ifndef __SERIAL_H__ |
||||
#define __SERIAL_H__ |
||||
|
||||
#if 0 |
||||
|
||||
#define B230400 1 |
||||
#define B115200 2 |
||||
#define B57600 4 |
||||
#define B38400 82 |
||||
#define B19200 163 |
||||
#define B9600 24 |
||||
#define B4800 651 |
||||
#define B2400 1302 |
||||
#define B1200 2604 |
||||
#define B600 5208 |
||||
#define B300 10417 |
||||
#define B150 20833 |
||||
#define B110 28409 |
||||
#define BDEFAULT B115200 |
||||
|
||||
/* this stuff is important to initialize
|
||||
the DUART channels */ |
||||
|
||||
#define Scale 0x01L /* distance between port addresses */ |
||||
#define COM1 0x000003f8 /* Keyboard */ |
||||
#define COM2 0x000002f8 /* Host */ |
||||
|
||||
|
||||
/* Port Definitions relative to base COM port addresses */ |
||||
#define DataIn (0x00*Scale) /* data input port */ |
||||
#define DataOut (0x00*Scale) /* data output port */ |
||||
#define BaudLsb (0x00*Scale) /* baud rate divisor least significant byte */ |
||||
#define BaudMsb (0x01*Scale) /* baud rate divisor most significant byte */ |
||||
#define Ier (0x01*Scale) /* interrupt enable register */ |
||||
#define Iir (0x02*Scale) /* interrupt identification register */ |
||||
#define Lcr (0x03*Scale) /* line control register */ |
||||
#define Mcr (0x04*Scale) /* modem control register */ |
||||
#define Lsr (0x05*Scale) /* line status register */ |
||||
#define Msr (0x06*Scale) /* modem status register */ |
||||
|
||||
/* Bit Definitions for above ports */ |
||||
#define LcrDlab 0x80 /* b7: enable baud rate divisor registers */ |
||||
#define LcrDflt 0x03 /* b6-0: no parity, 1 stop, 8 data */ |
||||
|
||||
#define McrRts 0x02 /* b1: request to send (I am ready to xmit) */ |
||||
#define McrDtr 0x01 /* b0: data terminal ready (I am alive ready to rcv) */ |
||||
#define McrDflt (McrRts|McrDtr) |
||||
|
||||
#define LsrTxD 0x6000 /* b5: transmit holding register empty (i.e. xmit OK!)*/ |
||||
/* b6: transmitter empty */ |
||||
#define LsrRxD 0x0100 /* b0: received data ready (i.e. got a byte!) */ |
||||
|
||||
#define MsrRi 0x0040 /* b6: ring indicator (other guy is ready to rcv) */ |
||||
#define MsrDsr 0x0020 /* b5: data set ready (other guy is alive ready to rcv */ |
||||
#define MsrCts 0x0010 /* b4: clear to send (other guy is ready to rcv) */ |
||||
|
||||
#define IerRda 0xf /* b0: Enable received data available interrupt */ |
||||
|
||||
#endif |
||||
|
||||
#endif /* __SERIAL_H__ */ |
||||
@ -0,0 +1,40 @@ |
||||
#
|
||||
# (C) Copyright 2001
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS = $(BOARD).o flash.o
|
||||
|
||||
$(LIB): .depend $(OBJS) |
||||
$(AR) crv $@ $^
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
||||
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
||||
|
||||
sinclude .depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,122 @@ |
||||
/* |
||||
* (C) Copyright 2001 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
cpu/mpc8xx/start.o (.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x00FF) & 0xFFFFFF00; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(256); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(256); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
||||
|
||||
@ -0,0 +1,16 @@ |
||||
/* By Thomas.Lange@Corelatus.com 001025
|
||||
|
||||
Definitions for EEPROM/VOLT METER DS2438 */ |
||||
|
||||
#ifndef INCeeaccessh |
||||
#define INCeeaccessh |
||||
|
||||
int ee_do_command( u8 *Tx, int Tx_len, u8 *Rx, int Rx_len, int Send_skip ); |
||||
int ee_init_data(void); |
||||
int ee_crc_ok( u8 *Buffer, int Len, u8 Crc ); |
||||
|
||||
#ifndef TRUE |
||||
#define TRUE 1 |
||||
#endif |
||||
|
||||
#endif /* INCeeaccessh */ |
||||
@ -0,0 +1,85 @@ |
||||
/* By Thomas.Lange@Corelatus.com 001025
|
||||
$Revision: 1.6 $ |
||||
|
||||
Definitions for EEPROM/VOLT METER DS2438 |
||||
Copyright (C) 2000-2001 Corelatus AB */ |
||||
|
||||
#ifndef INCeedevh |
||||
#define INCeedevh |
||||
|
||||
#define E_DEBUG(fmt,args...) if( Debug ) printk(KERN_DEBUG"EE: " fmt, ##args) |
||||
|
||||
#define PORT_B_PAR ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbpar |
||||
#define PORT_B_ODR ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbodr |
||||
#define PORT_B_DIR ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdir |
||||
#define PORT_B_DAT ((volatile immap_t *)CFG_IMMR)->im_cpm.cp_pbdat |
||||
|
||||
#define SET_PORT_B_INPUT(Mask) PORT_B_DIR &= ~(Mask) |
||||
#define SET_PORT_B_OUTPUT(Mask) PORT_B_DIR |= Mask |
||||
|
||||
#define WRITE_PORT_B(Mask,Value) { \ |
||||
if (Value) PORT_B_DAT |= Mask; \
|
||||
else PORT_B_DAT &= ~(Mask); \
|
||||
} |
||||
#define WRITE_PORT(Value) WRITE_PORT_B(PB_EEPROM,Value) |
||||
|
||||
#define READ_PORT (PORT_B_DAT&PB_EEPROM) |
||||
|
||||
/* 64 bytes chip */ |
||||
#define EE_CHIP_SIZE 64 |
||||
|
||||
/* We use this resistor for measuring the current drain on 3.3V */ |
||||
#define CURRENT_RESISTOR 0.022 |
||||
|
||||
/* microsecs
|
||||
Pull line down at least this long for reset pulse */ |
||||
#define RESET_LOW_TIME 490 |
||||
|
||||
/* Read presence pulse after we release reset pulse */ |
||||
#define PRESENCE_TIMEOUT 100 |
||||
#define PRESENCE_LOW_TIME 200 |
||||
|
||||
#define WRITE_0_LOW 80 |
||||
#define WRITE_1_LOW 2 |
||||
#define TOTAL_WRITE_LOW 80 |
||||
|
||||
#define READ_LOW 2 |
||||
#define READ_TIMEOUT 10 |
||||
#define TOTAL_READ_LOW 80 |
||||
|
||||
/*** Rom function commands ***/ |
||||
#define READ_ROM 0x33 |
||||
#define MATCH_ROM 0x55 |
||||
#define SKIP_ROM 0xCC |
||||
#define SEARCH_ROM 0xF0 |
||||
|
||||
|
||||
/*** Memory_command_function ***/ |
||||
#define WRITE_SCRATCHPAD 0x4E |
||||
#define READ_SCRATCHPAD 0xBE |
||||
#define COPY_SCRATCHPAD 0x48 |
||||
#define RECALL_MEMORY 0xB8 |
||||
#define CONVERT_TEMP 0x44 |
||||
#define CONVERT_VOLTAGE 0xB4 |
||||
|
||||
/* Chip is divided in 8 pages, 8 bytes each */ |
||||
|
||||
#define EE_PAGE_SIZE 8 |
||||
|
||||
/* All chip data we want are in page 0 */ |
||||
|
||||
/* Bytes in page 0 */ |
||||
#define EE_P0_STATUS 0 |
||||
#define EE_P0_TEMP_LSB 1 |
||||
#define EE_P0_TEMP_MSB 2 |
||||
#define EE_P0_VOLT_LSB 3 |
||||
#define EE_P0_VOLT_MSB 4 |
||||
#define EE_P0_CURRENT_LSB 5 |
||||
#define EE_P0_CURRENT_MSB 6 |
||||
|
||||
|
||||
/* 40 byte user data is located at page 3-7 */ |
||||
#define EE_USER_PAGE_0 3 |
||||
#define USER_PAGES 5 |
||||
|
||||
#endif /* INCeedevh */ |
||||
@ -0,0 +1,45 @@ |
||||
#
|
||||
# (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := $(BOARD).o flash.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS) |
||||
$(AR) crv $@ $^
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
||||
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
||||
|
||||
-include .depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,46 @@ |
||||
#
|
||||
# (C) Copyright 2001
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := $(BOARD).o flash.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS) |
||||
$(AR) crv $@ $^
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
||||
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
||||
|
||||
-include .depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,56 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef _PIP405_ISA_H_ |
||||
#define _PIP405_ISA_H_ |
||||
/* Super IO */ |
||||
#define SIO_CFG_PORT 0x3F0 /* Config Port Address */ |
||||
|
||||
|
||||
|
||||
/* table fore SIO initialization */ |
||||
typedef struct { |
||||
const uchar index; |
||||
const uchar val; |
||||
} SIO_LOGDEV_TABLE; |
||||
|
||||
typedef struct { |
||||
const uchar ldev; |
||||
const SIO_LOGDEV_TABLE *ldev_table; |
||||
} SIO_TABLE; |
||||
|
||||
|
||||
|
||||
|
||||
unsigned char open_cfg_super_IO(int address); |
||||
unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr); |
||||
void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data); |
||||
void close_cfg_super_IO(int address); |
||||
void isa_sio_setup(void); |
||||
void isa_sio_setup(void); |
||||
void isa_irq_install_handler(int vec, interrupt_handler_t *handler, void *arg); |
||||
void isa_irq_free_handler(int vec); |
||||
int handle_isa_int(void); |
||||
|
||||
|
||||
#endif |
||||
@ -0,0 +1,35 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _KBD_H_ |
||||
#define _KBD_H_ |
||||
|
||||
extern int kbd_testc(void); |
||||
extern int kbd_getc(void); |
||||
extern void kbd_interrupt(void); |
||||
extern char *kbd_initialize(void); |
||||
|
||||
unsigned char kbd_is_init(void); |
||||
#define KBD_INTERRUPT 1 |
||||
#endif |
||||
@ -0,0 +1,190 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
* Note: Part of this code has been derived from linux |
||||
* |
||||
*/ |
||||
#ifndef _USB_UHCI_H_ |
||||
#define _USB_UHCI_H_ |
||||
|
||||
|
||||
/* Command register */ |
||||
#define USBCMD 0 |
||||
#define USBCMD_RS 0x0001 /* Run/Stop */ |
||||
#define USBCMD_HCRESET 0x0002 /* Host reset */ |
||||
#define USBCMD_GRESET 0x0004 /* Global reset */ |
||||
#define USBCMD_EGSM 0x0008 /* Global Suspend Mode */ |
||||
#define USBCMD_FGR 0x0010 /* Force Global Resume */ |
||||
#define USBCMD_SWDBG 0x0020 /* SW Debug mode */ |
||||
#define USBCMD_CF 0x0040 /* Config Flag (sw only) */ |
||||
#define USBCMD_MAXP 0x0080 /* Max Packet (0 = 32, 1 = 64) */ |
||||
|
||||
/* Status register */ |
||||
#define USBSTS 2 |
||||
#define USBSTS_USBINT 0x0001 /* Interrupt due to IOC */ |
||||
#define USBSTS_ERROR 0x0002 /* Interrupt due to error */ |
||||
#define USBSTS_RD 0x0004 /* Resume Detect */ |
||||
#define USBSTS_HSE 0x0008 /* Host System Error - basically PCI problems */ |
||||
#define USBSTS_HCPE 0x0010 /* Host Controller Process Error - the scripts were buggy */ |
||||
#define USBSTS_HCH 0x0020 /* HC Halted */ |
||||
|
||||
/* Interrupt enable register */ |
||||
#define USBINTR 4 |
||||
#define USBINTR_TIMEOUT 0x0001 /* Timeout/CRC error enable */ |
||||
#define USBINTR_RESUME 0x0002 /* Resume interrupt enable */ |
||||
#define USBINTR_IOC 0x0004 /* Interrupt On Complete enable */ |
||||
#define USBINTR_SP 0x0008 /* Short packet interrupt enable */ |
||||
|
||||
#define USBFRNUM 6 |
||||
#define USBFLBASEADD 8 |
||||
#define USBSOF 12 |
||||
|
||||
/* USB port status and control registers */ |
||||
#define USBPORTSC1 16 |
||||
#define USBPORTSC2 18 |
||||
#define USBPORTSC_CCS 0x0001 /* Current Connect Status ("device present") */ |
||||
#define USBPORTSC_CSC 0x0002 /* Connect Status Change */ |
||||
#define USBPORTSC_PE 0x0004 /* Port Enable */ |
||||
#define USBPORTSC_PEC 0x0008 /* Port Enable Change */ |
||||
#define USBPORTSC_LS 0x0030 /* Line Status */ |
||||
#define USBPORTSC_RD 0x0040 /* Resume Detect */ |
||||
#define USBPORTSC_LSDA 0x0100 /* Low Speed Device Attached */ |
||||
#define USBPORTSC_PR 0x0200 /* Port Reset */ |
||||
#define USBPORTSC_SUSP 0x1000 /* Suspend */ |
||||
|
||||
/* Legacy support register */ |
||||
#define USBLEGSUP 0xc0 |
||||
#define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */ |
||||
|
||||
#define UHCI_NULL_DATA_SIZE 0x7ff /* for UHCI controller TD */ |
||||
#define UHCI_PID 0xff /* PID MASK */ |
||||
|
||||
#define UHCI_PTR_BITS 0x000F |
||||
#define UHCI_PTR_TERM 0x0001 |
||||
#define UHCI_PTR_QH 0x0002 |
||||
#define UHCI_PTR_DEPTH 0x0004 |
||||
|
||||
/* for TD <status>: */ |
||||
#define TD_CTRL_SPD (1 << 29) /* Short Packet Detect */ |
||||
#define TD_CTRL_C_ERR_MASK (3 << 27) /* Error Counter bits */ |
||||
#define TD_CTRL_LS (1 << 26) /* Low Speed Device */ |
||||
#define TD_CTRL_IOS (1 << 25) /* Isochronous Select */ |
||||
#define TD_CTRL_IOC (1 << 24) /* Interrupt on Complete */ |
||||
#define TD_CTRL_ACTIVE (1 << 23) /* TD Active */ |
||||
#define TD_CTRL_STALLED (1 << 22) /* TD Stalled */ |
||||
#define TD_CTRL_DBUFERR (1 << 21) /* Data Buffer Error */ |
||||
#define TD_CTRL_BABBLE (1 << 20) /* Babble Detected */ |
||||
#define TD_CTRL_NAK (1 << 19) /* NAK Received */ |
||||
#define TD_CTRL_CRCTIMEO (1 << 18) /* CRC/Time Out Error */ |
||||
#define TD_CTRL_BITSTUFF (1 << 17) /* Bit Stuff Error */ |
||||
#define TD_CTRL_ACTLEN_MASK 0x7ff /* actual length, encoded as n - 1 */ |
||||
|
||||
#define TD_CTRL_ANY_ERROR (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \ |
||||
TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF) |
||||
|
||||
#define TD_TOKEN_TOGGLE 19 |
||||
|
||||
/* ------------------------------------------------------------------------------------
|
||||
Virtual Root HUB |
||||
------------------------------------------------------------------------------------ */ |
||||
/* destination of request */ |
||||
#define RH_INTERFACE 0x01 |
||||
#define RH_ENDPOINT 0x02 |
||||
#define RH_OTHER 0x03 |
||||
|
||||
#define RH_CLASS 0x20 |
||||
#define RH_VENDOR 0x40 |
||||
|
||||
/* Requests: bRequest << 8 | bmRequestType */ |
||||
#define RH_GET_STATUS 0x0080 |
||||
#define RH_CLEAR_FEATURE 0x0100 |
||||
#define RH_SET_FEATURE 0x0300 |
||||
#define RH_SET_ADDRESS 0x0500 |
||||
#define RH_GET_DESCRIPTOR 0x0680 |
||||
#define RH_SET_DESCRIPTOR 0x0700 |
||||
#define RH_GET_CONFIGURATION 0x0880 |
||||
#define RH_SET_CONFIGURATION 0x0900 |
||||
#define RH_GET_STATE 0x0280 |
||||
#define RH_GET_INTERFACE 0x0A80 |
||||
#define RH_SET_INTERFACE 0x0B00 |
||||
#define RH_SYNC_FRAME 0x0C80 |
||||
/* Our Vendor Specific Request */ |
||||
#define RH_SET_EP 0x2000 |
||||
|
||||
/* Hub port features */ |
||||
#define RH_PORT_CONNECTION 0x00 |
||||
#define RH_PORT_ENABLE 0x01 |
||||
#define RH_PORT_SUSPEND 0x02 |
||||
#define RH_PORT_OVER_CURRENT 0x03 |
||||
#define RH_PORT_RESET 0x04 |
||||
#define RH_PORT_POWER 0x08 |
||||
#define RH_PORT_LOW_SPEED 0x09 |
||||
#define RH_C_PORT_CONNECTION 0x10 |
||||
#define RH_C_PORT_ENABLE 0x11 |
||||
#define RH_C_PORT_SUSPEND 0x12 |
||||
#define RH_C_PORT_OVER_CURRENT 0x13 |
||||
#define RH_C_PORT_RESET 0x14 |
||||
|
||||
/* Hub features */ |
||||
#define RH_C_HUB_LOCAL_POWER 0x00 |
||||
#define RH_C_HUB_OVER_CURRENT 0x01 |
||||
|
||||
#define RH_DEVICE_REMOTE_WAKEUP 0x00 |
||||
#define RH_ENDPOINT_STALL 0x01 |
||||
|
||||
/* Our Vendor Specific feature */ |
||||
#define RH_REMOVE_EP 0x00 |
||||
|
||||
|
||||
#define RH_ACK 0x01 |
||||
#define RH_REQ_ERR -1 |
||||
#define RH_NACK 0x00 |
||||
|
||||
|
||||
/* Transfer descriptor structure */ |
||||
typedef struct { |
||||
unsigned long link; /* next td/qh (LE)*/ |
||||
unsigned long status; /* status of the td */ |
||||
unsigned long info; /* Max Lenght / Endpoint / device address and PID */ |
||||
unsigned long buffer; /* pointer to data buffer (LE) */ |
||||
unsigned long dev_ptr; /* pointer to the assigned device (BE) */ |
||||
unsigned long res[3]; /* reserved (TDs must be 8Byte aligned) */ |
||||
} uhci_td_t, *puhci_td_t; |
||||
|
||||
/* Queue Header structure */ |
||||
typedef struct { |
||||
unsigned long head; /* Next QH (LE)*/ |
||||
unsigned long element; /* Queue element pointer (LE) */ |
||||
unsigned long res[5]; /* reserved */ |
||||
unsigned long dev_ptr; /* if 0 no tds have been assigned to this qh */ |
||||
} uhci_qh_t, *puhci_qh_t; |
||||
|
||||
struct virt_root_hub { |
||||
int devnum; /* Address of Root Hub endpoint */ |
||||
int numports; /* number of ports */ |
||||
int c_p_r[8]; /* C_PORT_RESET */ |
||||
}; |
||||
|
||||
|
||||
#endif /* _USB_UHCI_H_ */ |
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,187 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
/****************************************************************************
|
||||
* Global routines used for MIP405 |
||||
*****************************************************************************/ |
||||
#ifndef __ASSEMBLY__ |
||||
/*int switch_cs(unsigned char boot);*/ |
||||
|
||||
extern int mem_test(unsigned long start, unsigned long ramsize,int mode); |
||||
|
||||
void user_led0(unsigned char on); |
||||
|
||||
|
||||
|
||||
#endif |
||||
/* timings */ |
||||
/* PLD (CS7) */ |
||||
#define PLD_BME 0 /* Burst disable */ |
||||
#define PLD_TWE 5 /* 5 * 30ns 120ns Waitstates (access=TWT+1+TH) */ |
||||
#define PLD_CSN 1 /* Chipselect is driven inactive for 1 Cycle BTW transfers */ |
||||
#define PLD_OEN 1 /* Cycles from CS low to OE low */ |
||||
#define PLD_WBN 1 /* Cycles from CS low to WE low */ |
||||
#define PLD_WBF 1 /* Cycles from WE high to CS high */ |
||||
#define PLD_TH 2 /* Number of hold cycles after transfer */ |
||||
#define PLD_RE 0 /* Ready disabled */ |
||||
#define PLD_SOR 1 /* Sample on Ready disabled */ |
||||
#define PLD_BEM 0 /* Byte Write only active on Write cycles */ |
||||
#define PLD_PEN 0 /* Parity disable */ |
||||
#define PLD_AP ((PLD_BME << 31) + (PLD_TWE << 23) + (PLD_CSN << 18) + (PLD_OEN << 16) + (PLD_WBN << 14) + \ |
||||
(PLD_WBF << 12) + (PLD_TH << 9) + (PLD_RE << 8) + (PLD_SOR << 7) + (PLD_BEM << 6) + (PLD_PEN << 5)) |
||||
|
||||
/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ |
||||
#define PLD_BS 0 /* 1 MByte */ |
||||
/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */ |
||||
#define PLD_BU 3 /* R/W */ |
||||
/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */ |
||||
#define PLD_BW 0 /* 16Bit */ |
||||
#define PLD_CR ((PER_PLD_ADDR & 0xfff00000) + (PLD_BS << 17) + (PLD_BU << 15) + (PLD_BW << 13)) |
||||
|
||||
|
||||
/* timings */ |
||||
|
||||
#define PER_BOARD_ADDR (PER_UART1_ADDR+(1024*1024)) |
||||
/* Dummy CS to get the board revision */ |
||||
#define BOARD_BME 0 /* Burst disable */ |
||||
#define BOARD_TWE 255 /* 255 * 30ns 120ns Waitstates (access=TWT+1+TH) */ |
||||
#define BOARD_CSN 1 /* Chipselect is driven inactive for 1 Cycle BTW transfers */ |
||||
#define BOARD_OEN 1 /* Cycles from CS low to OE low */ |
||||
#define BOARD_WBN 1 /* Cycles from CS low to WE low */ |
||||
#define BOARD_WBF 1 /* Cycles from WE high to CS high */ |
||||
#define BOARD_TH 2 /* Number of hold cycles after transfer */ |
||||
#define BOARD_RE 0 /* Ready disabled */ |
||||
#define BOARD_SOR 1 /* Sample on Ready disabled */ |
||||
#define BOARD_BEM 0 /* Byte Write only active on Write cycles */ |
||||
#define BOARD_PEN 0 /* Parity disable */ |
||||
#define BOARD_AP ((BOARD_BME << 31) + (BOARD_TWE << 23) + (BOARD_CSN << 18) + (BOARD_OEN << 16) + (BOARD_WBN << 14) + \ |
||||
(BOARD_WBF << 12) + (BOARD_TH << 9) + (BOARD_RE << 8) + (BOARD_SOR << 7) + (BOARD_BEM << 6) + (BOARD_PEN << 5)) |
||||
|
||||
/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ |
||||
#define BOARD_BS 0 /* 1 MByte */ |
||||
/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */ |
||||
#define BOARD_BU 3 /* R/W */ |
||||
/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */ |
||||
#define BOARD_BW 0 /* 16Bit */ |
||||
#define BOARD_CR ((PER_BOARD_ADDR & 0xfff00000) + (BOARD_BS << 17) + (BOARD_BU << 15) + (BOARD_BW << 13)) |
||||
|
||||
|
||||
/* UART0 CS2 */ |
||||
#define UART0_BME 0 /* Burst disable */ |
||||
#define UART0_TWE 7 /* 7 * 30ns 210ns Waitstates (access=TWT+1+TH) */ |
||||
#define UART0_CSN 1 /* Chipselect is driven inactive for 1 Cycle BTW transfers */ |
||||
#define UART0_OEN 1 /* Cycles from CS low to OE low */ |
||||
#define UART0_WBN 1 /* Cycles from CS low to WE low */ |
||||
#define UART0_WBF 1 /* Cycles from WE high to CS high */ |
||||
#define UART0_TH 2 /* Number of hold cycles after transfer */ |
||||
#define UART0_RE 0 /* Ready disabled */ |
||||
#define UART0_SOR 1 /* Sample on Ready disabled */ |
||||
#define UART0_BEM 0 /* Byte Write only active on Write cycles */ |
||||
#define UART0_PEN 0 /* Parity disable */ |
||||
#define UART0_AP ((UART0_BME << 31) + (UART0_TWE << 23) + (UART0_CSN << 18) + (UART0_OEN << 16) + (UART0_WBN << 14) + \ |
||||
(UART0_WBF << 12) + (UART0_TH << 9) + (UART0_RE << 8) + (UART0_SOR << 7) + (UART0_BEM << 6) + (UART0_PEN << 5)) |
||||
|
||||
/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ |
||||
#define UART0_BS 0 /* 1 MByte */ |
||||
/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */ |
||||
#define UART0_BU 3 /* R/W */ |
||||
/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */ |
||||
#define UART0_BW 0 /* 8Bit */ |
||||
#define UART0_CR ((PER_UART0_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13)) |
||||
|
||||
/* UART1 CS3 */ |
||||
#define UART1_AP UART0_AP /* same timing as UART0 */ |
||||
#define UART1_CR ((PER_UART1_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13)) |
||||
|
||||
|
||||
|
||||
/* Flash CS0 or CS 1 */ |
||||
/* 0x7F8FFE80 slowest timing at all... */ |
||||
#define FLASH_BME_B 1 /* Burst enable */ |
||||
#define FLASH_FWT_B 0x6 /* 6 * 30ns 210ns First Wait Access */ |
||||
#define FLASH_BWT_B 0x6 /* 6 * 30ns 210ns Burst Wait Access */ |
||||
#define FLASH_BME 0 /* Burst disable */ |
||||
#define FLASH_TWE 0xb/* 11 * 30ns 330ns Waitstates (access=TWT+1+TH) */ |
||||
#define FLASH_CSN 0 /* Chipselect is driven inactive for 1 Cycle BTW transfers */ |
||||
#define FLASH_OEN 1 /* Cycles from CS low to OE low */ |
||||
#define FLASH_WBN 1 /* Cycles from CS low to WE low */ |
||||
#define FLASH_WBF 1 /* Cycles from WE high to CS high */ |
||||
#define FLASH_TH 2 /* Number of hold cycles after transfer */ |
||||
#define FLASH_RE 0 /* Ready disabled */ |
||||
#define FLASH_SOR 1 /* Sample on Ready disabled */ |
||||
#define FLASH_BEM 0 /* Byte Write only active on Write cycles */ |
||||
#define FLASH_PEN 0 /* Parity disable */ |
||||
/* Access Parameter Register for non Boot */ |
||||
#define FLASH_AP ((FLASH_BME << 31) + (FLASH_TWE << 23) + (FLASH_CSN << 18) + (FLASH_OEN << 16) + (FLASH_WBN << 14) + \ |
||||
(FLASH_WBF << 12) + (FLASH_TH << 9) + (FLASH_RE << 8) + (FLASH_SOR << 7) + (FLASH_BEM << 6) + (FLASH_PEN << 5)) |
||||
/* Access Parameter Register for Boot */ |
||||
#define FLASH_AP_B ((FLASH_BME_B << 31) + (FLASH_FWT_B << 26) + (FLASH_BWT_B << 23) + (FLASH_CSN << 18) + (FLASH_OEN << 16) + (FLASH_WBN << 14) + \ |
||||
(FLASH_WBF << 12) + (FLASH_TH << 9) + (FLASH_RE << 8) + (FLASH_SOR << 7) + (FLASH_BEM << 6) + (FLASH_PEN << 5)) |
||||
|
||||
/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ |
||||
#define FLASH_BS 2 /* 4 MByte */ |
||||
/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */ |
||||
#define FLASH_BU 3 /* R/W */ |
||||
/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */ |
||||
#define FLASH_BW 1 /* 16Bit */ |
||||
/* CR register for Boot */ |
||||
#define FLASH_CR_B ((FLASH_BASE0_PRELIM & 0xfff00000) + (FLASH_BS << 17) + (FLASH_BU << 15) + (FLASH_BW << 13)) |
||||
/* CR register for non Boot */ |
||||
#define FLASH_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (FLASH_BS << 17) + (FLASH_BU << 15) + (FLASH_BW << 13)) |
||||
|
||||
/* MPS CS1 or CS0 */ |
||||
/* Boot CS: */ |
||||
#define MPS_BME_B 1 /* Burst enable */ |
||||
#define MPS_FWT_B 0x6/* 6 * 30ns 210ns First Wait Access */ |
||||
#define MPS_BWT_B 0x6 /* 6 * 30ns 210ns Burst Wait Access */ |
||||
#define MPS_BME 0 /* Burst disable */ |
||||
#define MPS_TWE 0xb/* 11 * 30ns 330ns Waitstates (access=TWT+1+TH) */ |
||||
#define MPS_CSN 0 /* Chipselect is driven inactive for 1 Cycle BTW transfers */ |
||||
#define MPS_OEN 1 /* Cycles from CS low to OE low */ |
||||
#define MPS_WBN 1 /* Cycles from CS low to WE low */ |
||||
#define MPS_WBF 1 /* Cycles from WE high to CS high */ |
||||
#define MPS_TH 2 /* Number of hold cycles after transfer */ |
||||
#define MPS_RE 0 /* Ready disabled */ |
||||
#define MPS_SOR 1 /* Sample on Ready disabled */ |
||||
#define MPS_BEM 0 /* Byte Write only active on Write cycles */ |
||||
#define MPS_PEN 0 /* Parity disable */ |
||||
/* Access Parameter Register for non Boot */ |
||||
#define MPS_AP ((MPS_BME << 31) + (MPS_TWE << 23) + (MPS_CSN << 18) + (MPS_OEN << 16) + (MPS_WBN << 14) + \ |
||||
(MPS_WBF << 12) + (MPS_TH << 9) + (MPS_RE << 8) + (MPS_SOR << 7) + (MPS_BEM << 6) + (MPS_PEN << 5)) |
||||
/* Access Parameter Register for Boot */ |
||||
#define MPS_AP_B ((MPS_BME_B << 31) + (MPS_FWT_B << 26) + (MPS_BWT_B << 23) + (MPS_CSN << 18) + (MPS_OEN << 16) + (MPS_WBN << 14) + \ |
||||
(MPS_WBF << 12) + (MPS_TH << 9) + (MPS_RE << 8) + (MPS_SOR << 7) + (MPS_BEM << 6) + (MPS_PEN << 5)) |
||||
|
||||
/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ |
||||
#define MPS_BS 2 /* 4 MByte */ |
||||
/* Usage: 0=disabled, 1=Read only, 2=Write Only, 3=R/W */ |
||||
#define MPS_BU 3 /* R/W */ |
||||
/* Bus width: 0=8Bit, 1=16Bit, 2=32Bit, 3=Reserved */ |
||||
#define MPS_BW 0 /* 8Bit */ |
||||
/* CR register for Boot */ |
||||
#define MPS_CR_B ((FLASH_BASE0_PRELIM & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) |
||||
/* CR register for non Boot */ |
||||
#define MPS_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) |
||||
|
||||
|
||||
|
||||
@ -0,0 +1,53 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
/****************************************************************************
|
||||
* Global routines used for PIP405 |
||||
*****************************************************************************/ |
||||
|
||||
|
||||
extern int mem_test(unsigned long start, unsigned long ramsize,int mode); |
||||
|
||||
void print_pip405_info(void); |
||||
|
||||
void user_led0(unsigned char on); |
||||
void user_led1(unsigned char on); |
||||
|
||||
|
||||
#define PLD_BASE_ADDRESS CFG_ISA_IO_BASE_ADDRESS + 0x800 |
||||
#define PLD_PART_REG PLD_BASE_ADDRESS + 0 |
||||
#define PLD_VERS_REG PLD_BASE_ADDRESS + 1 |
||||
#define PLD_BOARD_CFG_REG PLD_BASE_ADDRESS + 2 |
||||
#define PLD_LED_USER_REG PLD_BASE_ADDRESS + 3 |
||||
#define PLD_SYS_MAN_REG PLD_BASE_ADDRESS + 4 |
||||
#define PLD_FLASH_COM_REG PLD_BASE_ADDRESS + 5 |
||||
#define PLD_CAN_REG PLD_BASE_ADDRESS + 6 |
||||
#define PLD_SER_PWR_REG PLD_BASE_ADDRESS + 7 |
||||
#define PLD_COM_PWR_REG PLD_BASE_ADDRESS + 8 |
||||
#define PLD_NIC_VGA_REG PLD_BASE_ADDRESS + 9 |
||||
#define PLD_SCSI_RST_REG PLD_BASE_ADDRESS + 0xA |
||||
|
||||
#define PIIX4_VENDOR_ID 0x8086 |
||||
#define PIIX4_IDE_DEV_ID 0x7111 |
||||
|
||||
|
||||
@ -0,0 +1,40 @@ |
||||
#
|
||||
# (C) Copyright 2001
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS = $(BOARD).o flash.o
|
||||
|
||||
$(LIB): .depend $(OBJS) |
||||
$(AR) crv $@ $^
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
||||
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
||||
|
||||
sinclude .depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,123 @@ |
||||
/* |
||||
* (C) Copyright 2001 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
cpu/mpc8xx/start.o (.text) |
||||
common/environment.o(.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x00FF) & 0xFFFFFF00; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(256); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(256); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
||||
|
||||
@ -0,0 +1,293 @@ |
||||
typedef unsigned char uint8; |
||||
typedef unsigned short uint16; |
||||
typedef unsigned int uint32; |
||||
typedef volatile unsigned char vuint8; |
||||
typedef volatile unsigned short vuint16; |
||||
typedef volatile unsigned int vuint32; |
||||
|
||||
|
||||
#define DPRAM_ATM CFG_IMMR + 0x3000 |
||||
|
||||
#define ATM_DPRAM_BEGIN (DPRAM_ATM - CFG_IMMR - 0x2000) |
||||
#define NUM_CONNECTIONS 1 |
||||
#define SAR_RXB_SIZE 1584 |
||||
#define AM_HMASK 0x0FFFFFF0 |
||||
|
||||
#define NUM_CT_ENTRIES (NUM_CONNECTIONS) |
||||
#define NUM_TCTE_ENTRIES (NUM_CONNECTIONS) |
||||
#define NUM_AM_ENTRIES (NUM_CONNECTIONS+1) |
||||
#define NUM_AP_ENTRIES (NUM_CONNECTIONS+1) |
||||
#define NUM_MPHYPT_ENTRIES 1 |
||||
#define NUM_APCP_ENTRIES 1 |
||||
#define NUM_APCT_PRIO_1_ENTRIES 146 /* Determines minimum rate */ |
||||
#define NUM_TQ_ENTRIES 12 |
||||
|
||||
#define SIZE_OF_CT_ENTRY 64 |
||||
#define SIZE_OF_TCTE_ENTRY 32 |
||||
#define SIZE_OF_AM_ENTRY 4 |
||||
#define SIZE_OF_AP_ENTRY 2 |
||||
#define SIZE_OF_MPHYPT_ENTRY 2 |
||||
#define SIZE_OF_APCP_ENTRY 32 |
||||
#define SIZE_OF_APCT_ENTRY 2 |
||||
#define SIZE_OF_TQ_ENTRY 2 |
||||
|
||||
#define CT_BASE ((ATM_DPRAM_BEGIN + 63) & 0xFFC0) /*64*/ |
||||
#define TCTE_BASE (CT_BASE + NUM_CT_ENTRIES * SIZE_OF_CT_ENTRY) /*32*/ |
||||
#define APCP_BASE (TCTE_BASE + NUM_TCTE_ENTRIES * SIZE_OF_TCTE_ENTRY) /*32*/ |
||||
#define AM_BEGIN (APCP_BASE + NUM_APCP_ENTRIES * SIZE_OF_APCP_ENTRY) /*4*/ |
||||
#define AM_BASE (AM_BEGIN + (NUM_AM_ENTRIES - 1) * SIZE_OF_AM_ENTRY) |
||||
#define AP_BEGIN (AM_BEGIN + NUM_AM_ENTRIES * SIZE_OF_AM_ENTRY) /*2*/ |
||||
#define AP_BASE (AP_BEGIN + (NUM_AP_ENTRIES - 1) * SIZE_OF_AP_ENTRY) |
||||
#define MPHYPT_BASE (AP_BEGIN + NUM_AP_ENTRIES * SIZE_OF_AP_ENTRY) /*2*/ |
||||
#define APCT_PRIO_1_BASE (MPHYPT_BASE + NUM_MPHYPT_ENTRIES * SIZE_OF_MPHYPT_ENTRY) /*2*/ |
||||
#define TQ_BASE (APCT_PRIO_1_BASE + NUM_APCT_PRIO_1_ENTRIES * SIZE_OF_APCT_ENTRY) /*2*/ |
||||
#define ATM_DPRAM_SIZE ((TQ_BASE + NUM_TQ_ENTRIES * SIZE_OF_TQ_ENTRY) - ATM_DPRAM_BEGIN) |
||||
|
||||
#define CT_PTR(base) ((struct ct_entry_t *)((char *)(base) + 0x2000 + CT_BASE)) |
||||
#define TCTE_PTR(base) ((struct tcte_entry_t *)((char *)(base) + 0x2000 + TCTE_BASE)) |
||||
#define AM_PTR(base) ((uint32 *)((char *)(base) + 0x2000 + AM_BASE)) |
||||
#define AP_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + AP_BASE)) |
||||
#define MPHYPT_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + MPHYPT_BASE)) |
||||
#define APCP_PTR(base) ((struct apc_params_t *)((char*)(base) + 0x2000 + APCP_BASE)) |
||||
#define APCT1_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_1_BASE)) |
||||
#define APCT2_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_2_BASE)) |
||||
#define APCT3_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_3_BASE)) |
||||
#define TQ_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + TQ_BASE)) |
||||
|
||||
/* SAR registers */ |
||||
#define RBDBASE(base) ((vuint32 *)(base + 0x3F00)) /* Base address of RxBD-List */ |
||||
#define SRFCR(base) ((vuint8 *)(base + 0x3F04)) /* DMA Receive function code */ |
||||
#define SRSTATE(base) ((vuint8 *)(base + 0x3F05)) /* DMA Receive status */ |
||||
#define MRBLR(base) ((vuint16 *)(base + 0x3F06)) /* Init to 0 for ATM */ |
||||
#define RSTATE(base) ((vuint32 *)(base + 0x3F08)) /* Do not write to */ |
||||
#define R_CNT(base) ((vuint16 *)(base + 0x3F10)) /* Do not write to */ |
||||
#define STFCR(base) ((vuint8 *)(base + 0x3F12)) /* DMA Transmit function code */ |
||||
#define STSTATE(base) ((vuint8 *)(base + 0x3F13)) /* DMA Transmit status */ |
||||
#define TBDBASE(base) ((vuint32 *)(base + 0x3F14)) /* Base address of TxBD-List */ |
||||
#define TSTATE(base) ((vuint32 *)(base + 0x3F18)) /* Do not write to */ |
||||
#define COMM_CH(base) ((vuint16 *)(base + 0x3F1C)) /* Command channel */ |
||||
#define STCHNUM(base) ((vuint16 *)(base + 0x3F1E)) /* Do not write to */ |
||||
#define T_CNT(base) ((vuint16 *)(base + 0x3F20)) /* Do not write to */ |
||||
#define CTBASE(base) ((vuint16 *)(base + 0x3F22)) /* Base address of Connection-table */ |
||||
#define ECTBASE(base) ((vuint32 *)(base + 0x3F24)) /* Valid only for external Conn.-table */ |
||||
#define INTBASE(base) ((vuint32 *)(base + 0x3F28)) /* Base address of Interrupt-table */ |
||||
#define INTPTR(base) ((vuint32 *)(base + 0x3F2C)) /* Pointer to Interrupt-queue */ |
||||
#define C_MASK(base) ((vuint32 *)(base + 0x3F30)) /* CRC-mask */ |
||||
#define SRCHNUM(base) ((vuint16 *)(base + 0x3F34)) /* Do not write to */ |
||||
#define INT_CNT(base) ((vuint16 *)(base + 0x3F36)) /* Interrupt-Counter */ |
||||
#define INT_ICNT(base) ((vuint16 *)(base + 0x3F38)) /* Interrupt threshold */ |
||||
#define TSTA(base) ((vuint16 *)(base + 0x3F3A)) /* Time-stamp-address */ |
||||
#define OLDLEN(base) ((vuint16 *)(base + 0x3F3C)) /* Do not write to */ |
||||
#define SMRBLR(base) ((vuint16 *)(base + 0x3F3E)) /* SAR max RXBuffer length */ |
||||
#define EHEAD(base) ((vuint32 *)(base + 0x3F40)) /* Valid for serial mode */ |
||||
#define EPAYLOAD(base) ((vuint32 *)(base + 0x3F44)) /* Valid for serial mode */ |
||||
#define TQBASE(base) ((vuint16 *)(base + 0x3F48)) /* Base address of Tx queue */ |
||||
#define TQEND(base) ((vuint16 *)(base + 0x3F4A)) /* End address of Tx queue */ |
||||
#define TQAPTR(base) ((vuint16 *)(base + 0x3F4C)) /* TQ APC pointer */ |
||||
#define TQTPTR(base) ((vuint16 *)(base + 0x3F4E)) /* TQ Tx pointer */ |
||||
#define APCST(base) ((vuint16 *)(base + 0x3F50)) /* APC status */ |
||||
#define APCPTR(base) ((vuint16 *)(base + 0x3F52)) /* APC parameter pointer */ |
||||
#define HMASK(base) ((vuint32 *)(base + 0x3F54)) /* Header mask */ |
||||
#define AMBASE(base) ((vuint16 *)(base + 0x3F58)) /* Address match table base */ |
||||
#define AMEND(base) ((vuint16 *)(base + 0x3F5A)) /* Address match table end */ |
||||
#define APBASE(base) ((vuint16 *)(base + 0x3F5C)) /* Address match parameter */ |
||||
#define FLBASE(base) ((vuint32 *)(base + 0x3F54)) /* First-level table base */ |
||||
#define SLBASE(base) ((vuint32 *)(base + 0x3F58)) /* Second-level table base */ |
||||
#define FLMASK(base) ((vuint16 *)(base + 0x3F5C)) /* First-level mask */ |
||||
#define ECSIZE(base) ((vuint16 *)(base + 0x3F5E)) /* Valid for extended mode */ |
||||
#define APCT_REAL(base) ((vuint32 *)(base + 0x3F60)) /* APC 32 bit counter */ |
||||
#define R_PTR(base) ((vuint32 *)(base + 0x3F64)) /* Do not write to */ |
||||
#define RTEMP(base) ((vuint32 *)(base + 0x3F68)) /* Do not write to */ |
||||
#define T_PTR(base) ((vuint32 *)(base + 0x3F6C)) /* Do not write to */ |
||||
#define TTEMP(base) ((vuint32 *)(base + 0x3F70)) /* Do not write to */ |
||||
|
||||
/* ESAR registers */ |
||||
#define FMCTIMESTMP(base) ((vuint32 *)(base + 0x3F80)) /* Perf.Mon.Timestamp */ |
||||
#define FMCTEMPLATE(base) ((vuint32 *)(base + 0x3F84)) /* Perf.Mon.Template */ |
||||
#define PMPTR(base) ((vuint16 *)(base + 0x3F88)) /* Perf.Mon.Table */ |
||||
#define PMCHANNEL(base) ((vuint16 *)(base + 0x3F8A)) /* Perf.Mon.Channel */ |
||||
#define MPHYST(base) ((vuint16 *)(base + 0x3F90)) /* Multi-PHY Status */ |
||||
#define TCTEBASE(base) ((vuint16 *)(base + 0x3F92)) /* Internal TCT Extension Base */ |
||||
#define ETCTEBASE(base) ((vuint32 *)(base + 0x3F94)) /* External TCT Extension Base */ |
||||
#define COMM_CH2(base) ((vuint32 *)(base + 0x3F98)) /* 2nd command channel word */ |
||||
#define STATBASE(base) ((vuint16 *)(base + 0x3F9C)) /* Statistics table pointer */ |
||||
|
||||
/* UTOPIA Mode Register */ |
||||
#define UTMODE(base) (CAST(vuint32 *)(base + 0x0978)) |
||||
|
||||
/* SAR commands */ |
||||
#define TRANSMIT_CHANNEL_ACTIVATE_CMD 0x0FC1 |
||||
#define TRANSMIT_CHANNEL_DEACTIVATE_CMD 0x1FC1 |
||||
#define STOP_TRANSMIT_CMD 0x2FC1 |
||||
#define RESTART_TRANSMIT_CMD 0x3FC1 |
||||
#define STOP_RECEIVE_CMD 0x4FC1 |
||||
#define RESTART_RECEIVE_CMD 0x5FC1 |
||||
#define APC_BYPASS_CMD 0x6FC1 |
||||
#define MEM_WRITE_CMD 0x7FC1 |
||||
#define CPCR_FLG 0x0001 |
||||
|
||||
/* INT flags */ |
||||
#define INT_VALID 0x80000000 |
||||
#define INT_WRAP 0x40000000 |
||||
#define INT_APCO 0x00800000 |
||||
#define INT_TQF 0x00200000 |
||||
#define INT_RXF 0x00080000 |
||||
#define INT_BSY 0x00040000 |
||||
#define INT_TXB 0x00020000 |
||||
#define INT_RXB 0x00010000 |
||||
|
||||
#define NUM_INT_ENTRIES 80 |
||||
#define SIZE_OF_INT_ENTRY 4 |
||||
|
||||
struct apc_params_t |
||||
{ |
||||
vuint16 apct_base1; /* APC Table - First Priority Base pointer */ |
||||
vuint16 apct_end1; /* First APC Table - Length */ |
||||
vuint16 apct_ptr1; /* First APC Table Pointer */ |
||||
vuint16 apct_sptr1; /* APC Table First Priority Service pointer */ |
||||
vuint16 etqbase; /* Enhanced Transmit Queue Base pointer */ |
||||
vuint16 etqend; /* Enhanced Transmit Queue End pointer */ |
||||
vuint16 etqaptr; /* Enhanced Transmit Queue APC pointer */ |
||||
vuint16 etqtptr; /* Enhanced Transmit Queue Transmitter pointer */ |
||||
vuint16 apc_mi; /* APC - Max Iteration */ |
||||
vuint16 ncits; /* Number of Cells In TimeSlot */ |
||||
vuint16 apcnt; /* APC - N Timer */ |
||||
vuint16 reserved1; /* reserved */ |
||||
vuint16 eapcst; /* APC status */ |
||||
vuint16 ptp_counter; /* PTP queue length */ |
||||
vuint16 ptp_txch; /* PTP channel */ |
||||
vuint16 reserved2; /* reserved */ |
||||
}; |
||||
|
||||
struct ct_entry_t |
||||
{ |
||||
/* RCT */ |
||||
unsigned fhnt : 1; |
||||
unsigned pm_rct : 1; |
||||
unsigned reserved0 : 6; |
||||
unsigned hec : 1; |
||||
unsigned clp : 1; |
||||
unsigned cng_ncrc : 1; |
||||
unsigned inf_rct : 1; |
||||
unsigned cngi_ptp : 1; |
||||
unsigned cdis_rct : 1; |
||||
unsigned aal_rct : 2; |
||||
uint16 rbalen; |
||||
uint32 rcrc; |
||||
uint32 rb_ptr; |
||||
uint16 rtmlen; |
||||
uint16 rbd_ptr; |
||||
uint16 rbase; |
||||
uint16 tstamp; |
||||
uint16 imask; |
||||
unsigned ft : 2; |
||||
unsigned nim : 1; |
||||
unsigned reserved1 : 2; |
||||
unsigned rpmt : 6; |
||||
unsigned reserved2 : 5; |
||||
uint8 reserved3[8]; |
||||
/* TCT */ |
||||
unsigned reserved4 : 1; |
||||
unsigned pm_tct : 1; |
||||
unsigned reserved5 : 6; |
||||
unsigned pc : 1; |
||||
unsigned reserved6 : 2; |
||||
unsigned inf_tct : 1; |
||||
unsigned cr10 : 1; |
||||
unsigned cdis_tct : 1; |
||||
unsigned aal_tct : 2; |
||||
uint16 tbalen; |
||||
uint32 tcrc; |
||||
uint32 tb_ptr; |
||||
uint16 ttmlen; |
||||
uint16 tbd_ptr; |
||||
uint16 tbase; |
||||
unsigned reserved7 : 5; |
||||
unsigned tpmt : 6; |
||||
unsigned reserved8 : 3; |
||||
unsigned avcf : 1; |
||||
unsigned act : 1; |
||||
uint32 chead; |
||||
uint16 apcl; |
||||
uint16 apcpr; |
||||
unsigned out : 1; |
||||
unsigned bnr : 1; |
||||
unsigned tservice : 2; |
||||
unsigned apcp : 12; |
||||
uint16 apcpf; |
||||
}; |
||||
|
||||
struct tcte_entry_t |
||||
{ |
||||
unsigned res1 : 4; |
||||
unsigned scr : 12; |
||||
uint16 scrf; |
||||
uint16 bt; |
||||
uint16 buptrh; |
||||
uint32 buptrl; |
||||
unsigned vbr2 : 1; |
||||
unsigned res2 : 15; |
||||
uint16 oobr; |
||||
uint16 res3[8]; |
||||
}; |
||||
|
||||
#define SIZE_OF_RBD 12 |
||||
#define SIZE_OF_TBD 12 |
||||
|
||||
struct atm_bd_t |
||||
{ |
||||
vuint16 flags; |
||||
vuint16 length; |
||||
unsigned char * buffer_ptr; |
||||
vuint16 cpcs_uu_cpi; |
||||
vuint16 reserved; |
||||
}; |
||||
|
||||
/* BD flags */ |
||||
#define EMPTY 0x8000 |
||||
#define READY 0x8000 |
||||
#define WRAP 0x2000 |
||||
#define INTERRUPT 0x1000 |
||||
#define LAST 0x0800 |
||||
#define FIRST 0x0400 |
||||
#define OAM 0x0400 |
||||
#define CONTINUOUS 0x0200 |
||||
#define HEC_ERROR 0x0080 |
||||
#define CELL_LOSS 0x0040 |
||||
#define CONGESTION 0x0020 |
||||
#define ABORT 0x0010 |
||||
#define LEN_ERROR 0x0002 |
||||
#define CRC_ERROR 0x0001 |
||||
|
||||
struct atm_connection_t |
||||
{ |
||||
struct atm_bd_t * rbd_ptr; |
||||
int num_rbd; |
||||
struct atm_bd_t * tbd_ptr; |
||||
int num_tbd; |
||||
struct ct_entry_t * ct_ptr; |
||||
struct tcte_entry_t * tcte_ptr; |
||||
void * drv; |
||||
void (* notify)(void * drv, int event); |
||||
}; |
||||
|
||||
struct atm_driver_t |
||||
{ |
||||
int loaded; |
||||
int started; |
||||
char * csram; |
||||
int csram_size; |
||||
uint32 * am_top; |
||||
uint16 * ap_top; |
||||
uint32 * int_reload_ptr; |
||||
uint32 * int_serv_ptr; |
||||
struct atm_bd_t * rbd_base_ptr; |
||||
struct atm_bd_t * tbd_base_ptr; |
||||
unsigned linerate_in_bps; |
||||
}; |
||||
|
||||
extern struct atm_connection_t g_conn[NUM_CONNECTIONS]; |
||||
extern struct atm_driver_t g_atm; |
||||
|
||||
extern int atmLoad(void); |
||||
extern void atmUnload(void); |
||||
@ -0,0 +1,171 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#ifndef _PART_CD_H |
||||
#define _PART_CD_H |
||||
|
||||
#define BRVD 0x11 |
||||
#define PVD_OFFSET 0x10 |
||||
|
||||
|
||||
typedef struct iso_boot_rec { |
||||
unsigned char desctype; /* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supplement, 3 = volume part 0xff trminator */ |
||||
unsigned char stand_ident[5]; /* "CD001" */ |
||||
unsigned char vers; /* Version */ |
||||
char ident_str[0x20]; /* Ident String "EL TORITO SPECIFICATION" */ |
||||
unsigned char unused[0x20]; /* unused */ |
||||
unsigned char pointer[4]; /* absolute pointer to Boot Catalog */ |
||||
} iso_boot_rec_t; |
||||
|
||||
|
||||
typedef struct iso_pri_rec { |
||||
unsigned char desctype; /* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supplement, 3 = volume part 0xff trminator */ |
||||
unsigned char stand_ident[5]; /* "CD001" */ |
||||
unsigned char vers; /* Version */ |
||||
unsigned char unused; |
||||
char sysid[32]; /* system Identifier */ |
||||
char volid[32]; /* volume Identifier */ |
||||
unsigned char zeros1[8]; /* unused */ |
||||
unsigned long volsiz_LE; /* volume size Little Endian */ |
||||
unsigned long volsiz_BE; /* volume size Big Endian */ |
||||
unsigned char zeros2[32]; /* unused */ |
||||
unsigned short setsize_LE; /* volume set size LE */ |
||||
unsigned short setsize_BE; /* volume set size BE */ |
||||
unsigned short seqnum_LE; /* volume sequence number LE */ |
||||
unsigned short seqnum_BE; /* volume sequence number BE */ |
||||
unsigned short secsize_LE; /* sector size LE */ |
||||
unsigned short secsize_BE; /* sector size BE */ |
||||
unsigned long pathtablen_LE;/* Path Table size LE */ |
||||
unsigned long pathtablen_BE;/* Path Table size BE */ |
||||
unsigned long firstsek_LEpathtab1_LE; /* location of first occurrence of little endian type path table */ |
||||
unsigned long firstsek_LEpathtab2_LE; /* location of optional occurrence of little endian type path table */ |
||||
unsigned long firstsek_BEpathtab1_BE; /* location of first occurrence of big endian type path table */ |
||||
unsigned long firstsek_BEpathtab2_BE; /* location of optional occurrence of big endian type path table */ |
||||
unsigned char rootdir[34]; /* directory record for root dir */ |
||||
char volsetid[128];/* Volume set identifier */ |
||||
char pubid[128]; /* Publisher identifier */ |
||||
char dataprepid[128]; /* data preparer identifier */ |
||||
char appid[128]; /* application identifier */ |
||||
char copyr[37]; /* copyright string */ |
||||
char abstractfileid[37]; /* abstract file identifier */ |
||||
char bibliofileid[37]; /* bibliographic file identifier */ |
||||
unsigned char creationdate[17]; /* creation date */ |
||||
unsigned char modify[17]; /* modification date */ |
||||
unsigned char expire[17]; /* expiring date */ |
||||
unsigned char effective[17];/* effective date */ |
||||
unsigned char filestruc_ver; /* file structur version */ |
||||
} iso_pri_rec_t; |
||||
|
||||
typedef struct iso_sup_rec { |
||||
unsigned char desctype; /* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supplement, 3 = volume part 0xff trminator */ |
||||
unsigned char stand_ident[5]; /* "CD001" */ |
||||
unsigned char vers; /* Version */ |
||||
unsigned char volumeflags; /* if bit 0 = 0 => all escape sequences are according ISO 2375 */ |
||||
char sysid[32]; /* system Identifier */ |
||||
char volid[32]; /* volume Identifier */ |
||||
unsigned char zeros1[8]; /* unused */ |
||||
unsigned long volsiz_LE; /* volume size Little Endian */ |
||||
unsigned long volsiz_BE; /* volume size Big Endian */ |
||||
unsigned char escapeseq[32];/* Escape sequences */ |
||||
unsigned short setsize_LE; /* volume set size LE */ |
||||
unsigned short setsize_BE; /* volume set size BE */ |
||||
unsigned short seqnum_LE; /* volume sequence number LE */ |
||||
unsigned short seqnum_BE; /* volume sequence number BE */ |
||||
unsigned short secsize_LE; /* sector size LE */ |
||||
unsigned short secsize_BE; /* sector size BE */ |
||||
unsigned long pathtablen_LE;/* Path Table size LE */ |
||||
unsigned long pathtablen_BE;/* Path Table size BE */ |
||||
unsigned long firstsek_LEpathtab1_LE; /* location of first occurrence of little endian type path table */ |
||||
unsigned long firstsek_LEpathtab2_LE; /* location of optional occurrence of little endian type path table */ |
||||
unsigned long firstsek_BEpathtab1_BE; /* location of first occurrence of big endian type path table */ |
||||
unsigned long firstsek_BEpathtab2_BE; /* location of optional occurrence of big endian type path table */ |
||||
unsigned char rootdir[34]; /* directory record for root dir */ |
||||
char volsetid[128];/* Volume set identifier */ |
||||
char pubid[128]; /* Publisher identifier */ |
||||
char dataprepid[128]; /* data preparer identifier */ |
||||
char appid[128]; /* application identifier */ |
||||
char copyr[37]; /* copyright string */ |
||||
char abstractfileid[37]; /* abstract file identifier */ |
||||
char bibliofileid[37]; /* bibliographic file identifier */ |
||||
unsigned char creationdate[17]; /* creation date */ |
||||
unsigned char modify[17]; /* modification date */ |
||||
unsigned char expire[17]; /* expiring date */ |
||||
unsigned char effective[17];/* effective date */ |
||||
unsigned char filestruc_ver; /* file structur version */ |
||||
}iso_sup_rec_t; |
||||
|
||||
typedef struct iso_part_rec { |
||||
unsigned char desctype; /* type of Volume descriptor: 0 = boot record, 1 = primary, 2 = Supplement, 3 = volume part 0xff trminator */ |
||||
unsigned char stand_ident[5]; /* "CD001" */ |
||||
unsigned char vers; /* Version */ |
||||
unsigned char unused; |
||||
char sysid[32]; /* system Identifier */ |
||||
char volid[32]; /* volume partition Identifier */ |
||||
unsigned long partloc_LE; /* volume partition location LE */ |
||||
unsigned long partloc_BE; /* volume partition location BE */ |
||||
unsigned long partsiz_LE; /* volume partition size LE */ |
||||
unsigned long partsiz_BE; /* volume partition size BE */ |
||||
}iso_part_rec_t; |
||||
|
||||
|
||||
|
||||
|
||||
typedef struct iso_val_entry { |
||||
unsigned char header_id; /* Header ID must be 0x01 */ |
||||
unsigned char platform; /* Platform: 0=x86, 1=PowerPC, 2=MAC */ |
||||
unsigned char res[2]; /* reserved */ |
||||
char manu_str[0x18]; /* Ident String of manufacturer/developer */ |
||||
unsigned char chk_sum[2]; /* Check sum (all words must be zero) */ |
||||
unsigned char key[2]; /* key[0]=55, key[1]=0xAA */ |
||||
} iso_val_entry_t; |
||||
|
||||
typedef struct iso_header_entry { |
||||
unsigned char header_id; /* Header ID must be 0x90 or 0x91 */ |
||||
unsigned char platform; /* Platform: 0=x86, 1=PowerPC, 2=MAC */ |
||||
unsigned char numentry[2]; /* number of entries */ |
||||
char id_str[0x1C]; /* Ident String of sectionr */ |
||||
} iso_header_entry_t; |
||||
|
||||
|
||||
typedef struct iso_init_def_entry { |
||||
unsigned char boot_ind; /* Boot indicator 0x88=bootable 0=not bootable */ |
||||
unsigned char boot_media; /* boot Media Type: 0=no Emulation, 1=1.2MB floppy, 2=1.44MB floppy, 3=2.88MB floppy 4=hd (0x80) */ |
||||
unsigned char ld_seg[2]; /* Load segment (flat model=addr/10) */ |
||||
unsigned char systype; /* System Type copy of byte5 of part table */ |
||||
unsigned char res; /* reserved */ |
||||
unsigned char sec_cnt[2]; /* sector count in VIRTUAL Blocks (0x200) */ |
||||
unsigned char rel_block_addr[4]; /* relative Block address */ |
||||
} iso_init_def_entry_t; |
||||
|
||||
|
||||
void print_partition_cd(int dev); |
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* _PART_CD_H */ |
||||
|
||||
|
||||
@ -0,0 +1,30 @@ |
||||
#
|
||||
# (C) Copyright 2000, 2001
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
#
|
||||
|
||||
SUBDIRS := jffs2
|
||||
|
||||
.depend all: |
||||
@for dir in $(SUBDIRS) ; do \
|
||||
$(MAKE) -C $$dir $@ ; done
|
||||
|
||||
@ -0,0 +1,47 @@ |
||||
#
|
||||
# (C) Copyright 2000, 2001
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = libjffs2.a
|
||||
|
||||
AOBJS =
|
||||
COBJS = jffs2_1pass.o compr_rtime.o compr_rubin.o compr_zlib.o mini_inflate.o
|
||||
OBJS = $(AOBJS) $(COBJS)
|
||||
|
||||
#CPPFLAGS +=
|
||||
|
||||
all: $(LIB) $(AOBJS) |
||||
|
||||
$(LIB): .depend $(OBJS) |
||||
$(AR) crv $@ $(OBJS)
|
||||
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c) |
||||
$(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
|
||||
|
||||
sinclude .depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,42 @@ |
||||
/* $Id$ */ |
||||
|
||||
#ifndef _BEDBUG_H |
||||
#define _BEDBUG_H |
||||
|
||||
#ifndef NULL |
||||
#define NULL 0 |
||||
#endif |
||||
|
||||
#define _USE_PROTOTYPES |
||||
|
||||
#ifndef isblank |
||||
#define isblank(c) isspace((int)(c)) |
||||
#endif |
||||
|
||||
#ifndef __P |
||||
#if defined(_USE_PROTOTYPES) && (defined(__STDC__) || defined(__cplusplus)) |
||||
#define __P(protos) protos /* full-blown ANSI C */ |
||||
#else |
||||
#define __P(protos) () /* traditional C preprocessor */ |
||||
#endif |
||||
#endif |
||||
|
||||
#define assert( condition ) if( (condition) ) _exit(0) |
||||
|
||||
#endif /* _BEDBUG_H */ |
||||
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001 William L. Pitts |
||||
* All rights reserved. |
||||
* |
||||
* Redistribution and use in source and binary forms are freely |
||||
* permitted provided that the above copyright notice and this |
||||
* paragraph and the following disclaimer are duplicated in all |
||||
* such forms. |
||||
* |
||||
* This software is provided "AS IS" and without any express or |
||||
* implied warranties, including, without limitation, the implied |
||||
* warranties of merchantability and fitness for a particular |
||||
* purpose. |
||||
*/ |
||||
@ -0,0 +1,403 @@ |
||||
/* $Id$ */ |
||||
|
||||
#ifndef _REGS_H |
||||
#define _REGS_H |
||||
|
||||
/* Special Purpose Registers */ |
||||
|
||||
#define SPR_CR -1 |
||||
#define SPR_MSR -2 |
||||
|
||||
#define SPR_XER 1 |
||||
#define SPR_LR 8 |
||||
#define SPR_CTR 9 |
||||
#define SPR_DSISR 18 |
||||
#define SPR_DAR 19 |
||||
#define SPR_DEC 22 |
||||
#define SPR_SRR0 26 |
||||
#define SPR_SRR1 27 |
||||
#define SPR_EIE 80 |
||||
#define SPR_EID 81 |
||||
#define SPR_CMPA 144 |
||||
#define SPR_CMPB 145 |
||||
#define SPR_CMPC 146 |
||||
#define SPR_CMPD 147 |
||||
#define SPR_ICR 148 |
||||
#define SPR_DER 149 |
||||
#define SPR_COUNTA 150 |
||||
#define SPR_COUNTB 151 |
||||
#define SPR_CMPE 152 |
||||
#define SPR_CMPF 153 |
||||
#define SPR_CMPG 154 |
||||
#define SPR_CMPH 155 |
||||
#define SPR_LCTRL1 156 |
||||
#define SPR_LCTRL2 157 |
||||
#define SPR_ICTRL 158 |
||||
#define SPR_BAR 159 |
||||
#define SPR_USPRG0 256 |
||||
#define SPR_SPRG4_RO 260 |
||||
#define SPR_SPRG5_RO 261 |
||||
#define SPR_SPRG6_RO 262 |
||||
#define SPR_SPRG7_RO 263 |
||||
#define SPR_SPRG0 272 |
||||
#define SPR_SPRG1 273 |
||||
#define SPR_SPRG2 274 |
||||
#define SPR_SPRG3 275 |
||||
#define SPR_SPRG4 276 |
||||
#define SPR_SPRG5 277 |
||||
#define SPR_SPRG6 278 |
||||
#define SPR_SPRG7 279 |
||||
#define SPR_EAR 282 /* MPC603e core */ |
||||
#define SPR_TBL 284 |
||||
#define SPR_TBU 285 |
||||
#define SPR_PVR 287 |
||||
#define SPR_IC_CST 560 |
||||
#define SPR_IC_ADR 561 |
||||
#define SPR_IC_DAT 562 |
||||
#define SPR_DC_CST 568 |
||||
#define SPR_DC_ADR 569 |
||||
#define SPR_DC_DAT 570 |
||||
#define SPR_DPDR 630 |
||||
#define SPR_IMMR 638 |
||||
#define SPR_MI_CTR 784 |
||||
#define SPR_MI_AP 786 |
||||
#define SPR_MI_EPN 787 |
||||
#define SPR_MI_TWC 789 |
||||
#define SPR_MI_RPN 790 |
||||
#define SPR_MD_CTR 792 |
||||
#define SPR_M_CASID 793 |
||||
#define SPR_MD_AP 794 |
||||
#define SPR_MD_EPN 795 |
||||
#define SPR_M_TWB 796 |
||||
#define SPR_MD_TWC 797 |
||||
#define SPR_MD_RPN 798 |
||||
#define SPR_M_TW 799 |
||||
#define SPR_MI_DBCAM 816 |
||||
#define SPR_MI_DBRAM0 817 |
||||
#define SPR_MI_DBRAM1 818 |
||||
#define SPR_MD_DBCAM 824 |
||||
#define SPR_MD_DBRAM0 825 |
||||
#define SPR_MD_DBRAM1 826 |
||||
#define SPR_ZPR 944 |
||||
#define SPR_PID 945 |
||||
#define SPR_CCR0 947 |
||||
#define SPR_IAC3 948 |
||||
#define SPR_IAC4 949 |
||||
#define SPR_DVC1 950 |
||||
#define SPR_DVC2 951 |
||||
#define SPR_SGR 953 |
||||
#define SPR_DCWR 954 |
||||
#define SPR_SLER 955 |
||||
#define SPR_SU0R 956 |
||||
#define SPR_DBCR1 957 |
||||
#define SPR_ICDBDR 979 |
||||
#define SPR_ESR 980 |
||||
#define SPR_DEAR 981 |
||||
#define SPR_EVPR 982 |
||||
#define SPR_TSR 984 |
||||
#define SPR_TCR 986 |
||||
#define SPR_PIT 987 |
||||
#define SPR_SRR2 990 |
||||
#define SPR_SRR3 991 |
||||
#define SPR_DBSR 1008 |
||||
#define SPR_DBCR0 1010 |
||||
#define SPR_IABR 1010 /* MPC603e core */ |
||||
#define SPR_IAC1 1012 |
||||
#define SPR_IAC2 1013 |
||||
#define SPR_DAC1 1014 |
||||
#define SPR_DAC2 1015 |
||||
#define SPR_DCCR 1018 |
||||
#define SPR_ICCR 1019 |
||||
|
||||
/* Bits for the DBCR0 register */ |
||||
#define DBCR0_EDM 0x80000000 |
||||
#define DBCR0_IDM 0x40000000 |
||||
#define DBCR0_RST 0x30000000 |
||||
#define DBCR0_IC 0x08000000 |
||||
#define DBCR0_BT 0x04000000 |
||||
#define DBCR0_EDE 0x02000000 |
||||
#define DBCR0_TDE 0x01000000 |
||||
#define DBCR0_IA1 0x00800000 |
||||
#define DBCR0_IA2 0x00400000 |
||||
#define DBCR0_IA12 0x00200000 |
||||
#define DBCR0_IA12X 0x00100000 |
||||
#define DBCR0_IA3 0x00080000 |
||||
#define DBCR0_IA4 0x00040000 |
||||
#define DBCR0_IA34 0x00020000 |
||||
#define DBCR0_IA34X 0x00010000 |
||||
#define DBCR0_IA12T 0x00008000 |
||||
#define DBCR0_IA34T 0x00004000 |
||||
#define DBCR0_FT 0x00000001 |
||||
|
||||
/* Bits for the DBCR1 register */ |
||||
#define DBCR1_D1R 0x80000000 |
||||
#define DBCR1_D2R 0x40000000 |
||||
#define DBCR1_D1W 0x20000000 |
||||
#define DBCR1_D2W 0x10000000 |
||||
#define DBCR1_D1S 0x0C000000 |
||||
#define DBCR1_D2S 0x03000000 |
||||
#define DBCR1_DA12 0x00800000 |
||||
#define DBCR1_DA12X 0x00400000 |
||||
#define DBCR1_DV1M 0x000C0000 |
||||
#define DBCR1_DV2M 0x00030000 |
||||
#define DBCR1_DV1BE 0x0000F000 |
||||
#define DBCR1_DV2BE 0x00000F00 |
||||
|
||||
/* Bits for the DBSR register */ |
||||
#define DBSR_IC 0x80000000 |
||||
#define DBSR_BT 0x40000000 |
||||
#define DBSR_EDE 0x20000000 |
||||
#define DBSR_TIE 0x10000000 |
||||
#define DBSR_UDE 0x08000000 |
||||
#define DBSR_IA1 0x04000000 |
||||
#define DBSR_IA2 0x02000000 |
||||
#define DBSR_DR1 0x01000000 |
||||
#define DBSR_DW1 0x00800000 |
||||
#define DBSR_DR2 0x00400000 |
||||
#define DBSR_DW2 0x00200000 |
||||
#define DBSR_IDE 0x00100000 |
||||
#define DBSR_IA3 0x00080000 |
||||
#define DBSR_IA4 0x00040000 |
||||
#define DBSR_MRR 0x00000300 |
||||
|
||||
struct spr_info { |
||||
int spr_val; |
||||
char spr_name[ 10 ]; |
||||
}; |
||||
|
||||
extern struct spr_info spr_map[]; |
||||
extern const unsigned int n_sprs; |
||||
|
||||
|
||||
#define SET_REGISTER( str, val ) \ |
||||
({ unsigned long __value = (val); \
|
||||
asm volatile( str : : "r" (__value)); \
|
||||
__value; }) |
||||
|
||||
#define GET_REGISTER( str ) \ |
||||
({ unsigned long __value; \
|
||||
asm volatile( str : "=r" (__value) : ); \
|
||||
__value; }) |
||||
|
||||
#define GET_CR() GET_REGISTER( "mfcr %0" ) |
||||
#define SET_CR(val) SET_REGISTER( "mtcr %0", val ) |
||||
#define GET_MSR() GET_REGISTER( "mfmsr %0" ) |
||||
#define SET_MSR(val) SET_REGISTER( "mtmsr %0", val ) |
||||
#define GET_XER() GET_REGISTER( "mfspr %0,1" ) |
||||
#define SET_XER(val) SET_REGISTER( "mtspr 1,%0", val ) |
||||
#define GET_LR() GET_REGISTER( "mfspr %0,8" ) |
||||
#define SET_LR(val) SET_REGISTER( "mtspr 8,%0", val ) |
||||
#define GET_CTR() GET_REGISTER( "mfspr %0,9" ) |
||||
#define SET_CTR(val) SET_REGISTER( "mtspr 9,%0", val ) |
||||
#define GET_DSISR() GET_REGISTER( "mfspr %0,18" ) |
||||
#define SET_DSISR(val) SET_REGISTER( "mtspr 18,%0", val ) |
||||
#define GET_DAR() GET_REGISTER( "mfspr %0,19" ) |
||||
#define SET_DAR(val) SET_REGISTER( "mtspr 19,%0", val ) |
||||
#define GET_DEC() GET_REGISTER( "mfspr %0,22" ) |
||||
#define SET_DEC(val) SET_REGISTER( "mtspr 22,%0", val ) |
||||
#define GET_SRR0() GET_REGISTER( "mfspr %0,26" ) |
||||
#define SET_SRR0(val) SET_REGISTER( "mtspr 26,%0", val ) |
||||
#define GET_SRR1() GET_REGISTER( "mfspr %0,27" ) |
||||
#define SET_SRR1(val) SET_REGISTER( "mtspr 27,%0", val ) |
||||
#define GET_EIE() GET_REGISTER( "mfspr %0,80" ) |
||||
#define SET_EIE(val) SET_REGISTER( "mtspr 80,%0", val ) |
||||
#define GET_EID() GET_REGISTER( "mfspr %0,81" ) |
||||
#define SET_EID(val) SET_REGISTER( "mtspr 81,%0", val ) |
||||
#define GET_CMPA() GET_REGISTER( "mfspr %0,144" ) |
||||
#define SET_CMPA(val) SET_REGISTER( "mtspr 144,%0", val ) |
||||
#define GET_CMPB() GET_REGISTER( "mfspr %0,145" ) |
||||
#define SET_CMPB(val) SET_REGISTER( "mtspr 145,%0", val ) |
||||
#define GET_CMPC() GET_REGISTER( "mfspr %0,146" ) |
||||
#define SET_CMPC(val) SET_REGISTER( "mtspr 146,%0", val ) |
||||
#define GET_CMPD() GET_REGISTER( "mfspr %0,147" ) |
||||
#define SET_CMPD(val) SET_REGISTER( "mtspr 147,%0", val ) |
||||
#define GET_ICR() GET_REGISTER( "mfspr %0,148" ) |
||||
#define SET_ICR(val) SET_REGISTER( "mtspr 148,%0", val ) |
||||
#define GET_DER() GET_REGISTER( "mfspr %0,149" ) |
||||
#define SET_DER(val) SET_REGISTER( "mtspr 149,%0", val ) |
||||
#define GET_COUNTA() GET_REGISTER( "mfspr %0,150" ) |
||||
#define SET_COUNTA(val) SET_REGISTER( "mtspr 150,%0", val ) |
||||
#define GET_COUNTB() GET_REGISTER( "mfspr %0,151" ) |
||||
#define SET_COUNTB(val) SET_REGISTER( "mtspr 151,%0", val ) |
||||
#define GET_CMPE() GET_REGISTER( "mfspr %0,152" ) |
||||
#define SET_CMPE(val) SET_REGISTER( "mtspr 152,%0", val ) |
||||
#define GET_CMPF() GET_REGISTER( "mfspr %0,153" ) |
||||
#define SET_CMPF(val) SET_REGISTER( "mtspr 153,%0", val ) |
||||
#define GET_CMPG() GET_REGISTER( "mfspr %0,154" ) |
||||
#define SET_CMPG(val) SET_REGISTER( "mtspr 154,%0", val ) |
||||
#define GET_CMPH() GET_REGISTER( "mfspr %0,155" ) |
||||
#define SET_CMPH(val) SET_REGISTER( "mtspr 155,%0", val ) |
||||
#define GET_LCTRL1() GET_REGISTER( "mfspr %0,156" ) |
||||
#define SET_LCTRL1(val) SET_REGISTER( "mtspr 156,%0", val ) |
||||
#define GET_LCTRL2() GET_REGISTER( "mfspr %0,157" ) |
||||
#define SET_LCTRL2(val) SET_REGISTER( "mtspr 157,%0", val ) |
||||
#define GET_ICTRL() GET_REGISTER( "mfspr %0,158" ) |
||||
#define SET_ICTRL(val) SET_REGISTER( "mtspr 158,%0", val ) |
||||
#define GET_BAR() GET_REGISTER( "mfspr %0,159" ) |
||||
#define SET_BAR(val) SET_REGISTER( "mtspr 159,%0", val ) |
||||
#define GET_USPRG0() GET_REGISTER( "mfspr %0,256" ) |
||||
#define SET_USPRG0(val) SET_REGISTER( "mtspr 256,%0", val ) |
||||
#define GET_SPRG4_RO() GET_REGISTER( "mfspr %0,260" ) |
||||
#define SET_SPRG4_RO(val) SET_REGISTER( "mtspr 260,%0", val ) |
||||
#define GET_SPRG5_RO() GET_REGISTER( "mfspr %0,261" ) |
||||
#define SET_SPRG5_RO(val) SET_REGISTER( "mtspr 261,%0", val ) |
||||
#define GET_SPRG6_RO() GET_REGISTER( "mfspr %0,262" ) |
||||
#define SET_SPRG6_RO(val) SET_REGISTER( "mtspr 262,%0", val ) |
||||
#define GET_SPRG7_RO() GET_REGISTER( "mfspr %0,263" ) |
||||
#define SET_SPRG7_RO(val) SET_REGISTER( "mtspr 263,%0", val ) |
||||
#define GET_SPRG0() GET_REGISTER( "mfspr %0,272" ) |
||||
#define SET_SPRG0(val) SET_REGISTER( "mtspr 272,%0", val ) |
||||
#define GET_SPRG1() GET_REGISTER( "mfspr %0,273" ) |
||||
#define SET_SPRG1(val) SET_REGISTER( "mtspr 273,%0", val ) |
||||
#define GET_SPRG2() GET_REGISTER( "mfspr %0,274" ) |
||||
#define SET_SPRG2(val) SET_REGISTER( "mtspr 274,%0", val ) |
||||
#define GET_SPRG3() GET_REGISTER( "mfspr %0,275" ) |
||||
#define SET_SPRG3(val) SET_REGISTER( "mtspr 275,%0", val ) |
||||
#define GET_SPRG4() GET_REGISTER( "mfspr %0,276" ) |
||||
#define SET_SPRG4(val) SET_REGISTER( "mtspr 276,%0", val ) |
||||
#define GET_SPRG5() GET_REGISTER( "mfspr %0,277" ) |
||||
#define SET_SPRG5(val) SET_REGISTER( "mtspr 277,%0", val ) |
||||
#define GET_SPRG6() GET_REGISTER( "mfspr %0,278" ) |
||||
#define SET_SPRG6(val) SET_REGISTER( "mtspr 278,%0", val ) |
||||
#define GET_SPRG7() GET_REGISTER( "mfspr %0,279" ) |
||||
#define SET_SPRG7(val) SET_REGISTER( "mtspr 279,%0", val ) |
||||
#define GET_EAR() GET_REGISTER( "mfspr %0,282" ) |
||||
#define SET_EAR(val) SET_REGISTER( "mtspr 282,%0", val ) |
||||
#define GET_TBL() GET_REGISTER( "mfspr %0,284" ) |
||||
#define SET_TBL(val) SET_REGISTER( "mtspr 284,%0", val ) |
||||
#define GET_TBU() GET_REGISTER( "mfspr %0,285" ) |
||||
#define SET_TBU(val) SET_REGISTER( "mtspr 285,%0", val ) |
||||
#define GET_PVR() GET_REGISTER( "mfspr %0,287" ) |
||||
#define SET_PVR(val) SET_REGISTER( "mtspr 287,%0", val ) |
||||
#define GET_IC_CST() GET_REGISTER( "mfspr %0,560" ) |
||||
#define SET_IC_CST(val) SET_REGISTER( "mtspr 560,%0", val ) |
||||
#define GET_IC_ADR() GET_REGISTER( "mfspr %0,561" ) |
||||
#define SET_IC_ADR(val) SET_REGISTER( "mtspr 561,%0", val ) |
||||
#define GET_IC_DAT() GET_REGISTER( "mfspr %0,562" ) |
||||
#define SET_IC_DAT(val) SET_REGISTER( "mtspr 562,%0", val ) |
||||
#define GET_DC_CST() GET_REGISTER( "mfspr %0,568" ) |
||||
#define SET_DC_CST(val) SET_REGISTER( "mtspr 568,%0", val ) |
||||
#define GET_DC_ADR() GET_REGISTER( "mfspr %0,569" ) |
||||
#define SET_DC_ADR(val) SET_REGISTER( "mtspr 569,%0", val ) |
||||
#define GET_DC_DAT() GET_REGISTER( "mfspr %0,570" ) |
||||
#define SET_DC_DAT(val) SET_REGISTER( "mtspr 570,%0", val ) |
||||
#define GET_DPDR() GET_REGISTER( "mfspr %0,630" ) |
||||
#define SET_DPDR(val) SET_REGISTER( "mtspr 630,%0", val ) |
||||
#define GET_IMMR() GET_REGISTER( "mfspr %0,638" ) |
||||
#define SET_IMMR(val) SET_REGISTER( "mtspr 638,%0", val ) |
||||
#define GET_MI_CTR() GET_REGISTER( "mfspr %0,784" ) |
||||
#define SET_MI_CTR(val) SET_REGISTER( "mtspr 784,%0", val ) |
||||
#define GET_MI_AP() GET_REGISTER( "mfspr %0,786" ) |
||||
#define SET_MI_AP(val) SET_REGISTER( "mtspr 786,%0", val ) |
||||
#define GET_MI_EPN() GET_REGISTER( "mfspr %0,787" ) |
||||
#define SET_MI_EPN(val) SET_REGISTER( "mtspr 787,%0", val ) |
||||
#define GET_MI_TWC() GET_REGISTER( "mfspr %0,789" ) |
||||
#define SET_MI_TWC(val) SET_REGISTER( "mtspr 789,%0", val ) |
||||
#define GET_MI_RPN() GET_REGISTER( "mfspr %0,790" ) |
||||
#define SET_MI_RPN(val) SET_REGISTER( "mtspr 790,%0", val ) |
||||
#define GET_MD_CTR() GET_REGISTER( "mfspr %0,792" ) |
||||
#define SET_MD_CTR(val) SET_REGISTER( "mtspr 792,%0", val ) |
||||
#define GET_M_CASID() GET_REGISTER( "mfspr %0,793" ) |
||||
#define SET_M_CASID(val) SET_REGISTER( "mtspr 793,%0", val ) |
||||
#define GET_MD_AP() GET_REGISTER( "mfspr %0,794" ) |
||||
#define SET_MD_AP(val) SET_REGISTER( "mtspr ,794%0", val ) |
||||
#define GET_MD_EPN() GET_REGISTER( "mfspr %0,795" ) |
||||
#define SET_MD_EPN(val) SET_REGISTER( "mtspr 795,%0", val ) |
||||
#define GET_M_TWB() GET_REGISTER( "mfspr %0,796" ) |
||||
#define SET_M_TWB(val) SET_REGISTER( "mtspr 796,%0", val ) |
||||
#define GET_MD_TWC() GET_REGISTER( "mfspr %0,797" ) |
||||
#define SET_MD_TWC(val) SET_REGISTER( "mtspr 797,%0", val ) |
||||
#define GET_MD_RPN() GET_REGISTER( "mfspr %0,798" ) |
||||
#define SET_MD_RPN(val) SET_REGISTER( "mtspr 798,%0", val ) |
||||
#define GET_M_TW() GET_REGISTER( "mfspr %0,799" ) |
||||
#define SET_M_TW(val) SET_REGISTER( "mtspr 799,%0", val ) |
||||
#define GET_MI_DBCAM() GET_REGISTER( "mfspr %0,816" ) |
||||
#define SET_MI_DBCAM(val) SET_REGISTER( "mtspr 816,%0", val ) |
||||
#define GET_MI_DBRAM0() GET_REGISTER( "mfspr %0,817" ) |
||||
#define SET_MI_DBRAM0(val) SET_REGISTER( "mtspr 817,%0", val ) |
||||
#define GET_MI_DBRAM1() GET_REGISTER( "mfspr %0,818" ) |
||||
#define SET_MI_DBRAM1(val) SET_REGISTER( "mtspr 818,%0", val ) |
||||
#define GET_MD_DBCAM() GET_REGISTER( "mfspr %0,824" ) |
||||
#define SET_MD_DBCA(val) SET_REGISTER( "mtspr 824,%0", val ) |
||||
#define GET_MD_DBRAM0() GET_REGISTER( "mfspr %0,825" ) |
||||
#define SET_MD_DBRAM0(val) SET_REGISTER( "mtspr 825,%0", val ) |
||||
#define GET_MD_DBRAM1() GET_REGISTER( "mfspr %0,826" ) |
||||
#define SET_MD_DBRAM1(val) SET_REGISTER( "mtspr 826,%0", val ) |
||||
#define GET_ZPR() GET_REGISTER( "mfspr %0,944" ) |
||||
#define SET_ZPR(val) SET_REGISTER( "mtspr 944,%0", val ) |
||||
#define GET_PID() GET_REGISTER( "mfspr %0,945" ) |
||||
#define SET_PID(val) SET_REGISTER( "mtspr 945,%0", val ) |
||||
#define GET_CCR0() GET_REGISTER( "mfspr %0,947" ) |
||||
#define SET_CCR0(val) SET_REGISTER( "mtspr 947,%0", val ) |
||||
#define GET_IAC3() GET_REGISTER( "mfspr %0,948" ) |
||||
#define SET_IAC3(val) SET_REGISTER( "mtspr 948,%0", val ) |
||||
#define GET_IAC4() GET_REGISTER( "mfspr %0,949" ) |
||||
#define SET_IAC4(val) SET_REGISTER( "mtspr 949,%0", val ) |
||||
#define GET_DVC1() GET_REGISTER( "mfspr %0,950" ) |
||||
#define SET_DVC1(val) SET_REGISTER( "mtspr 950,%0", val ) |
||||
#define GET_DVC2() GET_REGISTER( "mfspr %0,951" ) |
||||
#define SET_DVC2(val) SET_REGISTER( "mtspr 951,%0", val ) |
||||
#define GET_SGR() GET_REGISTER( "mfspr %0,953" ) |
||||
#define SET_SGR(val) SET_REGISTER( "mtspr 953,%0", val ) |
||||
#define GET_DCWR() GET_REGISTER( "mfspr %0,954" ) |
||||
#define SET_DCWR(val) SET_REGISTER( "mtspr 954,%0", val ) |
||||
#define GET_SLER() GET_REGISTER( "mfspr %0,955" ) |
||||
#define SET_SLER(val) SET_REGISTER( "mtspr 955,%0", val ) |
||||
#define GET_SU0R() GET_REGISTER( "mfspr %0,956" ) |
||||
#define SET_SU0R(val) SET_REGISTER( "mtspr 956,%0", val ) |
||||
#define GET_DBCR1() GET_REGISTER( "mfspr %0,957" ) |
||||
#define SET_DBCR1(val) SET_REGISTER( "mtspr 957,%0", val ) |
||||
#define GET_ICDBDR() GET_REGISTER( "mfspr %0,979" ) |
||||
#define SET_ICDBDR(val) SET_REGISTER( "mtspr 979,%0", val ) |
||||
#define GET_ESR() GET_REGISTER( "mfspr %0,980" ) |
||||
#define SET_ESR(val) SET_REGISTER( "mtspr 980,%0", val ) |
||||
#define GET_DEAR() GET_REGISTER( "mfspr %0,981" ) |
||||
#define SET_DEAR(val) SET_REGISTER( "mtspr 981,%0", val ) |
||||
#define GET_EVPR() GET_REGISTER( "mfspr %0,982" ) |
||||
#define SET_EVPR(val) SET_REGISTER( "mtspr 982,%0", val ) |
||||
#define GET_TSR() GET_REGISTER( "mfspr %0,984" ) |
||||
#define SET_TSR(val) SET_REGISTER( "mtspr 984,%0", val ) |
||||
#define GET_TCR() GET_REGISTER( "mfspr %0,986" ) |
||||
#define SET_TCR(val) SET_REGISTER( "mtspr 986,%0", val ) |
||||
#define GET_PIT() GET_REGISTER( "mfspr %0,987" ) |
||||
#define SET_PIT(val) SET_REGISTER( "mtspr 987,%0", val ) |
||||
#define GET_SRR2() GET_REGISTER( "mfspr %0,990" ) |
||||
#define SET_SRR2(val) SET_REGISTER( "mtspr 990,%0", val ) |
||||
#define GET_SRR3() GET_REGISTER( "mfspr %0,991" ) |
||||
#define SET_SRR3(val) SET_REGISTER( "mtspr 991,%0", val ) |
||||
#define GET_DBSR() GET_REGISTER( "mfspr %0,1008" ) |
||||
#define SET_DBSR(val) SET_REGISTER( "mtspr 1008,%0", val ) |
||||
#define GET_DBCR0() GET_REGISTER( "mfspr %0,1010" ) |
||||
#define SET_DBCR0(val) SET_REGISTER( "mtspr 1010,%0", val ) |
||||
#define GET_IABR() GET_REGISTER( "mfspr %0,1010" ) |
||||
#define SET_IABR(val) SET_REGISTER( "mtspr 1010,%0", val ) |
||||
#define GET_IAC1() GET_REGISTER( "mfspr %0,1012" ) |
||||
#define SET_IAC1(val) SET_REGISTER( "mtspr 1012,%0", val ) |
||||
#define GET_IAC2() GET_REGISTER( "mfspr %0,1013" ) |
||||
#define SET_IAC2(val) SET_REGISTER( "mtspr 1013,%0", val ) |
||||
#define GET_DAC1() GET_REGISTER( "mfspr %0,1014" ) |
||||
#define SET_DAC1(val) SET_REGISTER( "mtspr 1014,%0", val ) |
||||
#define GET_DAC2() GET_REGISTER( "mfspr %0,1015" ) |
||||
#define SET_DAC2(val) SET_REGISTER( "mtspr 1015,%0", val ) |
||||
#define GET_DCCR() GET_REGISTER( "mfspr %0,1018" ) |
||||
#define SET_DCCR(val) SET_REGISTER( "mtspr 1018,%0", val ) |
||||
#define GET_ICCR() GET_REGISTER( "mfspr %0,1019" ) |
||||
#define SET_ICCR(val) SET_REGISTER( "mtspr 1019,%0", val ) |
||||
|
||||
#endif /* _REGS_H */ |
||||
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 William L. Pitts and W. Gerald Hicks |
||||
* All rights reserved. |
||||
* |
||||
* Redistribution and use in source and binary forms are freely |
||||
* permitted provided that the above copyright notice and this |
||||
* paragraph and the following disclaimer are duplicated in all |
||||
* such forms. |
||||
* |
||||
* This software is provided "AS IS" and without any express or |
||||
* implied warranties, including, without limitation, the implied |
||||
* warranties of merchantability and fitness for a particular |
||||
* purpose. |
||||
*/ |
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,86 @@ |
||||
/* Memory.h - Memory mappings and remapping functions declarations */ |
||||
|
||||
/* Copyright - Galileo technology. */ |
||||
|
||||
#ifndef __INCmemoryh |
||||
#define __INCmemoryh |
||||
|
||||
/* includes */ |
||||
|
||||
#include "core.h" |
||||
|
||||
/* defines */ |
||||
|
||||
#define DONT_MODIFY 0xffffffff |
||||
#define PARITY_SUPPORT 0x40000000 |
||||
|
||||
#define _8BIT 0x00000000 |
||||
#define _16BIT 0x00100000 |
||||
#define _32BIT 0x00200000 |
||||
#define _64BIT 0x00300000 |
||||
|
||||
/* typedefs */ |
||||
|
||||
typedef struct deviceParam |
||||
{ /* boundary values */ |
||||
unsigned int turnOff; /* 0x0 - 0xf */ |
||||
unsigned int acc2First; /* 0x0 - 0x1f */ |
||||
unsigned int acc2Next; /* 0x0 - 0x1f */ |
||||
unsigned int ale2Wr; /* 0x0 - 0xf */ |
||||
unsigned int wrLow; /* 0x0 - 0xf */ |
||||
unsigned int wrHigh; /* 0x0 - 0xf */ |
||||
unsigned int deviceWidth; /* in Bytes */ |
||||
} DEVICE_PARAM; |
||||
|
||||
typedef enum __memBank{BANK0,BANK1,BANK2,BANK3} MEMORY_BANK; |
||||
typedef enum __memDevice{DEVICE0,DEVICE1,DEVICE2,DEVICE3,BOOT_DEVICE} DEVICE; |
||||
|
||||
typedef enum __memoryProtectRegion{MEM_REGION0,MEM_REGION1,MEM_REGION2, \
|
||||
MEM_REGION3,MEM_REGION4,MEM_REGION5, \
|
||||
MEM_REGION6,MEM_REGION7} \
|
||||
MEMORY_PROTECT_REGION; |
||||
typedef enum __memoryAccess{MEM_ACCESS_ALLOWED,MEM_ACCESS_FORBIDEN} \
|
||||
MEMORY_ACCESS; |
||||
typedef enum __memoryWrite{MEM_WRITE_ALLOWED,MEM_WRITE_FORBIDEN} \
|
||||
MEMORY_ACCESS_WRITE; |
||||
typedef enum __memoryCacheProtect{MEM_CACHE_ALLOWED,MEM_CACHE_FORBIDEN} \
|
||||
MEMORY_CACHE_PROTECT; |
||||
typedef enum __memorySnoopType{MEM_NO_SNOOP,MEM_SNOOP_WT,MEM_SNOOP_WB} \
|
||||
MEMORY_SNOOP_TYPE; |
||||
typedef enum __memorySnoopRegion{MEM_SNOOP_REGION0,MEM_SNOOP_REGION1, \
|
||||
MEM_SNOOP_REGION2,MEM_SNOOP_REGION3} \
|
||||
MEMORY_SNOOP_REGION; |
||||
|
||||
/* functions */ |
||||
unsigned int memoryGetBankBaseAddress(MEMORY_BANK bank); |
||||
unsigned int memoryGetDeviceBaseAddress(DEVICE device); |
||||
unsigned int memoryGetBankSize(MEMORY_BANK bank); |
||||
unsigned int memoryGetDeviceSize(DEVICE device); |
||||
unsigned int memoryGetDeviceWidth(DEVICE device); |
||||
|
||||
/* when given base Address and size Set new WINDOW for SCS_X. (X = 0,1,2 or 3*/ |
||||
bool memoryMapBank(MEMORY_BANK bank, unsigned int bankBase,unsigned int bankLength); |
||||
bool memoryMapDeviceSpace(DEVICE device, unsigned int deviceBase,unsigned int deviceLength); |
||||
|
||||
/* Change the Internal Register Base Address to a new given Address. */ |
||||
bool memoryMapInternalRegistersSpace(unsigned int internalRegBase); |
||||
/* returns internal Register Space Base Address. */ |
||||
unsigned int memoryGetInternalRegistersSpace(void); |
||||
/* Configurate the protection feature to a given space. */ |
||||
bool memorySetProtectRegion(MEMORY_PROTECT_REGION region, |
||||
MEMORY_ACCESS memoryAccess, |
||||
MEMORY_ACCESS_WRITE memoryWrite, |
||||
MEMORY_CACHE_PROTECT cacheProtection, |
||||
unsigned int baseAddress, |
||||
unsigned int regionLength); |
||||
/* Configurate the snoop feature to a given space. */ |
||||
bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region, |
||||
MEMORY_SNOOP_TYPE snoopType, |
||||
unsigned int baseAddress, |
||||
unsigned int regionLength); |
||||
|
||||
bool memoryRemapAddress(unsigned int remapReg, unsigned int remapValue); |
||||
bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum); |
||||
bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum); |
||||
#endif /* __INCmemoryh */ |
||||
|
||||
@ -0,0 +1,11 @@ |
||||
/* Rubin encoder/decoder header */ |
||||
/* work started at : aug 3, 1994 */ |
||||
/* last modification : aug 15, 1994 */ |
||||
/* $Id: compr_rubin.h,v 1.1 2002/01/16 23:34:32 nyet Exp $ */ |
||||
|
||||
#define RUBIN_REG_SIZE 16 |
||||
#define UPPER_BIT_RUBIN (((long) 1)<<(RUBIN_REG_SIZE-1)) |
||||
#define LOWER_BITS_RUBIN ((((long) 1)<<(RUBIN_REG_SIZE-1))-1) |
||||
|
||||
void dynrubin_decompress(unsigned char *data_in, unsigned char *cpage_out, |
||||
unsigned long sourcelen, unsigned long dstlen); |
||||
@ -0,0 +1,82 @@ |
||||
/*-------------------------------------------------------------------------
|
||||
* Filename: mini_inflate.h |
||||
* Version: $Id: mini_inflate.h,v 1.2 2002/01/17 00:53:20 nyet Exp $ |
||||
* Copyright: Copyright (C) 2001, Russ Dill |
||||
* Author: Russ Dill <Russ.Dill@asu.edu> |
||||
* Description: Mini deflate implementation |
||||
*-----------------------------------------------------------------------*/ |
||||
/*
|
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License as published by |
||||
* the Free Software Foundation; either version 2 of the License, or |
||||
* (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
|
||||
typedef __SIZE_TYPE__ size; |
||||
|
||||
#define NO_ERROR 0 |
||||
#define COMP_UNKNOWN 1 /* The specififed bytype is invalid */ |
||||
#define CODE_NOT_FOUND 2 /* a huffman code in the stream could not be decoded */ |
||||
#define TOO_MANY_BITS 3 /* pull_bits was passed an argument that is too |
||||
* large */ |
||||
|
||||
/* This struct represents an entire huffman code set. It has various lookup
|
||||
* tables to speed decoding */ |
||||
struct huffman_set { |
||||
int bits; /* maximum bit length */ |
||||
int num_symbols; /* Number of symbols this code can represent */ |
||||
int *lengths; /* The bit length of symbols */ |
||||
int *symbols; /* All of the symbols, sorted by the huffman code */ |
||||
int *count; /* the number of codes of this bit length */ |
||||
int *first; /* the first code of this bit length */ |
||||
int *pos; /* the symbol that first represents (in the symbols
|
||||
* array) */ |
||||
}; |
||||
|
||||
struct bitstream { |
||||
unsigned char *data; /* increments as we move from byte to byte */ |
||||
unsigned char bit; /* 0 to 7 */ |
||||
void *(*memcpy)(void *, const void *, size); |
||||
unsigned long decoded; /* The number of bytes decoded */ |
||||
int error; |
||||
|
||||
int distance_count[16]; |
||||
int distance_first[16]; |
||||
int distance_pos[16]; |
||||
int distance_lengths[32]; |
||||
int distance_symbols[32]; |
||||
|
||||
int code_count[8]; |
||||
int code_first[8]; |
||||
int code_pos[8]; |
||||
int code_lengths[19]; |
||||
int code_symbols[19]; |
||||
|
||||
int length_count[16]; |
||||
int length_first[16]; |
||||
int length_pos[16]; |
||||
int length_lengths[288]; |
||||
int length_symbols[288]; |
||||
|
||||
struct huffman_set codes; |
||||
struct huffman_set lengths; |
||||
struct huffman_set distance; |
||||
}; |
||||
|
||||
#define NO_COMP 0 |
||||
#define FIXED_COMP 1 |
||||
#define DYNAMIC_COMP 2 |
||||
|
||||
long decompress_block(unsigned char *dest, unsigned char *source, |
||||
void *(*inflate_memcpy)(void *dest, const void *src, size n)); |
||||
@ -0,0 +1,158 @@ |
||||
|
||||
/* Linux driver for Disk-On-Chip 2000 */ |
||||
/* (c) 1999 Machine Vision Holdings, Inc. */ |
||||
/* Author: David Woodhouse <dwmw2@mvhi.com> */ |
||||
/* $Id: doc2000.h,v 1.15 2001/09/19 00:22:15 dwmw2 Exp $ */ |
||||
|
||||
#ifndef __MTD_DOC2000_H__ |
||||
#define __MTD_DOC2000_H__ |
||||
|
||||
struct DiskOnChip; |
||||
|
||||
#include <linux/mtd/nftl.h> |
||||
|
||||
#define DoC_Sig1 0 |
||||
#define DoC_Sig2 1 |
||||
|
||||
#define DoC_ChipID 0x1000 |
||||
#define DoC_DOCStatus 0x1001 |
||||
#define DoC_DOCControl 0x1002 |
||||
#define DoC_FloorSelect 0x1003 |
||||
#define DoC_CDSNControl 0x1004 |
||||
#define DoC_CDSNDeviceSelect 0x1005 |
||||
#define DoC_ECCConf 0x1006 |
||||
#define DoC_2k_ECCStatus 0x1007 |
||||
|
||||
#define DoC_CDSNSlowIO 0x100d |
||||
#define DoC_ECCSyndrome0 0x1010 |
||||
#define DoC_ECCSyndrome1 0x1011 |
||||
#define DoC_ECCSyndrome2 0x1012 |
||||
#define DoC_ECCSyndrome3 0x1013 |
||||
#define DoC_ECCSyndrome4 0x1014 |
||||
#define DoC_ECCSyndrome5 0x1015 |
||||
#define DoC_AliasResolution 0x101b |
||||
#define DoC_ConfigInput 0x101c |
||||
#define DoC_ReadPipeInit 0x101d |
||||
#define DoC_WritePipeTerm 0x101e |
||||
#define DoC_LastDataRead 0x101f |
||||
#define DoC_NOP 0x1020 |
||||
|
||||
#define DoC_Mil_CDSN_IO 0x0800 |
||||
#define DoC_2k_CDSN_IO 0x1800 |
||||
|
||||
#define ReadDOC_(adr, reg) ((volatile unsigned char)(*(volatile __u8 *)(((unsigned long)adr)+((reg))))) |
||||
#define WriteDOC_(d, adr, reg) do{ *(volatile __u8 *)(((unsigned long)adr)+((reg))) = (__u8)d; eieio();} while(0) |
||||
|
||||
#define DOC_IOREMAP_LEN 0x4000 |
||||
|
||||
/* These are provided to directly use the DoC_xxx defines */ |
||||
#define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) |
||||
#define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) |
||||
|
||||
#define DOC_MODE_RESET 0 |
||||
#define DOC_MODE_NORMAL 1 |
||||
#define DOC_MODE_RESERVED1 2 |
||||
#define DOC_MODE_RESERVED2 3 |
||||
|
||||
#define DOC_MODE_MDWREN 4 |
||||
#define DOC_MODE_CLR_ERR 0x80 |
||||
|
||||
#define DOC_ChipID_UNKNOWN 0x00 |
||||
#define DOC_ChipID_Doc2k 0x20 |
||||
#define DOC_ChipID_DocMil 0x30 |
||||
|
||||
#define CDSN_CTRL_FR_B 0x80 |
||||
#define CDSN_CTRL_ECC_IO 0x20 |
||||
#define CDSN_CTRL_FLASH_IO 0x10 |
||||
#define CDSN_CTRL_WP 0x08 |
||||
#define CDSN_CTRL_ALE 0x04 |
||||
#define CDSN_CTRL_CLE 0x02 |
||||
#define CDSN_CTRL_CE 0x01 |
||||
|
||||
#define DOC_ECC_RESET 0 |
||||
#define DOC_ECC_ERROR 0x80 |
||||
#define DOC_ECC_RW 0x20 |
||||
#define DOC_ECC__EN 0x08 |
||||
#define DOC_TOGGLE_BIT 0x04 |
||||
#define DOC_ECC_RESV 0x02 |
||||
#define DOC_ECC_IGNORE 0x01 |
||||
|
||||
/* We have to also set the reserved bit 1 for enable */ |
||||
#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV) |
||||
#define DOC_ECC_DIS (DOC_ECC_RESV) |
||||
|
||||
struct Nand { |
||||
char floor, chip; |
||||
unsigned long curadr; |
||||
unsigned char curmode; |
||||
/* Also some erase/write/pipeline info when we get that far */ |
||||
}; |
||||
|
||||
#define MAX_FLOORS 4 |
||||
#define MAX_CHIPS 4 |
||||
|
||||
#define MAX_FLOORS_MIL 4 |
||||
#define MAX_CHIPS_MIL 1 |
||||
|
||||
#define ADDR_COLUMN 1 |
||||
#define ADDR_PAGE 2 |
||||
#define ADDR_COLUMN_PAGE 3 |
||||
|
||||
struct DiskOnChip { |
||||
unsigned long physadr; |
||||
unsigned long virtadr; |
||||
unsigned long totlen; |
||||
char* name; |
||||
char ChipID; /* Type of DiskOnChip */ |
||||
int ioreg; |
||||
|
||||
char* chips_name; |
||||
unsigned long mfr; /* Flash IDs - only one type of flash per device */ |
||||
unsigned long id; |
||||
int chipshift; |
||||
char page256; |
||||
char pageadrlen; |
||||
unsigned long erasesize; |
||||
|
||||
int curfloor; |
||||
int curchip; |
||||
|
||||
int numchips; |
||||
struct Nand *chips; |
||||
|
||||
int nftl_found; |
||||
struct NFTLrecord nftl; |
||||
}; |
||||
|
||||
#define SECTORSIZE 512 |
||||
|
||||
/* Return codes from doc_write(), doc_read(), and doc_erase().
|
||||
*/ |
||||
#define DOC_OK 0 |
||||
#define DOC_EIO 1 |
||||
#define DOC_EINVAL 2 |
||||
#define DOC_EECC 3 |
||||
#define DOC_ETIMEOUT 4 |
||||
|
||||
/*
|
||||
* Function Prototypes |
||||
*/ |
||||
int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]); |
||||
|
||||
int doc_rw(struct DiskOnChip* this, int cmd, loff_t from, size_t len, |
||||
size_t *retlen, u_char *buf); |
||||
int doc_read_ecc(struct DiskOnChip* this, loff_t from, size_t len, |
||||
size_t *retlen, u_char *buf, u_char *eccbuf); |
||||
int doc_write_ecc(struct DiskOnChip* this, loff_t to, size_t len, |
||||
size_t *retlen, const u_char *buf, u_char *eccbuf); |
||||
int doc_read_oob(struct DiskOnChip* this, loff_t ofs, size_t len, |
||||
size_t *retlen, u_char *buf); |
||||
int doc_write_oob(struct DiskOnChip* this, loff_t ofs, size_t len, |
||||
size_t *retlen, const u_char *buf); |
||||
int doc_erase (struct DiskOnChip* this, loff_t ofs, size_t len); |
||||
|
||||
void doc_probe(unsigned long physadr); |
||||
|
||||
void doc_print(struct DiskOnChip*); |
||||
|
||||
#endif /* __MTD_DOC2000_H__ */ |
||||
@ -0,0 +1,158 @@ |
||||
#ifndef _LINUX_TIME_H |
||||
#define _LINUX_TIME_H |
||||
|
||||
#include <linux/types.h> |
||||
|
||||
#define _DEFUN(a,b,c) a(c) |
||||
#define _CONST const |
||||
#define _AND , |
||||
|
||||
#define _REENT_ONLY |
||||
|
||||
#define SECSPERMIN 60L |
||||
#define MINSPERHOUR 60L |
||||
#define HOURSPERDAY 24L |
||||
#define SECSPERHOUR (SECSPERMIN * MINSPERHOUR) |
||||
#define SECSPERDAY (SECSPERHOUR * HOURSPERDAY) |
||||
#define DAYSPERWEEK 7 |
||||
#define MONSPERYEAR 12 |
||||
|
||||
#define YEAR_BASE 1900 |
||||
#define EPOCH_YEAR 1970 |
||||
#define EPOCH_WDAY 4 |
||||
|
||||
#define isleap(y) ((((y) % 4) == 0 && ((y) % 100) != 0) || ((y) % 400) == 0) |
||||
|
||||
|
||||
/* Used by other time functions. */ |
||||
struct tm { |
||||
int tm_sec; /* Seconds. [0-60] (1 leap second) */ |
||||
int tm_min; /* Minutes. [0-59] */ |
||||
int tm_hour; /* Hours. [0-23] */ |
||||
int tm_mday; /* Day. [1-31] */ |
||||
int tm_mon; /* Month. [0-11] */ |
||||
int tm_year; /* Year - 1900. */ |
||||
int tm_wday; /* Day of week. [0-6] */ |
||||
int tm_yday; /* Days in year.[0-365] */ |
||||
int tm_isdst; /* DST. [-1/0/1]*/ |
||||
|
||||
# ifdef __USE_BSD |
||||
long int tm_gmtoff; /* Seconds east of UTC. */ |
||||
__const char *tm_zone; /* Timezone abbreviation. */ |
||||
# else |
||||
long int __tm_gmtoff; /* Seconds east of UTC. */ |
||||
__const char *__tm_zone; /* Timezone abbreviation. */ |
||||
# endif |
||||
}; |
||||
|
||||
static inline char * |
||||
_DEFUN (asctime_r, (tim_p, result), |
||||
_CONST struct tm *tim_p _AND |
||||
char *result) |
||||
{ |
||||
static _CONST char day_name[7][3] = { |
||||
"Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat" |
||||
}; |
||||
static _CONST char mon_name[12][3] = { |
||||
"Jan", "Feb", "Mar", "Apr", "May", "Jun", |
||||
"Jul", "Aug", "Sep", "Oct", "Nov", "Dec" |
||||
}; |
||||
|
||||
sprintf (result, "%.3s %.3s %.2d %.2d:%.2d:%.2d %d\n", |
||||
day_name[tim_p->tm_wday], |
||||
mon_name[tim_p->tm_mon], |
||||
tim_p->tm_mday, tim_p->tm_hour, tim_p->tm_min, |
||||
tim_p->tm_sec, 1900 + tim_p->tm_year); |
||||
return result; |
||||
} |
||||
|
||||
static inline struct tm * |
||||
_DEFUN (localtime_r, (tim_p, res), |
||||
_CONST time_t * tim_p _AND |
||||
struct tm *res) |
||||
{ |
||||
static _CONST int mon_lengths[2][MONSPERYEAR] = { |
||||
{31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}, |
||||
{31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31} |
||||
} ; |
||||
|
||||
static _CONST int year_lengths[2] = { |
||||
365, |
||||
366 |
||||
} ; |
||||
|
||||
long days, rem; |
||||
int y; |
||||
int yleap; |
||||
_CONST int *ip; |
||||
|
||||
days = ((long) *tim_p) / SECSPERDAY; |
||||
rem = ((long) *tim_p) % SECSPERDAY; |
||||
while (rem < 0) |
||||
{ |
||||
rem += SECSPERDAY; |
||||
--days; |
||||
} |
||||
while (rem >= SECSPERDAY) |
||||
{ |
||||
rem -= SECSPERDAY; |
||||
++days; |
||||
} |
||||
|
||||
/* compute hour, min, and sec */ |
||||
res->tm_hour = (int) (rem / SECSPERHOUR); |
||||
rem %= SECSPERHOUR; |
||||
res->tm_min = (int) (rem / SECSPERMIN); |
||||
res->tm_sec = (int) (rem % SECSPERMIN); |
||||
|
||||
/* compute day of week */ |
||||
if ((res->tm_wday = ((EPOCH_WDAY + days) % DAYSPERWEEK)) < 0) |
||||
res->tm_wday += DAYSPERWEEK; |
||||
|
||||
/* compute year & day of year */ |
||||
y = EPOCH_YEAR; |
||||
if (days >= 0) |
||||
{ |
||||
for (;;) |
||||
{ |
||||
yleap = isleap(y); |
||||
if (days < year_lengths[yleap]) |
||||
break; |
||||
y++; |
||||
days -= year_lengths[yleap]; |
||||
} |
||||
} |
||||
else |
||||
{ |
||||
do |
||||
{ |
||||
--y; |
||||
yleap = isleap(y); |
||||
days += year_lengths[yleap]; |
||||
} while (days < 0); |
||||
} |
||||
|
||||
res->tm_year = y - YEAR_BASE; |
||||
res->tm_yday = days; |
||||
ip = mon_lengths[yleap]; |
||||
for (res->tm_mon = 0; days >= ip[res->tm_mon]; ++res->tm_mon) |
||||
days -= ip[res->tm_mon]; |
||||
res->tm_mday = days + 1; |
||||
|
||||
/* set daylight saving time flag */ |
||||
res->tm_isdst = -1; |
||||
|
||||
return (res); |
||||
} |
||||
|
||||
static inline char * |
||||
_DEFUN (ctime_r, (tim_p, result), |
||||
_CONST time_t * tim_p _AND |
||||
char * result) |
||||
|
||||
{ |
||||
struct tm tm; |
||||
return asctime_r (localtime_r (tim_p, &tm), result); |
||||
} |
||||
|
||||
#endif |
||||
@ -0,0 +1,64 @@ |
||||
/*
|
||||
* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||
* Andreas Heppel <aheppel@sysgo.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Date & Time support for the MK48T59 RTC |
||||
*/ |
||||
|
||||
|
||||
#if defined(CONFIG_RTC_MK48T59) && (CONFIG_COMMANDS & CFG_CMD_DATE) |
||||
|
||||
#define RTC_PORT_ADDR0 CFG_ISA_IO + 0x70 |
||||
#define RTC_PORT_ADDR1 RTC_PORT_ADDR0 + 0x1 |
||||
#define RTC_PORT_DATA CFG_ISA_IO + 0x76 |
||||
|
||||
/* RTC Offsets */ |
||||
#define RTC_SECONDS 0x1FF9 |
||||
#define RTC_MINUTES 0x1FFA |
||||
#define RTC_HOURS 0x1FFB |
||||
#define RTC_DAY_OF_WEEK 0x1FFC |
||||
#define RTC_DAY_OF_MONTH 0x1FFD |
||||
#define RTC_MONTH 0x1FFE |
||||
#define RTC_YEAR 0x1FFF |
||||
|
||||
#define RTC_CONTROLA 0x1FF8 |
||||
#define RTC_CA_WRITE 0x80 |
||||
#define RTC_CA_READ 0x40 |
||||
#define RTC_CA_CALIB_SIGN 0x20 |
||||
#define RTC_CA_CALIB_MASK 0x1f |
||||
|
||||
#define RTC_CONTROLB 0x1FF9 |
||||
#define RTC_CB_STOP 0x80 |
||||
|
||||
#define RTC_WATCHDOG 0x1FF7 |
||||
#define RTC_WDS 0x80 |
||||
#define RTC_WD_RB_16TH 0x0 |
||||
#define RTC_WD_RB_4TH 0x1 |
||||
#define RTC_WD_RB_1 0x2 |
||||
#define RTC_WD_RB_4 0x3 |
||||
|
||||
void rtc_set_watchdog(short multi, short res); |
||||
void *nvram_read(void *dest, const short src, size_t count); |
||||
void nvram_write(short dest, const void *src, size_t count); |
||||
|
||||
#endif |
||||
@ -0,0 +1,99 @@ |
||||
/*
|
||||
* (C) Copyright 2000, 2001 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#ifndef _PART_H |
||||
#define _PART_H |
||||
|
||||
|
||||
typedef struct block_dev_desc { |
||||
int if_type; /* type of the interface */ |
||||
int dev; /* device number */ |
||||
unsigned char part_type; /* partition type */ |
||||
unsigned char target; /* target SCSI ID */ |
||||
unsigned char lun; /* target LUN */ |
||||
unsigned char type; /* device type */ |
||||
unsigned long lba; /* number of blocks */ |
||||
unsigned long blksz; /* block size */ |
||||
unsigned char vendor[40]; /* IDE model, SCSI Vendor */ |
||||
unsigned char product[20];/* IDE Serial no, SCSI product */ |
||||
unsigned char revision[8];/* firmware revision */ |
||||
unsigned char removable; /* removable device */ |
||||
unsigned long (*block_read)(int dev,unsigned long start,unsigned long blkcnt, unsigned long *buffer); |
||||
}block_dev_desc_t; |
||||
/* Interface types: */ |
||||
#define IF_TYPE_UNKNOWN 0 |
||||
#define IF_TYPE_IDE 1 |
||||
#define IF_TYPE_SCSI 2 |
||||
#define IF_TYPE_ATAPI 3 |
||||
#define IF_TYPE_USB 4 |
||||
#define IF_TYPE_DOC 5 |
||||
/* Part types */ |
||||
#define PART_TYPE_UNKNOWN 0x00 |
||||
#define PART_TYPE_MAC 0x01 |
||||
#define PART_TYPE_DOS 0x02 |
||||
#define PART_TYPE_ISO 0x03 |
||||
/* device types */ |
||||
#define DEV_TYPE_UNKNOWN 0xff /* not connected */ |
||||
#define DEV_TYPE_HARDDISK 0x00 /* harddisk */ |
||||
#define DEV_TYPE_TAPE 0x01 /* Tape */ |
||||
#define DEV_TYPE_CDROM 0x05 /* CD-ROM */ |
||||
#define DEV_TYPE_OPDISK 0x07 /* optical disk */ |
||||
|
||||
typedef struct disk_partition { |
||||
ulong start; /* # of first block in partition */ |
||||
ulong size; /* number of blocks in partition */ |
||||
ulong blksz; /* block size in bytes */ |
||||
uchar name[32]; /* partition name */ |
||||
uchar type[32]; /* string type description */ |
||||
} disk_partition_t; |
||||
|
||||
/* disk/part.c */ |
||||
int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); |
||||
void print_part (block_dev_desc_t *dev_desc); |
||||
void init_part (block_dev_desc_t *dev_desc); |
||||
void dev_print(block_dev_desc_t *dev_desc); |
||||
|
||||
|
||||
#ifdef CONFIG_MAC_PARTITION |
||||
/* disk/part_mac.c */ |
||||
int get_partition_info_mac (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); |
||||
void print_part_mac (block_dev_desc_t *dev_desc); |
||||
int test_part_mac (block_dev_desc_t *dev_desc); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_DOS_PARTITION |
||||
/* disk/part_dos.c */ |
||||
int get_partition_info_dos (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); |
||||
void print_part_dos (block_dev_desc_t *dev_desc); |
||||
int test_part_dos (block_dev_desc_t *dev_desc); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_ISO_PARTITION |
||||
/* disk/part_iso.c */ |
||||
int get_partition_info_iso (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); |
||||
void print_part_iso (block_dev_desc_t *dev_desc); |
||||
int test_part_iso (block_dev_desc_t *dev_desc); |
||||
#endif |
||||
|
||||
#endif /* _PART_H */ |
||||
|
||||
|
||||
@ -0,0 +1,352 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
* Note: Part of this code has been derived from linux |
||||
* |
||||
*/ |
||||
#ifndef _USB_H_ |
||||
#define _USB_H_ |
||||
|
||||
#include <usb_defs.h> |
||||
|
||||
/* Everything is aribtrary */ |
||||
#define USB_ALTSETTINGALLOC 4 |
||||
#define USB_MAXALTSETTING 128 /* Hard limit */ |
||||
|
||||
#define USB_MAX_DEVICE 32 |
||||
#define USB_MAXCONFIG 8 |
||||
#define USB_MAXINTERFACES 8 |
||||
#define USB_MAXENDPOINTS 16 |
||||
#define USB_MAXCHILDREN 8 /* This is arbitrary */ |
||||
#define USB_MAX_HUB 16 |
||||
|
||||
#define USB_CNTL_TIMEOUT 100 /* 100ms timeout */ |
||||
|
||||
|
||||
/* String descriptor */ |
||||
struct usb_string_descriptor { |
||||
unsigned char bLength; |
||||
unsigned char bDescriptorType; |
||||
unsigned short wData[1]; |
||||
} __attribute__ ((packed)); |
||||
|
||||
/* device request (setup) */ |
||||
struct devrequest { |
||||
unsigned char requesttype; |
||||
unsigned char request; |
||||
unsigned short value; |
||||
unsigned short index; |
||||
unsigned short length; |
||||
} __attribute__ ((packed)); |
||||
|
||||
|
||||
|
||||
/* All standard descriptors have these 2 fields in common */ |
||||
struct usb_descriptor_header { |
||||
unsigned char bLength; |
||||
unsigned char bDescriptorType; |
||||
} __attribute__ ((packed)); |
||||
|
||||
/* Device descriptor */ |
||||
struct usb_device_descriptor { |
||||
unsigned char bLength; |
||||
unsigned char bDescriptorType; |
||||
unsigned short bcdUSB; |
||||
unsigned char bDeviceClass; |
||||
unsigned char bDeviceSubClass; |
||||
unsigned char bDeviceProtocol; |
||||
unsigned char bMaxPacketSize0; |
||||
unsigned short idVendor; |
||||
unsigned short idProduct; |
||||
unsigned short bcdDevice; |
||||
unsigned char iManufacturer; |
||||
unsigned char iProduct; |
||||
unsigned char iSerialNumber; |
||||
unsigned char bNumConfigurations; |
||||
} __attribute__ ((packed)); |
||||
|
||||
|
||||
/* Endpoint descriptor */ |
||||
struct usb_endpoint_descriptor { |
||||
unsigned char bLength; |
||||
unsigned char bDescriptorType; |
||||
unsigned char bEndpointAddress; |
||||
unsigned char bmAttributes; |
||||
unsigned short wMaxPacketSize; |
||||
unsigned char bInterval; |
||||
unsigned char bRefresh; |
||||
unsigned char bSynchAddress; |
||||
|
||||
} __attribute__ ((packed)); |
||||
/* Interface descriptor */ |
||||
struct usb_interface_descriptor { |
||||
unsigned char bLength; |
||||
unsigned char bDescriptorType; |
||||
unsigned char bInterfaceNumber; |
||||
unsigned char bAlternateSetting; |
||||
unsigned char bNumEndpoints; |
||||
unsigned char bInterfaceClass; |
||||
unsigned char bInterfaceSubClass; |
||||
unsigned char bInterfaceProtocol; |
||||
unsigned char iInterface; |
||||
|
||||
unsigned char no_of_ep; |
||||
unsigned char act_altsetting; |
||||
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; |
||||
} __attribute__ ((packed)); |
||||
|
||||
|
||||
/* Configuration descriptor information.. */ |
||||
struct usb_config_descriptor { |
||||
unsigned char bLength; |
||||
unsigned char bDescriptorType; |
||||
unsigned short wTotalLength; |
||||
unsigned char bNumInterfaces; |
||||
unsigned char bConfigurationValue; |
||||
unsigned char iConfiguration; |
||||
unsigned char bmAttributes; |
||||
unsigned char MaxPower; |
||||
|
||||
unsigned char no_of_if; /* number of interfaces */ |
||||
struct usb_interface_descriptor if_desc[USB_MAXINTERFACES]; |
||||
} __attribute__ ((packed)); |
||||
|
||||
|
||||
struct usb_device { |
||||
int devnum; /* Device number on USB bus */ |
||||
int slow; /* Slow device? */ |
||||
char mf[32]; /* manufacturer */ |
||||
char prod[32]; /* product */ |
||||
char serial[32]; /* serial number */ |
||||
|
||||
int maxpacketsize; /* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */ |
||||
unsigned int toggle[2]; /* one bit for each endpoint ([0] = IN, [1] = OUT) */ |
||||
unsigned int halted[2]; /* endpoint halts; one bit per endpoint # & direction; */ |
||||
/* [0] = IN, [1] = OUT */ |
||||
int epmaxpacketin[16]; /* INput endpoint specific maximums */ |
||||
int epmaxpacketout[16]; /* OUTput endpoint specific maximums */ |
||||
|
||||
int configno; /* selected config number */ |
||||
struct usb_device_descriptor descriptor; /* Device Descriptor */ |
||||
struct usb_config_descriptor config; /* config descriptor */ |
||||
|
||||
int have_langid; /* whether string_langid is valid yet */ |
||||
int string_langid; /* language ID for strings */ |
||||
int (*irq_handle)(struct usb_device *dev); |
||||
unsigned long irq_status; |
||||
int irq_act_len; /* transfered bytes */ |
||||
void *privptr; |
||||
/*
|
||||
* Child devices - if this is a hub device |
||||
* Each instance needs its own set of data structures. |
||||
*/ |
||||
unsigned long status; |
||||
int act_len; /* transfered bytes */ |
||||
int maxchild; /* Number of ports if hub */ |
||||
struct usb_device *parent; |
||||
struct usb_device *children[USB_MAXCHILDREN]; |
||||
}; |
||||
|
||||
/**********************************************************************
|
||||
* this is how the lowlevel part communicate with the outer world |
||||
*/ |
||||
|
||||
#ifdef CONFIG_USB_UHCI |
||||
int usb_lowlevel_init(void); |
||||
int usb_lowlevel_stop(void); |
||||
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len); |
||||
int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, |
||||
int transfer_len,struct devrequest *setup); |
||||
int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, |
||||
int transfer_len, int interval); |
||||
|
||||
/* Defines */ |
||||
#define USB_UHCI_VEND_ID 0x8086 |
||||
#define USB_UHCI_DEV_ID 0x7112 |
||||
|
||||
#else |
||||
#error USB Lowlevel not defined |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USB_STORAGE |
||||
|
||||
#define USB_MAX_STOR_DEV 5 |
||||
block_dev_desc_t *usb_stor_get_dev(int index); |
||||
int usb_stor_scan(int mode); |
||||
|
||||
#endif |
||||
|
||||
#ifdef CONFIG_USB_KEYBOARD |
||||
|
||||
int drv_usb_kbd_init(void); |
||||
int usb_kbd_deregister(void); |
||||
|
||||
#endif |
||||
/* routines */ |
||||
int usb_init(void); /* initialize the USB Controller */ |
||||
int usb_stop(void); /* stop the USB Controller */ |
||||
|
||||
|
||||
int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol); |
||||
int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id); |
||||
struct usb_device * usb_get_dev_index(int index); |
||||
int usb_control_msg(struct usb_device *dev, unsigned int pipe, |
||||
unsigned char request, unsigned char requesttype, |
||||
unsigned short value, unsigned short index, |
||||
void *data, unsigned short size, int timeout); |
||||
int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, |
||||
void *data, int len, int *actual_length, int timeout); |
||||
int usb_submit_int_msg(struct usb_device *dev, unsigned long pipe, |
||||
void *buffer,int transfer_len, int interval); |
||||
void usb_disable_asynch(int disable); |
||||
int usb_maxpacket(struct usb_device *dev,unsigned long pipe); |
||||
void __inline__ wait_ms(unsigned long ms); |
||||
int usb_get_configuration_no(struct usb_device *dev,unsigned char *buffer,int cfgno); |
||||
int usb_get_report(struct usb_device *dev, int ifnum, unsigned char type, unsigned char id, void *buf, int size); |
||||
int usb_get_class_descriptor(struct usb_device *dev, int ifnum, |
||||
unsigned char type, unsigned char id, void *buf, int size); |
||||
int usb_clear_halt(struct usb_device *dev, int pipe); |
||||
int usb_string(struct usb_device *dev, int index, char *buf, size_t size); |
||||
int usb_set_interface(struct usb_device *dev, int interface, int alternate); |
||||
|
||||
/* big endian -> little endian conversion */ |
||||
#define swap_16(x) \ |
||||
((unsigned short)( \
|
||||
(((unsigned short)(x) & (unsigned short)0x00ffU) << 8) | \
|
||||
(((unsigned short)(x) & (unsigned short)0xff00U) >> 8) )) |
||||
#define swap_32(x) \ |
||||
((unsigned long)( \
|
||||
(((unsigned long)(x) & (unsigned long)0x000000ffUL) << 24) | \
|
||||
(((unsigned long)(x) & (unsigned long)0x0000ff00UL) << 8) | \
|
||||
(((unsigned long)(x) & (unsigned long)0x00ff0000UL) >> 8) | \
|
||||
(((unsigned long)(x) & (unsigned long)0xff000000UL) >> 24) )) |
||||
|
||||
/*
|
||||
* Calling this entity a "pipe" is glorifying it. A USB pipe |
||||
* is something embarrassingly simple: it basically consists |
||||
* of the following information: |
||||
* - device number (7 bits) |
||||
* - endpoint number (4 bits) |
||||
* - current Data0/1 state (1 bit) |
||||
* - direction (1 bit) |
||||
* - speed (1 bit) |
||||
* - max packet size (2 bits: 8, 16, 32 or 64) |
||||
* - pipe type (2 bits: control, interrupt, bulk, isochronous) |
||||
* |
||||
* That's 18 bits. Really. Nothing more. And the USB people have |
||||
* documented these eighteen bits as some kind of glorious |
||||
* virtual data structure. |
||||
* |
||||
* Let's not fall in that trap. We'll just encode it as a simple |
||||
* unsigned int. The encoding is: |
||||
* |
||||
* - max size: bits 0-1 (00 = 8, 01 = 16, 10 = 32, 11 = 64) |
||||
* - direction: bit 7 (0 = Host-to-Device [Out], 1 = Device-to-Host [In]) |
||||
* - device: bits 8-14 |
||||
* - endpoint: bits 15-18 |
||||
* - Data0/1: bit 19 |
||||
* - speed: bit 26 (0 = Full, 1 = Low Speed) |
||||
* - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, 10 = control, 11 = bulk) |
||||
* |
||||
* Why? Because it's arbitrary, and whatever encoding we select is really |
||||
* up to us. This one happens to share a lot of bit positions with the UHCI |
||||
* specification, so that much of the uhci driver can just mask the bits |
||||
* appropriately. |
||||
*/ |
||||
/* Create various pipes... */ |
||||
#define create_pipe(dev,endpoint) \ |
||||
(((dev)->devnum << 8) | (endpoint << 15) | ((dev)->slow << 26) | (dev)->maxpacketsize) |
||||
#define default_pipe(dev) ((dev)->slow <<26) |
||||
|
||||
#define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint)) |
||||
#define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) |
||||
#define usb_sndisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | create_pipe(dev,endpoint)) |
||||
#define usb_rcvisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) |
||||
#define usb_sndbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | create_pipe(dev,endpoint)) |
||||
#define usb_rcvbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) |
||||
#define usb_sndintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | create_pipe(dev,endpoint)) |
||||
#define usb_rcvintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) |
||||
#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | default_pipe(dev)) |
||||
#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | default_pipe(dev) | USB_DIR_IN) |
||||
|
||||
/* The D0/D1 toggle bits */ |
||||
#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> ep) & 1) |
||||
#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << ep)) |
||||
#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << ep)) | ((bit) << ep)) |
||||
|
||||
/* Endpoint halt control/status */ |
||||
#define usb_endpoint_out(ep_dir) (((ep_dir >> 7) & 1) ^ 1) |
||||
#define usb_endpoint_halt(dev, ep, out) ((dev)->halted[out] |= (1 << (ep))) |
||||
#define usb_endpoint_running(dev, ep, out) ((dev)->halted[out] &= ~(1 << (ep))) |
||||
#define usb_endpoint_halted(dev, ep, out) ((dev)->halted[out] & (1 << (ep))) |
||||
|
||||
#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : USB_PID_OUT) |
||||
|
||||
#define usb_pipeout(pipe) ((((pipe) >> 7) & 1) ^ 1) |
||||
#define usb_pipein(pipe) (((pipe) >> 7) & 1) |
||||
#define usb_pipedevice(pipe) (((pipe) >> 8) & 0x7f) |
||||
#define usb_pipe_endpdev(pipe) (((pipe) >> 8) & 0x7ff) |
||||
#define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf) |
||||
#define usb_pipedata(pipe) (((pipe) >> 19) & 1) |
||||
#define usb_pipeslow(pipe) (((pipe) >> 26) & 1) |
||||
#define usb_pipetype(pipe) (((pipe) >> 30) & 3) |
||||
#define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS) |
||||
#define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT) |
||||
#define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL) |
||||
#define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK) |
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Hub Stuff |
||||
*/ |
||||
struct usb_port_status { |
||||
unsigned short wPortStatus; |
||||
unsigned short wPortChange; |
||||
} __attribute__ ((packed)); |
||||
|
||||
struct usb_hub_status { |
||||
unsigned short wHubStatus; |
||||
unsigned short wHubChange; |
||||
} __attribute__ ((packed)); |
||||
|
||||
|
||||
/* Hub descriptor */ |
||||
struct usb_hub_descriptor { |
||||
unsigned char bLength; |
||||
unsigned char bDescriptorType; |
||||
unsigned char bNbrPorts; |
||||
unsigned short wHubCharacteristics; |
||||
unsigned char bPwrOn2PwrGood; |
||||
unsigned char bHubContrCurrent; |
||||
unsigned char DeviceRemovable[(USB_MAXCHILDREN+1+7)/8]; |
||||
unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8]; |
||||
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
|
||||
bitmaps that hold max 255 entries. (bit0 is ignored) */ |
||||
} __attribute__ ((packed)); |
||||
|
||||
|
||||
struct usb_hub_device { |
||||
struct usb_device *pusb_dev; |
||||
struct usb_hub_descriptor desc; |
||||
}; |
||||
|
||||
#endif /*_USB_H_ */ |
||||
@ -0,0 +1,256 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Denis Peter, MPL AG Switzerland |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
* Note: Part of this code has been derived from linux |
||||
* |
||||
*/ |
||||
#ifndef _USB_DEFS_H_ |
||||
#define _USB_DEFS_H_ |
||||
|
||||
|
||||
/* Everything is aribtrary */ |
||||
#define USB_ALTSETTINGALLOC 4 |
||||
#define USB_MAXALTSETTING 128 /* Hard limit */ |
||||
|
||||
#define USB_MAX_DEVICE 32 |
||||
#define USB_MAXCONFIG 8 |
||||
#define USB_MAXINTERFACES 8 |
||||
#define USB_MAXENDPOINTS 16 |
||||
#define USB_MAXCHILDREN 8 /* This is arbitrary */ |
||||
#define USB_MAX_HUB 16 |
||||
|
||||
#define USB_CNTL_TIMEOUT 100 /* 100ms timeout */ |
||||
|
||||
/* USB constants */ |
||||
|
||||
/* Device and/or Interface Class codes */ |
||||
#define USB_CLASS_PER_INTERFACE 0 /* for DeviceClass */ |
||||
#define USB_CLASS_AUDIO 1 |
||||
#define USB_CLASS_COMM 2 |
||||
#define USB_CLASS_HID 3 |
||||
#define USB_CLASS_PRINTER 7 |
||||
#define USB_CLASS_MASS_STORAGE 8 |
||||
#define USB_CLASS_HUB 9 |
||||
#define USB_CLASS_DATA 10 |
||||
#define USB_CLASS_VENDOR_SPEC 0xff |
||||
|
||||
/* some HID sub classes */ |
||||
#define USB_SUB_HID_NONE 0 |
||||
#define USB_SUB_HID_BOOT 1 |
||||
|
||||
/* some UID Protocols */ |
||||
#define USB_PROT_HID_NONE 0 |
||||
#define USB_PROT_HID_KEYBOARD 1 |
||||
#define USB_PROT_HID_MOUSE 2 |
||||
|
||||
|
||||
/* Sub STORAGE Classes */ |
||||
#define US_SC_RBC 1 /* Typically, flash devices */ |
||||
#define US_SC_8020 2 /* CD-ROM */ |
||||
#define US_SC_QIC 3 /* QIC-157 Tapes */ |
||||
#define US_SC_UFI 4 /* Floppy */ |
||||
#define US_SC_8070 5 /* Removable media */ |
||||
#define US_SC_SCSI 6 /* Transparent */ |
||||
#define US_SC_MIN US_SC_RBC |
||||
#define US_SC_MAX US_SC_SCSI |
||||
|
||||
/* STORAGE Protocols */ |
||||
#define US_PR_CB 1 /* Control/Bulk w/o interrupt */ |
||||
#define US_PR_CBI 0 /* Control/Bulk/Interrupt */ |
||||
#define US_PR_BULK 0x50 /* bulk only */ |
||||
|
||||
/* USB types */ |
||||
#define USB_TYPE_STANDARD (0x00 << 5) |
||||
#define USB_TYPE_CLASS (0x01 << 5) |
||||
#define USB_TYPE_VENDOR (0x02 << 5) |
||||
#define USB_TYPE_RESERVED (0x03 << 5) |
||||
|
||||
/* USB recipients */ |
||||
#define USB_RECIP_DEVICE 0x00 |
||||
#define USB_RECIP_INTERFACE 0x01 |
||||
#define USB_RECIP_ENDPOINT 0x02 |
||||
#define USB_RECIP_OTHER 0x03 |
||||
|
||||
/* USB directions */ |
||||
#define USB_DIR_OUT 0 |
||||
#define USB_DIR_IN 0x80 |
||||
|
||||
/* Descriptor types */ |
||||
#define USB_DT_DEVICE 0x01 |
||||
#define USB_DT_CONFIG 0x02 |
||||
#define USB_DT_STRING 0x03 |
||||
#define USB_DT_INTERFACE 0x04 |
||||
#define USB_DT_ENDPOINT 0x05 |
||||
|
||||
#define USB_DT_HID (USB_TYPE_CLASS | 0x01) |
||||
#define USB_DT_REPORT (USB_TYPE_CLASS | 0x02) |
||||
#define USB_DT_PHYSICAL (USB_TYPE_CLASS | 0x03) |
||||
#define USB_DT_HUB (USB_TYPE_CLASS | 0x09) |
||||
|
||||
/* Descriptor sizes per descriptor type */ |
||||
#define USB_DT_DEVICE_SIZE 18 |
||||
#define USB_DT_CONFIG_SIZE 9 |
||||
#define USB_DT_INTERFACE_SIZE 9 |
||||
#define USB_DT_ENDPOINT_SIZE 7 |
||||
#define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */ |
||||
#define USB_DT_HUB_NONVAR_SIZE 7 |
||||
#define USB_DT_HID_SIZE 9 |
||||
|
||||
/* Endpoints */ |
||||
#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */ |
||||
#define USB_ENDPOINT_DIR_MASK 0x80 |
||||
|
||||
#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */ |
||||
#define USB_ENDPOINT_XFER_CONTROL 0 |
||||
#define USB_ENDPOINT_XFER_ISOC 1 |
||||
#define USB_ENDPOINT_XFER_BULK 2 |
||||
#define USB_ENDPOINT_XFER_INT 3 |
||||
|
||||
/* USB Packet IDs (PIDs) */ |
||||
#define USB_PID_UNDEF_0 0xf0 |
||||
#define USB_PID_OUT 0xe1 |
||||
#define USB_PID_ACK 0xd2 |
||||
#define USB_PID_DATA0 0xc3 |
||||
#define USB_PID_UNDEF_4 0xb4 |
||||
#define USB_PID_SOF 0xa5 |
||||
#define USB_PID_UNDEF_6 0x96 |
||||
#define USB_PID_UNDEF_7 0x87 |
||||
#define USB_PID_UNDEF_8 0x78 |
||||
#define USB_PID_IN 0x69 |
||||
#define USB_PID_NAK 0x5a |
||||
#define USB_PID_DATA1 0x4b |
||||
#define USB_PID_PREAMBLE 0x3c |
||||
#define USB_PID_SETUP 0x2d |
||||
#define USB_PID_STALL 0x1e |
||||
#define USB_PID_UNDEF_F 0x0f |
||||
|
||||
/* Standard requests */ |
||||
#define USB_REQ_GET_STATUS 0x00 |
||||
#define USB_REQ_CLEAR_FEATURE 0x01 |
||||
#define USB_REQ_SET_FEATURE 0x03 |
||||
#define USB_REQ_SET_ADDRESS 0x05 |
||||
#define USB_REQ_GET_DESCRIPTOR 0x06 |
||||
#define USB_REQ_SET_DESCRIPTOR 0x07 |
||||
#define USB_REQ_GET_CONFIGURATION 0x08 |
||||
#define USB_REQ_SET_CONFIGURATION 0x09 |
||||
#define USB_REQ_GET_INTERFACE 0x0A |
||||
#define USB_REQ_SET_INTERFACE 0x0B |
||||
#define USB_REQ_SYNCH_FRAME 0x0C |
||||
|
||||
/* HID requests */ |
||||
#define USB_REQ_GET_REPORT 0x01 |
||||
#define USB_REQ_GET_IDLE 0x02 |
||||
#define USB_REQ_GET_PROTOCOL 0x03 |
||||
#define USB_REQ_SET_REPORT 0x09 |
||||
#define USB_REQ_SET_IDLE 0x0A |
||||
#define USB_REQ_SET_PROTOCOL 0x0B |
||||
|
||||
|
||||
/* "pipe" definitions */ |
||||
|
||||
#define PIPE_ISOCHRONOUS 0 |
||||
#define PIPE_INTERRUPT 1 |
||||
#define PIPE_CONTROL 2 |
||||
#define PIPE_BULK 3 |
||||
#define PIPE_DEVEP_MASK 0x0007ff00 |
||||
|
||||
#define USB_ISOCHRONOUS 0 |
||||
#define USB_INTERRUPT 1 |
||||
#define USB_CONTROL 2 |
||||
#define USB_BULK 3 |
||||
|
||||
/* USB-status codes: */ |
||||
#define USB_ST_ACTIVE 0x1 /* TD is active */ |
||||
#define USB_ST_STALLED 0x2 /* TD is stalled */ |
||||
#define USB_ST_BUF_ERR 0x4 /* buffer error */ |
||||
#define USB_ST_BABBLE_DET 0x8 /* Babble detected */ |
||||
#define USB_ST_NAK_REC 0x10 /* NAK Received*/ |
||||
#define USB_ST_CRC_ERR 0x20 /* CRC/timeout Error */ |
||||
#define USB_ST_BIT_ERR 0x40 /* Bitstuff error */ |
||||
#define USB_ST_NOT_PROC 0x80000000L /* Not yet processed */ |
||||
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Hub defines |
||||
*/ |
||||
|
||||
/*
|
||||
* Hub request types |
||||
*/ |
||||
|
||||
#define USB_RT_HUB (USB_TYPE_CLASS | USB_RECIP_DEVICE) |
||||
#define USB_RT_PORT (USB_TYPE_CLASS | USB_RECIP_OTHER) |
||||
|
||||
/*
|
||||
* Hub Class feature numbers |
||||
*/ |
||||
#define C_HUB_LOCAL_POWER 0 |
||||
#define C_HUB_OVER_CURRENT 1 |
||||
|
||||
/*
|
||||
* Port feature numbers |
||||
*/ |
||||
#define USB_PORT_FEAT_CONNECTION 0 |
||||
#define USB_PORT_FEAT_ENABLE 1 |
||||
#define USB_PORT_FEAT_SUSPEND 2 |
||||
#define USB_PORT_FEAT_OVER_CURRENT 3 |
||||
#define USB_PORT_FEAT_RESET 4 |
||||
#define USB_PORT_FEAT_POWER 8 |
||||
#define USB_PORT_FEAT_LOWSPEED 9 |
||||
#define USB_PORT_FEAT_C_CONNECTION 16 |
||||
#define USB_PORT_FEAT_C_ENABLE 17 |
||||
#define USB_PORT_FEAT_C_SUSPEND 18 |
||||
#define USB_PORT_FEAT_C_OVER_CURRENT 19 |
||||
#define USB_PORT_FEAT_C_RESET 20 |
||||
|
||||
/* wPortStatus bits */ |
||||
#define USB_PORT_STAT_CONNECTION 0x0001 |
||||
#define USB_PORT_STAT_ENABLE 0x0002 |
||||
#define USB_PORT_STAT_SUSPEND 0x0004 |
||||
#define USB_PORT_STAT_OVERCURRENT 0x0008 |
||||
#define USB_PORT_STAT_RESET 0x0010 |
||||
#define USB_PORT_STAT_POWER 0x0100 |
||||
#define USB_PORT_STAT_LOW_SPEED 0x0200 |
||||
|
||||
/* wPortChange bits */ |
||||
#define USB_PORT_STAT_C_CONNECTION 0x0001 |
||||
#define USB_PORT_STAT_C_ENABLE 0x0002 |
||||
#define USB_PORT_STAT_C_SUSPEND 0x0004 |
||||
#define USB_PORT_STAT_C_OVERCURRENT 0x0008 |
||||
#define USB_PORT_STAT_C_RESET 0x0010 |
||||
|
||||
/* wHubCharacteristics (masks) */ |
||||
#define HUB_CHAR_LPSM 0x0003 |
||||
#define HUB_CHAR_COMPOUND 0x0004 |
||||
#define HUB_CHAR_OCPM 0x0018 |
||||
|
||||
/*
|
||||
*Hub Status & Hub Change bit masks |
||||
*/ |
||||
#define HUB_STATUS_LOCAL_POWER 0x0001 |
||||
#define HUB_STATUS_OVERCURRENT 0x0002 |
||||
|
||||
#define HUB_CHANGE_LOCAL_POWER 0x0001 |
||||
#define HUB_CHANGE_OVERCURRENT 0x0002 |
||||
|
||||
#endif /*_USB_DEFS_H_ */ |
||||
@ -0,0 +1,178 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/* winbond access routines and defines*/ |
||||
|
||||
/* from the winbond data sheet -
|
||||
The W83C553F SIO controller with PCI arbiter is a multi-function PCI device. |
||||
Function 0 is the ISA bridge, and Function 1 is the bus master IDE controller. |
||||
*/ |
||||
|
||||
/*ISA bridge configuration space*/ |
||||
|
||||
#define W83C553F_VID 0x10AD |
||||
#define W83C553F_DID 0x0565 |
||||
|
||||
#define WINBOND_PCICONTR 0x40 /*pci control reg*/ |
||||
#define WINBOND_SGBAR 0x41 /*scatter/gather base address reg*/ |
||||
#define WINBOND_LBCR 0x42 /*Line Buffer Control reg*/ |
||||
#define WINBOND_IDEIRCR 0x43 /*IDE Interrupt Routing Control Reg*/ |
||||
#define WINBOND_PCIIRCR 0x44 /*PCI Interrupt Routing Control Reg*/ |
||||
#define WINBOND_BTBAR 0x46 /*BIOS Timer Base Address Register*/ |
||||
#define WINBOND_IPADCR 0x48 /*ISA to PCI Address Decoder Control Register*/ |
||||
#define WINBOND_IRADCR 0x49 /*ISA ROM Address Decoder Control Register*/ |
||||
#define WINBOND_IPMHSAR 0x4a /*ISA to PCI Memory Hole STart Address Register*/ |
||||
#define WINBOND_IPMHSR 0x4b /*ISA to PCI Memory Hols Size Register*/ |
||||
#define WINBOND_CDR 0x4c /*Clock Divisor Register*/ |
||||
#define WINBOND_CSCR 0x4d /*Chip Select Control Register*/ |
||||
#define WINBOND_ATSCR 0x4e /*AT System Control register*/ |
||||
#define WINBOND_ATBCR 0x4f /*AT Bus ControL Register*/ |
||||
#define WINBOND_IRQBEE0R 0x60 /*IRQ Break Event Enable 0 Register*/ |
||||
#define WINBOND_IRQBEE1R 0x61 /*IRQ Break Event Enable 1 Register*/ |
||||
#define WINBOND_ABEER 0x62 /*Additional Break Event Enable Register*/ |
||||
#define WINBOND_DMABEER 0x63 /*DMA Break Event Enable Register*/ |
||||
|
||||
#define WINDOND_IDECSR 0x40 /*IDE Control/Status Register, Function 1*/ |
||||
|
||||
#define IPADCR_MBE512 0x1 |
||||
#define IPADCR_MBE640 0x2 |
||||
#define IPADCR_IPATOM4 0x10 |
||||
#define IPADCR_IPATOM5 0x20 |
||||
#define IPADCR_IPATOM6 0x40 |
||||
#define IPADCR_IPATOM7 0x80 |
||||
|
||||
#define CSCR_UBIOSCSE 0x10 |
||||
#define CSCR_BIOSWP 0x20 |
||||
|
||||
#define IDECSR_P0EN 0x01 |
||||
#define IDECSR_P0F16 0x02 |
||||
#define IDECSR_P1EN 0x10 |
||||
#define IDECSR_P1F16 0x20 |
||||
#define IDECSR_LEGIRQ 0x800 |
||||
|
||||
/*
|
||||
* Interrupt controller |
||||
*/ |
||||
#define W83C553F_PIC1_ICW1 CFG_ISA_IO + 0x20 |
||||
#define W83C553F_PIC1_ICW2 CFG_ISA_IO + 0x21 |
||||
#define W83C553F_PIC1_ICW3 CFG_ISA_IO + 0x21 |
||||
#define W83C553F_PIC1_ICW4 CFG_ISA_IO + 0x21 |
||||
#define W83C553F_PIC1_OCW1 CFG_ISA_IO + 0x21 |
||||
#define W83C553F_PIC1_OCW2 CFG_ISA_IO + 0x20 |
||||
#define W83C553F_PIC1_OCW3 CFG_ISA_IO + 0x20 |
||||
#define W83C553F_PIC1_ELC CFG_ISA_IO + 0x4D0 |
||||
#define W83C553F_PIC2_ICW1 CFG_ISA_IO + 0xA0 |
||||
#define W83C553F_PIC2_ICW2 CFG_ISA_IO + 0xA1 |
||||
#define W83C553F_PIC2_ICW3 CFG_ISA_IO + 0xA1 |
||||
#define W83C553F_PIC2_ICW4 CFG_ISA_IO + 0xA1 |
||||
#define W83C553F_PIC2_OCW1 CFG_ISA_IO + 0xA1 |
||||
#define W83C553F_PIC2_OCW2 CFG_ISA_IO + 0xA0 |
||||
#define W83C553F_PIC2_OCW3 CFG_ISA_IO + 0xA0 |
||||
#define W83C553F_PIC2_ELC CFG_ISA_IO + 0x4D1 |
||||
|
||||
#define W83C553F_TMR1_CMOD CFG_ISA_IO + 0x43 |
||||
|
||||
/*
|
||||
* DMA controller |
||||
*/ |
||||
#define W83C553F_DMA1 CFG_ISA_IO + 0x000 /* channel 0 - 3 */ |
||||
#define W83C553F_DMA2 CFG_ISA_IO + 0x0C0 /* channel 4 - 7 */ |
||||
|
||||
/* command/status register bit definitions */ |
||||
|
||||
#define W83C553F_CS_COM_DACKAL (1<<7) /* DACK# assert level */ |
||||
#define W83C553F_CS_COM_DREQSAL (1<<6) /* DREQ sense assert level */ |
||||
#define W83C553F_CS_COM_GAP (1<<4) /* group arbitration priority */ |
||||
#define W83C553F_CS_COM_CGE (1<<2) /* channel group enable */ |
||||
|
||||
#define W83C553F_CS_STAT_CH0REQ (1<<4) /* channel 0 (4) DREQ status */ |
||||
#define W83C553F_CS_STAT_CH1REQ (1<<5) /* channel 1 (5) DREQ status */ |
||||
#define W83C553F_CS_STAT_CH2REQ (1<<6) /* channel 2 (6) DREQ status */ |
||||
#define W83C553F_CS_STAT_CH3REQ (1<<7) /* channel 3 (7) DREQ status */ |
||||
|
||||
#define W83C553F_CS_STAT_CH0TC (1<<0) /* channel 0 (4) TC status */ |
||||
#define W83C553F_CS_STAT_CH1TC (1<<1) /* channel 1 (5) TC status */ |
||||
#define W83C553F_CS_STAT_CH2TC (1<<2) /* channel 2 (6) TC status */ |
||||
#define W83C553F_CS_STAT_CH3TC (1<<3) /* channel 3 (7) TC status */ |
||||
|
||||
/* mode register bit definitions */ |
||||
|
||||
#define W83C553F_MODE_TM_DEMAND (0<<6) /* transfer mode - demand */ |
||||
#define W83C553F_MODE_TM_SINGLE (1<<6) /* transfer mode - single */ |
||||
#define W83C553F_MODE_TM_BLOCK (2<<6) /* transfer mode - block */ |
||||
#define W83C553F_MODE_TM_CASCADE (3<<6) /* transfer mode - cascade */ |
||||
#define W83C553F_MODE_ADDRDEC (1<<5) /* address increment/decrement select */ |
||||
#define W83C553F_MODE_AUTOINIT (1<<4) /* autoinitialize enable */ |
||||
#define W83C553F_MODE_TT_VERIFY (0<<2) /* transfer type - verify */ |
||||
#define W83C553F_MODE_TT_WRITE (1<<2) /* transfer type - write */ |
||||
#define W83C553F_MODE_TT_READ (2<<2) /* transfer type - read */ |
||||
#define W83C553F_MODE_TT_ILLEGAL (3<<2) /* transfer type - illegal */ |
||||
#define W83C553F_MODE_CH0SEL (0<<0) /* channel 0 (4) select */ |
||||
#define W83C553F_MODE_CH1SEL (1<<0) /* channel 1 (5) select */ |
||||
#define W83C553F_MODE_CH2SEL (2<<0) /* channel 2 (6) select */ |
||||
#define W83C553F_MODE_CH3SEL (3<<0) /* channel 3 (7) select */ |
||||
|
||||
/* request register bit definitions */ |
||||
|
||||
#define W83C553F_REQ_CHSERREQ (1<<2) /* channel service request */ |
||||
#define W83C553F_REQ_CH0SEL (0<<0) /* channel 0 (4) select */ |
||||
#define W83C553F_REQ_CH1SEL (1<<0) /* channel 1 (5) select */ |
||||
#define W83C553F_REQ_CH2SEL (2<<0) /* channel 2 (6) select */ |
||||
#define W83C553F_REQ_CH3SEL (3<<0) /* channel 3 (7) select */ |
||||
|
||||
/* write single mask bit register bit definitions */ |
||||
|
||||
#define W83C553F_WSMB_CHMASKSEL (1<<2) /* channel mask select */ |
||||
#define W83C553F_WSMB_CH0SEL (0<<0) /* channel 0 (4) select */ |
||||
#define W83C553F_WSMB_CH1SEL (1<<0) /* channel 1 (5) select */ |
||||
#define W83C553F_WSMB_CH2SEL (2<<0) /* channel 2 (6) select */ |
||||
#define W83C553F_WSMB_CH3SEL (3<<0) /* channel 3 (7) select */ |
||||
|
||||
/* read/write all mask bits register bit definitions */ |
||||
|
||||
#define W83C553F_RWAMB_CH0MASK (1<<0) /* channel 0 (4) mask */ |
||||
#define W83C553F_RWAMB_CH1MASK (1<<1) /* channel 1 (5) mask */ |
||||
#define W83C553F_RWAMB_CH2MASK (1<<2) /* channel 2 (6) mask */ |
||||
#define W83C553F_RWAMB_CH3MASK (1<<3) /* channel 3 (7) mask */ |
||||
|
||||
/* typedefs */ |
||||
|
||||
#define W83C553F_DMA1_CS 0x8 |
||||
#define W83C553F_DMA1_WR 0x9 |
||||
#define W83C553F_DMA1_WSMB 0xA |
||||
#define W83C553F_DMA1_WM 0xB |
||||
#define W83C553F_DMA1_CBP 0xC |
||||
#define W83C553F_DMA1_MC 0xD |
||||
#define W83C553F_DMA1_CM 0xE |
||||
#define W83C553F_DMA1_RWAMB 0xF |
||||
|
||||
#define W83C553F_DMA2_CS 0x10 |
||||
#define W83C553F_DMA2_WR 0x12 |
||||
#define W83C553F_DMA2_WSMB 0x14 |
||||
#define W83C553F_DMA2_WM 0x16 |
||||
#define W83C553F_DMA2_CBP 0x18 |
||||
#define W83C553F_DMA2_MC 0x1A |
||||
#define W83C553F_DMA2_CM 0x1C |
||||
#define W83C553F_DMA2_RWAMB 0x1E |
||||
|
||||
void initialise_w83c553f(void); |
||||
@ -0,0 +1,96 @@ |
||||
/*
|
||||
* (C) Copyright 2001 |
||||
* Erik Theisen, Wave 7 Optics, etheisen@mindspring.com. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Watchdog functions and macros. |
||||
*/ |
||||
#ifndef _WATCHDOG_H_ |
||||
#define _WATCHDOG_H_ |
||||
|
||||
#if defined(CONFIG_HW_WATCHDOG) && defined(CONFIG_WATCHDOG) |
||||
# error "Configuration error: CONFIG_HW_WATCHDOG and CONFIG_WATCHDOG can't be used together." |
||||
#endif |
||||
|
||||
/*
|
||||
* Hardware watchdog |
||||
*/ |
||||
#ifdef CONFIG_HW_WATCHDOG |
||||
#if defined(__ASSEMBLY__) |
||||
#define WATCHDOG_RESET bl hw_watchdog_reset |
||||
#else |
||||
extern void hw_watchdog_reset(void); |
||||
|
||||
#define WATCHDOG_RESET hw_watchdog_reset |
||||
#endif /* __ASSEMBLY__ */ |
||||
#else |
||||
/*
|
||||
* Maybe a software watchdog? |
||||
*/ |
||||
#if defined(CONFIG_WATCHDOG) |
||||
#if defined(__ASSEMBLY__) |
||||
#define WATCHDOG_RESET bl watchdog_reset |
||||
#else |
||||
extern void watchdog_reset(void); |
||||
|
||||
#define WATCHDOG_RESET watchdog_reset |
||||
#endif |
||||
#else |
||||
/*
|
||||
* No hardware or software watchdog. |
||||
*/ |
||||
#if defined(__ASSEMBLY__) |
||||
#define WATCHDOG_RESET /*XXX DO_NOT_DEL_THIS_COMMENT*/ |
||||
#else |
||||
#define WATCHDOG_RESET() {} |
||||
#endif /* __ASSEMBLY__ */ |
||||
#endif /* CONFIG_WATCHDOG && !__ASSEMBLY__ */ |
||||
#endif /* CONFIG_HW_WATCHDOG */ |
||||
|
||||
/*
|
||||
* Prototypes from $(CPU)/cpu.c. |
||||
*/ |
||||
|
||||
/* MPC 8xx */ |
||||
#if (defined(CONFIG_8xx) || defined(CONFIG_MPC860)) && !defined(__ASSEMBLY__) |
||||
void reset_8xx_watchdog(volatile immap_t *immr); |
||||
#endif |
||||
|
||||
/* IBM 4xx */ |
||||
#if defined(CONFIG_4xx) && !defined(__ASSEMBLY__) |
||||
void reset_4xx_watchdog(void); |
||||
#endif |
||||
|
||||
/* MPC 8260 */ |
||||
#if defined(CONFIG_MPC8260) && !defined(__ASSEMBLY__) |
||||
#if defined(CONFIG_WATCHDOG) |
||||
extern __inline__ void |
||||
reset_8260_watchdog(volatile immap_t *immr) |
||||
{ |
||||
immr->im_siu_conf.sc_swsr = 0x556c; |
||||
immr->im_siu_conf.sc_swsr = 0xaa39; |
||||
} |
||||
#endif /* !__ASSEMBLY__ && CONFIG_WATCHDOG */ |
||||
#endif /* CONFIG_MPC8260 && !__ASSEMBLY__ */ |
||||
|
||||
#endif /* _WATCHDOG_H_ */ |
||||
|
||||
@ -0,0 +1,207 @@ |
||||
BODY { |
||||
background: #e0ffff; |
||||
color: #000000; |
||||
font-family: Arial, Verdana, Helvetica; |
||||
} |
||||
H1 { |
||||
font-family: "Copperplate Gothic Bold"; |
||||
background: transparent; |
||||
color: #993300; |
||||
text-align: center; |
||||
} |
||||
H2, H3, H4, H5 { |
||||
background: transparent; |
||||
color: #993300; |
||||
margin-top: 4%; |
||||
text-align: center; |
||||
} |
||||
Body.Plain Div.Abstract, Body.Plain P.Abstract { |
||||
background: #cccc99; |
||||
color: #333300; |
||||
border: white; |
||||
padding: 3%; |
||||
font-family: Times, Verdana; |
||||
} |
||||
TH.Nav { |
||||
background: #0000cc; |
||||
color: #ff9900; |
||||
} |
||||
TH.Menu { |
||||
background: #3366cc; |
||||
color: #ff9900; |
||||
} |
||||
A:hover { |
||||
color: #ff6600; |
||||
} |
||||
A.Menu:hover { |
||||
color: #ff6600; |
||||
} |
||||
A.HoMe:hover { |
||||
color: #ff6600; |
||||
} |
||||
A.Menu { |
||||
background: transparent; |
||||
color: #ffcc33; |
||||
font-family: Verdana, Helvetica, Arial; |
||||
font-size: smaller; |
||||
text-decoration: none; |
||||
} |
||||
A.Menu:visited { |
||||
background: transparent; |
||||
color: #ffcc99; |
||||
} |
||||
A.HoMe { |
||||
background: transparent; |
||||
color: #ffcc33; |
||||
font-family: Verdana, Helvetica, Arial; |
||||
text-decoration:none; |
||||
} |
||||
A.HoMe:visited { |
||||
background: transparent; |
||||
color: #ffcc99; |
||||
} |
||||
TH.Xmp { |
||||
background: #eeeeee; |
||||
color: #330066; |
||||
font-family: courier; |
||||
font-weight: normal; |
||||
} |
||||
TH.LuT { |
||||
background: #cccccc; |
||||
color: #000000; |
||||
} |
||||
TD.LuT { |
||||
background: #ffffcc; |
||||
color: #000000; |
||||
font-size: 85%; |
||||
} |
||||
TH.Info, TD.Info { |
||||
background: #ffffcc; |
||||
color: #660000; |
||||
font-family: "Comic Sans MS", Cursive, Verdana; |
||||
font-size: smaller; |
||||
} |
||||
Div.Info, P.Info { |
||||
background: #ffff99; |
||||
color: #990033; |
||||
text-align: left; |
||||
padding: 2%; |
||||
font-family: "Comic Sans MS", Cursive, Verdana; |
||||
font-size: 85%; |
||||
} |
||||
Div.Info A { |
||||
background: transparent; |
||||
color: #ff6600; |
||||
} |
||||
.HL { |
||||
background: #ffff99; |
||||
color: #000000; |
||||
} |
||||
TD.HL { |
||||
background: #ccffff; |
||||
color: #000000; |
||||
} |
||||
Div.Margins { |
||||
width: 512px; |
||||
text-align: center; |
||||
} |
||||
TD.Plain { |
||||
background: #ffffcc; |
||||
color: #000033; |
||||
} |
||||
.Type { |
||||
background: #cccccc; |
||||
color: #660000; |
||||
} |
||||
.Name { |
||||
background: #eeeeee; |
||||
color: #660000; |
||||
vertical-align: top; |
||||
text-align: right; |
||||
} |
||||
.Value { |
||||
background: #ffffee; |
||||
color: #000066; |
||||
} |
||||
.Drop { |
||||
background: #333366; |
||||
color: #ffcc33; |
||||
font-family: "Copperplate Gothic Light", Helvetica, Verdana, Arial; |
||||
} |
||||
A.Button:hover { |
||||
color: #ff6600; |
||||
} |
||||
A.Button { |
||||
text-decoration:none; |
||||
color: #003366; |
||||
background: #ffcc66; |
||||
} |
||||
.Button { |
||||
font-size: 9pt; |
||||
text-align: center; |
||||
text-decoration:none; |
||||
color: #003366; |
||||
background: #ffcc66; |
||||
margin-bottom: 2pt; |
||||
border-top: 2px solid #ffff99; |
||||
border-left: 2px solid #ffff99; |
||||
border-right: 2px solid #cc9933; |
||||
border-bottom: 2px solid #cc9933; |
||||
font-family: Verdana, Arial, "Comic Sans MS"; |
||||
} |
||||
.Banner { |
||||
width: 468; |
||||
font-size: 12pt; |
||||
text-align: center; |
||||
text-decoration:none; |
||||
color: #003366; |
||||
background: #ffcc66; |
||||
border-top: 4px solid #ffff99; |
||||
border-left: 4px solid #ffff99; |
||||
border-right: 4px solid #cc9933; |
||||
border-bottom: 4px solid #cc9933; |
||||
font-family: Verdana, Arial, "Comic Sans MS"; |
||||
} |
||||
TD.Nova, Body.Nova { |
||||
background: #000000; |
||||
font-family: "Times New Roman"; |
||||
font-weight: light; |
||||
color: #ffcc00; |
||||
} |
||||
Body.Nova A.Button { |
||||
background: gold; |
||||
color: #003366; |
||||
} |
||||
Body.Nova A.Banner { |
||||
background: transparent; |
||||
color: #003366; |
||||
} |
||||
Body.Nova A { |
||||
background: transparent; |
||||
text-decoration:none; |
||||
color: #ffd766; |
||||
} |
||||
Body.Nova H1, Body.Nova H2, Body.Nova H3, Body.Nova H4 { |
||||
background: transparent; |
||||
color: white; |
||||
margin-top: 4%; |
||||
text-align: center; |
||||
filter: Blur(Add=1, Direction=0, Strength=8); |
||||
} |
||||
Body.Nova Div.Abstract { |
||||
background: #000000; |
||||
color: #ffffff; |
||||
font-family: Times, Verdana; |
||||
} |
||||
Body.Nova A.Abstract { |
||||
background: transparent; |
||||
color: #ffeedd; |
||||
} |
||||
Body.Nova TH.LuT { |
||||
background: black; |
||||
color: #ffff99; |
||||
} |
||||
Body.Nova TD.LuT { |
||||
background: navy; |
||||
color: #ffff99; |
||||
} |
||||
@ -0,0 +1,16 @@ |
||||
set line /dev/ttyS0 |
||||
set speed 115200 |
||||
set carrier-watch off |
||||
set handshake none |
||||
set flow-control none |
||||
robust |
||||
set file type bin |
||||
set file name lit |
||||
set rec pack 1000 |
||||
set send pack 1000 |
||||
set window 5 |
||||
set prompt Kermit> |
||||
define sz !sz \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line) |
||||
define rz !rz \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line) |
||||
define sx !sx \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line) |
||||
define rx !rx \%1 \%2 \%3 \%4 \%5 \%6 \%7 \%8 \%9 < \v(line) > \v(line) |
||||
@ -0,0 +1,60 @@ |
||||
#!/usr/bin/kermit + |
||||
# usage: ./flash_param parameters |
||||
# Parameters: IP Address ETH Address ERIC Number |
||||
# Format: xxx.xxx.xxx.xxx xx:xx:xx:xx:xx:xx xxxx |
||||
|
||||
set line /dev/ttyS0 |
||||
set speed 115200 |
||||
set serial 8N1 |
||||
set carrier-watch off |
||||
set handshake none |
||||
#set flow-control none |
||||
set flow-control xon/xoff |
||||
#robust |
||||
set file type bin |
||||
set file name lit |
||||
set rec pack 1000 |
||||
set send pack 1000 |
||||
set window 5 |
||||
set prompt Kermit> |
||||
#robust |
||||
# Milliseconds to pause between each OUTPUT character |
||||
set output pacing 1 |
||||
|
||||
out \13 |
||||
in 10 => |
||||
#first erase the environment memory within NVRAM |
||||
out mw f0000000 0 200\13 |
||||
in 10 => |
||||
out reset\13 |
||||
in 5 autoboot |
||||
out \13\13 |
||||
in 10 => |
||||
#set additional env parameter |
||||
out setenv ethaddr \%2\13 |
||||
in 10 => |
||||
out setenv serial# ERIC 1.0 \%3\13 |
||||
in 10 => |
||||
out setenv eric_id \%3\13 |
||||
in 10 => |
||||
#out setenv prec_videocard_bus unknown\13 |
||||
#in 10 => |
||||
#out setenv prec_bios_type unknown\13 |
||||
#in 10 => |
||||
out setenv eric_passwd .eRIC.\13 |
||||
in 10 => |
||||
#out setenv bootargs root=/dev/ram ramdisk_size=8192 init=/sbin/init ip=\%1:192.168.1.100:192.168.1.254:255.255.255.0\13 |
||||
#out setenv bootargs root=/dev/ram ramdisk_size=8192 init=/sbin/init ip=\%1:192.168.0.1\13 |
||||
#out setenv bootargs root=/dev/ram ramdisk_size=8192 init=/sbin/init ip=\%1\13 |
||||
out setenv bootargs console=/dev/ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.26:/eric_root_devel ip=\%1:192.168.1.26\13 |
||||
in 10 => |
||||
out setenv bootcmd bootm FFC00000\13 |
||||
in 10 => |
||||
out saveenv\13 |
||||
in 10 => |
||||
out reset\13 |
||||
in 5 autoboot |
||||
out \13\13 |
||||
in 10 => |
||||
quit |
||||
exit 0 |
||||
@ -0,0 +1,22 @@ |
||||
#!/usr/bin/kermit + |
||||
set line /dev/ttyS0 |
||||
set speed 115200 |
||||
set serial 8N1 |
||||
set carrier-watch off |
||||
set handshake none |
||||
set flow-control none |
||||
robust |
||||
set file type bin |
||||
set file name lit |
||||
set rec pack 1000 |
||||
set send pack 1000 |
||||
set window 5 |
||||
set prompt Kermit> |
||||
|
||||
#out \13 |
||||
#in 10 => |
||||
out \%1 \%2 \%3 \%4 \%5 \%6 \%7\13 |
||||
in 10 => |
||||
quit |
||||
exit 0 |
||||
|
||||
@ -0,0 +1,26 @@ |
||||
#!/usr/bin/kermit + |
||||
# usage: send_image FILE_NAME OFFSET |
||||
# e.g. send_image output.bin 1F00000 |
||||
set line /dev/ttyS0 |
||||
set speed 115200 |
||||
set serial 8N1 |
||||
set carrier-watch off |
||||
set handshake none |
||||
set flow-control none |
||||
robust |
||||
set file type bin |
||||
set file name lit |
||||
set rec pack 1000 |
||||
set send pack 1000 |
||||
set window 5 |
||||
set prompt Kermit> |
||||
|
||||
out \13 |
||||
in 10 => |
||||
out loadb \%2 \13 |
||||
in 10 download ... |
||||
send \%1 |
||||
out \13 |
||||
in 10 ## Start Addr |
||||
quit |
||||
exit 0 |
||||
Loading…
Reference in new issue