ARM: tegra: enable PCI support of p2371-2180

p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This
patch adds the relevant DT to enable the PCI controller and configure
the XUSB padctl pin muxing, and code to turn on the PCI power and enable
PCI features in U-Boot. I have only tested the x4 slot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
master
Stephen Warren 9 years ago committed by Tom Warren
parent d0af234130
commit 019bc6259d
  1. 50
      arch/arm/dts/tegra210-p2371-2180.dts
  2. 30
      board/nvidia/p2371-2180/p2371-2180.c
  3. 10
      include/configs/p2371-2180.h

@ -21,6 +21,56 @@
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
pcie-controller@0,01003000 {
status = "okay";
pci@1,0 {
status = "okay";
};
pci@2,0 {
status = "okay";
};
};
padctl@0,7009f000 {
pinctrl-0 = <&padctl_default>;
pinctrl-names = "default";
padctl_default: pinmux {
xusb {
nvidia,lanes = "otg-1", "otg-2";
nvidia,function = "xusb";
nvidia,iddq = <0>;
};
usb3 {
nvidia,lanes = "pcie-5", "pcie-6";
nvidia,function = "usb3";
nvidia,iddq = <0>;
};
pcie-x1 {
nvidia,lanes = "pcie-0";
nvidia,function = "pcie-x1";
nvidia,iddq = <0>;
};
pcie-x4 {
nvidia,lanes = "pcie-1", "pcie-2",
"pcie-3", "pcie-4";
nvidia,function = "pcie-x4";
nvidia,iddq = <0>;
};
sata {
nvidia,lanes = "sata-0";
nvidia,function = "sata";
nvidia,iddq = <0>;
};
};
};
sdhci@0,700b0000 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;

@ -6,6 +6,7 @@
*/
#include <common.h>
#include <netdev.h>
#include <i2c.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
@ -49,3 +50,32 @@ void pinmux_init(void)
pinmux_config_drvgrp_table(p2371_2180_drvgrps,
ARRAY_SIZE(p2371_2180_drvgrps));
}
#ifdef CONFIG_PCI_TEGRA
int tegra_pcie_board_init(void)
{
struct udevice *dev;
uchar val;
int ret;
/* Turn on MAX77620 LDO1 to 1.05V for PEX power */
debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__);
ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
return -1;
}
/* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
val = 0xCA;
ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret);
return 0;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
#endif /* PCI */

@ -53,6 +53,16 @@
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
#define CONFIG_PCI
#define CONFIG_PCI_TEGRA
#define CONFIG_PCI_PNP
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PCI_ENUM
/* PCI networking support */
#define CONFIG_RTL8169
/* General networking support */
#define CONFIG_CMD_DHCP

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