Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface). On wiring level it is similar to I2C, but on protocol level, it's multi-master and has simple autodetection capabilities. This commit adds simple uclass that provides bus read/write interface. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>master
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menu "SPMI support" |
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config SPMI |
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bool "Enable SPMI bus support" |
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depends on DM |
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---help--- |
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Select this to enable to support SPMI bus. |
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SPMI (System Power Management Interface) bus is used |
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to connect PMIC devices on various SoCs. |
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endmenu |
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#
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# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_SPMI) += spmi-uclass.o
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/*
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* SPMI bus uclass driver |
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* |
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* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <errno.h> |
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#include <dm/root.h> |
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#include <spmi/spmi.h> |
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#include <linux/ctype.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg) |
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{ |
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const struct dm_spmi_ops *ops = dev_get_driver_ops(dev); |
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if (!ops || !ops->read) |
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return -ENOSYS; |
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return ops->read(dev, usid, pid, reg); |
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} |
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int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg, |
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uint8_t value) |
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{ |
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const struct dm_spmi_ops *ops = dev_get_driver_ops(dev); |
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if (!ops || !ops->write) |
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return -ENOSYS; |
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return ops->write(dev, usid, pid, reg, value); |
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} |
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static int spmi_post_bind(struct udevice *dev) |
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{ |
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return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); |
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} |
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UCLASS_DRIVER(spmi) = { |
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.id = UCLASS_SPMI, |
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.name = "spmi", |
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.post_bind = spmi_post_bind, |
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}; |
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#ifndef _SPMI_SPMI_H |
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#define _SPMI_SPMI_H |
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/**
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* struct dm_spmi_ops - SPMI device I/O interface |
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* |
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* Should be implemented by UCLASS_SPMI device drivers. The standard |
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* device operations provides the I/O interface for it's childs. |
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* |
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* @read: read register 'reg' of slave 'usid' and peripheral 'pid' |
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* @write: write register 'reg' of slave 'usid' and peripheral 'pid' |
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* |
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* Each register is 8-bit, both read and write can return negative values |
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* on error. |
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*/ |
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struct dm_spmi_ops { |
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int (*read)(struct udevice *dev, int usid, int pid, int reg); |
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int (*write)(struct udevice *dev, int usid, int pid, int reg, |
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uint8_t value); |
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}; |
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/**
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* spmi_reg_read() - read a register from specific slave/peripheral |
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* |
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* @dev: SPMI bus to read |
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* @usid SlaveID |
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* @pid Peripheral ID |
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* @reg: Register to read |
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* @return value read on success or negative value of errno. |
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*/ |
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int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg); |
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/**
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* spmi_reg_write() - write a register of specific slave/peripheral |
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* |
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* @dev: SPMI bus to write |
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* @usid SlaveID |
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* @pid Peripheral ID |
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* @reg: Register to write |
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* @value: Value to write |
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* @return 0 on success or negative value of errno. |
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*/ |
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int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg, |
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uint8_t value); |
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#endif |
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