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@ -1,3 +1,206 @@ |
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commit ff285ca07eda1ea4a8909848cc1cc604ec8fec9c |
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Author: Vlad Lungu <vlad@comsys.ro> |
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Date: Thu Oct 4 20:47:10 2007 +0300 |
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Fix NE2000 driver: |
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Fixed typo in ne2000.h, thinko re n2k_inb() usage, don't try |
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to do anything in eth_stop() if eth_init() was not called. |
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Simplified RX path in order to avoid timeouts on really really |
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fast NE2000 cards (read: qemu with internal tftp), NetLoop() is |
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clever enough to cope with 1 packet per eth_rx(). |
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Signed-off-by: Vlad Lungu <vlad@comsys.ro> |
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commit 5441f61a3d8b7034f19fc1361183e936198e6dbb |
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Author: Detlev Zundel <dzu@denx.de> |
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Date: Fri Oct 19 16:47:26 2007 +0200 |
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Fix two typos. |
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Signed-off-by: Detlev Zundel <dzu@denx.de> |
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commit 281df457c1aa50d2752165d0c5c3282d4027b974 |
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Author: Tony Li <tony.li@freescale.com> |
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Date: Thu Oct 18 17:47:19 2007 +0800 |
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mpc83xx: Add configure entry for MPC83xx ATM support |
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Add MPC8360EMDS_ATM_config and MPC832XEMDS_ATM_config into |
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Makfile and MAKEALL |
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Signed-off-by: Tony Li <tony.li@freescale.com> |
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Signed-off-by: Kim Phillips <kim.phillips@freescale.com> |
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commit d2646554f529a9577515eceb0ec5eceee18244ba |
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Author: Tony Li <tony.li@freescale.com> |
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Date: Thu Oct 18 17:44:38 2007 +0800 |
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mpc83xx: pq-mds-pib.c typo error |
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Correct to val8 from val. |
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Signed-off-by: Tony Li <tony.li@freescale.com> |
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Signed-off-by: Kim Phillips <kim.phillips@freescale.com> |
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commit 3e11ae80fec1ee12194940955431186abf6009c2 |
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Author: Stefan Roese <sr@denx.de> |
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Date: Wed Oct 17 15:40:19 2007 +0200 |
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ppc4xx: Add 667/133 (CPU/PLB) frequency setup to Sequoia bootstrap command |
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Signed-off-by: Stefan Roese <sr@denx.de> |
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commit 7ee6ba1a056e4061ab4cfde30127e332e7957afd |
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Author: runet@innovsys.com <runet@innovsys.com> |
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Date: Tue Oct 16 14:50:40 2007 -0500 |
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Make MPC8266ADS board compile again. |
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Signed-off-by: Runet Torgersen <runet@innovsys.com> |
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commit 2491167c245d8ebe6f2dbd8c4287aaa0d14fe93a |
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Author: Jon Loeliger <jdl@freescale.com> |
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Date: Mon Aug 27 12:41:03 2007 -0500 |
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86xx: Allow for fewer DDR slots per memory controller. |
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As a direct correlation exists between DDR DIMM slots |
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and SPD EEPROM addresses used to configure them, use |
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the individually defined SPD_EEPROM_ADDRESS* values to |
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determine if a DDR DIMM slot should have its SPD |
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configuration read or not. |
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Effectively, this now allows for 1 or 2 DIMM slots |
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per memory controller. |
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Signed-off-by: Jon Loeliger <jdl@freescale.com> |
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commit 4d4a945e189a2f384c66432316da2788a0ac1607 |
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Author: Rodolfo Giometti <giometti@enneenne.com> |
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Date: Mon Oct 15 11:59:17 2007 +0200 |
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PXA USB OHCI: "usb stop" implementation. |
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Some USB keys need to be switched off before loading the kernel |
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otherwise they can remain in an undefined status which prevents them |
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to be correctly recognized by the kernel. |
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Signed-off-by: Rodolfo Giometti <giometti@linux.it> |
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commit e2e93442e558cf1500e92861f99713b2f045ea22 |
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Author: Stefan Roese <sr@denx.de> |
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Date: Mon Oct 15 11:39:00 2007 +0200 |
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ppc4xx: Fix bug in I2C bootstrap values for Sequoia/Rainier |
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The I2C bootstrap values that can be setup via the "bootstrap" command, |
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were setup incorrect regarding the generation of the internal sync PCI |
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clock. The values for PLB clock == 133MHz were slighly incorrect and the |
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values for PLB clock == 166MHz were totally incorrect. This could |
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lead to a hangup upon booting while PCI configuration scan. |
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This patch fixes this issue and configures valid PCI divisor values |
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for the sync PCI clock, with respect to the provided external async |
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PCI frequency. |
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Here the values of the formula in the chapter 14.2 "PCI clocking" |
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from the 440EPx users manual: |
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AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz |
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33MHz async PCI frequency: |
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PLB = 133: |
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=> 32 <= 44.3 <= 65 (div = 3) |
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PLB = 166: |
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=> 32 <= 55.3 <= 65 (div = 3) |
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66MHz async PCI frequency: |
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PLB = 133: |
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=> 65 <= 66.5 <= 132 (div = 2) |
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PLB = 166: |
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=> 65 <= 83 <= 132 (div = 2) |
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Signed-off-by: Stefan Roese <sr@denx.de> |
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commit 5a5958b7de70ae99f0e7cbd5c97ec1346e051587 |
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Author: Stefan Roese <sr@denx.de> |
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Date: Mon Oct 15 11:29:33 2007 +0200 |
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ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite |
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The BCSR status bit for the 66MHz PCI operation was correctly |
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addressed (MSB/LSB problem). Now the correct currently setup |
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PCI frequency is displayed upon bootup. |
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This patch also fixes this problem on Rainier & Yellowstone, since these |
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boards use the same souce code as Sequoia & Yosemite do. |
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Signed-off-by: Stefan Roese <sr@denx.de> |
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commit da3aad55cbde80ab6e301aafa82a2c411aa53eff |
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Author: Martin Krause <martin.krause@tqs.de> |
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Date: Wed Sep 26 17:55:56 2007 +0200 |
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TQM860M: adjust for doubled flash sector size. |
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Adjust flash map to support the new S29GLxxN (N-Type) Flashes with |
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doubled sector size. |
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Signed-off-by: Martin Krause <martin.krause@tqs.de> |
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commit 9d29250e2e62f4bf20c7a20b4173d84c48f11f5d |
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Author: Jens Gehrlein <jens.gehrlein@tqs.de> |
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Date: Wed Sep 26 17:55:54 2007 +0200 |
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TQM8xx: Fix CAN timing. |
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Signed-off-by: Martin Krause <martin.krause@tqs.de> |
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commit d43e489baf02afae49077791fb22332d240d8656 |
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Author: Martin Krause <martin.krause@tqs.de> |
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Date: Thu Sep 27 14:54:36 2007 +0200 |
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TQM866M: fix SDRAM refresh |
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At 133 MHz the current SDRAM refresh rate is too fast |
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(measured 4 * 1.17 us). |
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CFG_MAMR_PTA changes from 39 to 97. This result |
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in a refresh rate of 4 * 7.8 us at the default clock |
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50 MHz. At 133 MHz the value will be then 4 * 2.9 us. |
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This is a compromise until a new method is found to |
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adjust the refresh rate. |
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Signed-off-by: Martin Krause <martin.krause@tqs.de> |
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commit 9ef57bbee1c67cc01da2026c242c4692db32be36 |
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Author: Martin Krause <martin.krause@tqs.de> |
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Date: Wed Sep 26 17:55:55 2007 +0200 |
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TQM866M: adjust for doubled flash sector size. |
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Adjust flash map to support the new S29GLxxN (N-Type) Flashes with |
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doubled sector size. |
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Signed-off-by: Martin Krause <martin.krause@tqs.de> |
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commit f8bf90461d9bad2e6fed31fcebaf235f60dd6763 |
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Author: Michal Simek <monstr@monstr.eu> |
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Date: Sun Oct 14 16:12:29 2007 +0200 |
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[FIX] XUPV2P change command handling |
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and remove code violation |
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commit 636400198228d96983c06657b17f760f5989958e |
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Author: Wolfgang Denk <wd@denx.de> |
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Date: Sun Oct 14 00:13:19 2007 +0200 |
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Prepare for 1.3.0-rc3 release |
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Signed-off-by: Wolfgang Denk <wd@denx.de> |
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commit 68f14f77ca5fe5f9cc025c8cae101671f628309f |
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Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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Date: Sat Sep 29 13:41:37 2007 +0200 |
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@ -109,6 +312,26 @@ Date: Mon Oct 1 09:51:50 2007 +0200 |
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Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> |
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commit 785c13477b77dcd2e6c5128fffcdb4e1943f4818 |
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Author: Timo Ketola <timo.ketola@exertus.fi> |
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Date: Mon Sep 24 14:50:32 2007 +0300 |
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Bugfix: Use only one PTD for one endpoint |
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Original isp116x-hcd code prepared multiple PTDs for longer than 16 |
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byte transfers for one endpoint. That is unnecessary because the |
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ISP116x is able to split long data from one PTD into multiple |
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transactions based on the buffer size of the endpoint. It also caused |
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serious problems if the endpoint NAKed some of the transactions. In |
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that case ISP116x wouldn't notice that the other PTDs were for the same |
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endpoint and would try the other PTDs possibly out of order. That would |
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break the whole transfer. |
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This patch makes isp116x_submit_job to use one PTD for one transfer. |
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Signed-off-by: Timo Ketola <timo.ketola@exertus.fi> |
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Signed-off-by: Markus Klotzbuecher <mk@denx.de> |
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commit 86ec86c04326c3913178a7679aa910de071da75d |
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Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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Date: Thu Sep 27 23:27:47 2007 +0200 |
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@ -331,6 +554,12 @@ Date: Mon Sep 10 17:13:49 2007 +0900 |
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Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> |
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commit b49c90df6e7cfcfb8b862b8bbf8448dff5eed9a5 |
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Author: Michal Simek <monstr@monstr.eu> |
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Date: Sun Sep 16 20:51:57 2007 +0200 |
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[FIX] remove files form repository |
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commit 67c31036acaaaa992fc346cc89db0909a7e733c4 |
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Author: Wolfgang Denk <wd@denx.de> |
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Date: Sun Sep 16 17:10:04 2007 +0200 |
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@ -478,6 +707,25 @@ Date: Sat Sep 15 11:55:42 2007 +0200 |
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[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805 |
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commit 991b089d1ce5ad945725e3657a8f106dfa02a38e |
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Author: Michal Simek <monstr@monstr.eu> |
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Date: Sat Sep 15 00:03:35 2007 +0200 |
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Synchronize with U-BOOT mainline |
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commit d7fee32b7e61fe11c64e371cde79faa4768e8350 |
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Author: Sam Sparks <SSparks@twacs.com> |
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Date: Fri Sep 14 11:14:42 2007 -0600 |
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Update MPC8349ITX*_config to place config.tmp in right place. |
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MPC834ITX*_config does not store config.tmp at the correct locatation, |
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causing MPC8349ITXGP to have the wrong TEXT_BASE. |
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Signed-off-by: Sam Sparks <SSparks@twacs.com> |
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca> |
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Signed-off-by: Kim Phillips <kim.phillips@freescale.com> |
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commit 6e7b7b6ea1b6d04dbe96242eb6a0c1c664c98e8c |
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Author: Bartlomiej Sieka <tur@semihalf.com> |
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Date: Thu Sep 13 18:21:48 2007 +0200 |
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