Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: trini@ti.commaster
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#
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# Makefile
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#
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# Copyright (C) 2014 Hannes Petermaier <oe5hpm@oevsv.at> -
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# Bernecker & Rainer Industrielektronik GmbH - http://www.br-automation.com/
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_SPL_BUILD) += mux.o
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obj-y += ../common/common.o
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obj-y += board.o
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/*
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* board.c |
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* |
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* Board functions for B&R KWB Board |
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* |
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* Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> |
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* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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* |
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*/ |
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#include <common.h> |
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#include <errno.h> |
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#include <spl.h> |
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#include <asm/arch/cpu.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/omap.h> |
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#include <asm/arch/ddr_defs.h> |
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#include <asm/arch/clock.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/sys_proto.h> |
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#include <asm/arch/mem.h> |
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#include <asm/io.h> |
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#include <asm/emif.h> |
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#include <asm/gpio.h> |
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#include <i2c.h> |
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#include <power/tps65217.h> |
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#include "../common/bur_common.h" |
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/* -------------------------------------------------------------------------*/ |
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/* -- defines for used GPIO Hardware -- */ |
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#define KEY (0+4) |
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#define LCD_PWR (0+5) |
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#define PUSH_KEY (0+31) |
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#define USB2SD_NRST (32+29) |
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#define USB2SD_PWR (96+13) |
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/* -------------------------------------------------------------------------*/ |
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/* -- PSOC Resetcontroller Register defines -- */ |
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/* I2C Address of controller */ |
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#define RSTCTRL_ADDR 0x75 |
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/* Register for CTRL-word */ |
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#define RSTCTRL_CTRLREG 0x01 |
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/* Register for giving some information to VxWorks OS */ |
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#define RSTCTRL_SCRATCHREG 0x04 |
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/* -- defines for RSTCTRL_CTRLREG -- */ |
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#define RSTCTRL_FORCE_PWR_NEN 0x0404 |
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#if defined(CONFIG_SPL_BUILD) |
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/* TODO: check ram-timing ! */ |
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static const struct ddr_data ddr3_data = { |
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.datardsratio0 = MT41K256M16HA125E_RD_DQS, |
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.datawdsratio0 = MT41K256M16HA125E_WR_DQS, |
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.datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, |
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.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, |
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}; |
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static const struct cmd_control ddr3_cmd_ctrl_data = { |
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.cmd0csratio = MT41K256M16HA125E_RATIO, |
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.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
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.cmd1csratio = MT41K256M16HA125E_RATIO, |
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.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
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.cmd2csratio = MT41K256M16HA125E_RATIO, |
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.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, |
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}; |
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static struct emif_regs ddr3_emif_reg_data = { |
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.sdram_config = MT41K256M16HA125E_EMIF_SDCFG, |
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.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, |
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.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, |
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.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, |
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.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, |
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.zq_config = MT41K256M16HA125E_ZQ_CFG, |
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.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, |
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}; |
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static const struct ctrl_ioregs ddr3_ioregs = { |
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.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
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.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
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.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
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.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
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.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, |
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}; |
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#define OSC (V_OSCK/1000000) |
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const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1}; |
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void am33xx_spl_board_init(void) |
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{ |
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unsigned int oldspeed; |
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unsigned short buf; |
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struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER; |
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struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP; |
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/*
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* enable additional clocks of modules which are accessed later from |
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* VxWorks OS |
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*/ |
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u32 *const clk_domains[] = { 0 }; |
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u32 *const clk_modules_kwbspecific[] = { |
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&cmwkup->wkup_adctscctrl, |
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&cmper->spi1clkctrl, |
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&cmper->dcan0clkctrl, |
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&cmper->dcan1clkctrl, |
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&cmper->epwmss0clkctrl, |
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&cmper->epwmss1clkctrl, |
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&cmper->epwmss2clkctrl, |
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0 |
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}; |
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do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1); |
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/* power-OFF LCD-Display */ |
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gpio_direction_output(LCD_PWR, 0); |
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/* setup I2C */ |
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enable_i2c0_pin_mux(); |
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); |
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/* power-ON 3V3 via Resetcontroller */ |
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oldspeed = i2c_get_bus_speed(); |
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if (0 != i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC)) { |
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buf = RSTCTRL_FORCE_PWR_NEN; |
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i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1, |
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(uint8_t *)&buf, sizeof(buf)); |
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i2c_set_bus_speed(oldspeed); |
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} else { |
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puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n"); |
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} |
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#if defined(CONFIG_AM335X_USB0) |
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/* power on USB2SD Controller */ |
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gpio_direction_output(USB2SD_PWR, 1); |
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mdelay(1); |
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/* give a reset Pulse to USB2SD Controller */ |
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gpio_direction_output(USB2SD_NRST, 0); |
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mdelay(1); |
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gpio_set_value(USB2SD_NRST, 1); |
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#endif |
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pmicsetup(0); |
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} |
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const struct dpll_params *get_dpll_ddr_params(void) |
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{ |
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return &dpll_ddr3; |
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} |
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void sdram_init(void) |
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{ |
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config_ddr(400, &ddr3_ioregs, |
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&ddr3_data, |
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&ddr3_cmd_ctrl_data, |
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&ddr3_emif_reg_data, 0); |
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} |
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#endif /* CONFIG_SPL_BUILD */ |
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/*
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* Basic board specific setup. Pinmux has been handled already. |
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*/ |
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int board_init(void) |
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{ |
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gpmc_init(); |
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return 0; |
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} |
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#ifdef CONFIG_BOARD_LATE_INIT |
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int board_late_init(void) |
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{ |
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const unsigned int ton = 250; |
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const unsigned int toff = 1000; |
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unsigned int cnt = 3; |
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unsigned short buf = 0xAAAA; |
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unsigned int oldspeed; |
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tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
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TPS65217_WLEDCTRL2, 0x32, 0xFF); /* 50% dimlevel */ |
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if (gpio_get_value(KEY)) { |
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do { |
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/* turn on light */ |
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tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
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TPS65217_WLEDCTRL1, 0x09, 0xFF); |
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mdelay(ton); |
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/* turn off light */ |
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tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
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TPS65217_WLEDCTRL1, 0x01, 0xFF); |
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mdelay(toff); |
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cnt--; |
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if (!gpio_get_value(KEY) && |
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gpio_get_value(PUSH_KEY) && 1 == cnt) { |
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puts("updating from USB ...\n"); |
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setenv("bootcmd", "run usbupdate"); |
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break; |
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} else if (!gpio_get_value(KEY)) { |
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break; |
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} |
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} while (cnt); |
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} |
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switch (cnt) { |
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case 0: |
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puts("3 blinks ... entering BOOT mode.\n"); |
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buf = 0x0000; |
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break; |
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case 1: |
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puts("2 blinks ... entering DIAGNOSE mode.\n"); |
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buf = 0x0F0F; |
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break; |
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case 2: |
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puts("1 blinks ... entering SERVICE mode.\n"); |
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buf = 0xB4B4; |
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break; |
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case 3: |
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puts("0 blinks ... entering RUN mode.\n"); |
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buf = 0x0404; |
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break; |
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} |
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mdelay(ton); |
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/* turn on light */ |
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tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
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TPS65217_WLEDCTRL1, 0x09, 0xFF); |
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/* write bootinfo into scratchregister of resetcontroller */ |
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oldspeed = i2c_get_bus_speed(); |
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if (0 != i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC)) { |
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i2c_write(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1, |
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(uint8_t *)&buf, sizeof(buf)); |
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i2c_set_bus_speed(oldspeed); |
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} else { |
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puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n"); |
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} |
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/*
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* reset VBAR registers to its reset location, VxWorks 6.9.3.2 does |
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* expect that vectors are there, original u-boot moves them to _start |
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*/ |
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__asm__("ldr r0,=0x20000"); |
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__asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */ |
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return 0; |
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} |
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#endif /* CONFIG_BOARD_LATE_INIT */ |
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/*
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* mux.c |
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* |
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* Pinmux Setting for B&R LEIT Board(s) |
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* |
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* Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> |
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* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/arch/sys_proto.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/mux.h> |
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#include <asm/io.h> |
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#include <i2c.h> |
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static struct module_pin_mux usb0_pin_mux[] = { |
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{OFFSET(usb0_id), (MODE(0) | RXACTIVE)}, |
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/* USB0 DrvBus Receiver disable (from romcode 0x20) */ |
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{OFFSET(usb0_drvvbus), (MODE(0))}, |
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/* USB1 DrvBus as GPIO due to HW-Workaround */ |
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{OFFSET(usb1_drvvbus), (MODE(7))}, |
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{-1}, |
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}; |
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static struct module_pin_mux spi1_pin_mux[] = { |
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/* SPI1_SCLK */ |
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{OFFSET(mcasp0_aclkx), MODE(3) | PULLUDEN | RXACTIVE}, |
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/* SPI1_D0 */ |
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{OFFSET(mcasp0_fsx), MODE(3) | PULLUDEN | RXACTIVE}, |
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/* SPI1_D1 */ |
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{OFFSET(mcasp0_axr0), MODE(3) | PULLUDEN | RXACTIVE}, |
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/* SPI1_CS0 */ |
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{OFFSET(mcasp0_ahclkr), MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE}, |
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{-1}, |
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}; |
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static struct module_pin_mux dcan0_pin_mux[] = { |
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/* DCAN0 TX */ |
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{OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN}, |
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/* DCAN0 RX */ |
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{OFFSET(uart1_rtsn), MODE(2) | RXACTIVE}, |
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{-1}, |
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}; |
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static struct module_pin_mux dcan1_pin_mux[] = { |
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/* DCAN1 TX */ |
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{OFFSET(uart1_rxd), MODE(2) | PULLUDEN | PULLUP_EN}, |
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/* DCAN1 RX */ |
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{OFFSET(uart1_txd), MODE(2) | RXACTIVE}, |
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{-1}, |
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}; |
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static struct module_pin_mux gpios[] = { |
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/* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */ |
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{OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)}, |
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/* GPIO0_4 (SPI D1) - TA602 */ |
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{OFFSET(spi0_d1), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
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/* GPIO0_5 (SPI CS0) - DISPLAY_ON_OFF */ |
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{OFFSET(spi0_cs0), (MODE(7) | PULLUDDIS)}, |
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/* GPIO0_7 (PWW0 OUT) - CAN TERM */ |
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{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
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/* GPIO0_19 (DMA_INTR0) - CLKOUT SYS */ |
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{OFFSET(xdma_event_intr0), (MODE(7) | RXACTIVE)}, |
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/* GPIO0_20 (DMA_INTR1) - SPI1 nCS1 */ |
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{OFFSET(xdma_event_intr1), (MODE(7) | PULLUDEN | PULLUP_EN)}, |
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/* GPIO0_30 (GPMC_WAIT0) - TA601 */ |
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{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
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/* GPIO0_31 (GPMC_nWP) - SW601 PushButton */ |
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{OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
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/* GPIO1_28 (GPMC_nWE) - FRAM_nWP */ |
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{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, |
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/* GPIO2_0 (GPMC_nCS3) - VBAT_OK */ |
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{OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) }, |
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/* GPIO2_2 (GPMC_nADV_ALE) - DCOK */ |
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{OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)}, |
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/* GPIO2_4 (GPMC_nWE) - TST_BAST */ |
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{OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)}, |
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/* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */ |
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{OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)}, |
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/* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */ |
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{OFFSET(mcasp0_fsr), (MODE(1) | PULLUDDIS | RXACTIVE)}, |
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/* GPIO3_20 (MCASP0_AXR1) - SW601 CNTdown, map to Counter eQEB0_index */ |
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{OFFSET(mcasp0_axr1), (MODE(1) | PULLUDDIS | RXACTIVE)}, |
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{-1}, |
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}; |
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static struct module_pin_mux uart0_pin_mux[] = { |
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/* UART0_CTS */ |
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{OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, |
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/* UART0_RXD */ |
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{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, |
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/* UART0_TXD */ |
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{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, |
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{-1}, |
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}; |
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static struct module_pin_mux i2c0_pin_mux[] = { |
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/* I2C_DATA */ |
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{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, |
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/* I2C_SCLK */ |
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{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, |
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{-1}, |
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}; |
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static struct module_pin_mux mii1_pin_mux[] = { |
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{OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */ |
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{OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */ |
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{OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */ |
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{OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */ |
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{OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */ |
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{OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */ |
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{OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */ |
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{OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */ |
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{OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */ |
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{OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */ |
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{OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */ |
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{OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */ |
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{OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */ |
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{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */ |
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{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ |
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{-1}, |
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}; |
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static struct module_pin_mux mmc1_pin_mux[] = { |
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{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */ |
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{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */ |
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{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */ |
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{OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */ |
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{OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */ |
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{OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */ |
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{OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */ |
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{OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */ |
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{-1}, |
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}; |
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static struct module_pin_mux lcd_pin_mux[] = { |
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{OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, /* LCD-Data(0) */ |
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{OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, /* LCD-Data(1) */ |
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{OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, /* LCD-Data(2) */ |
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{OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, /* LCD-Data(3) */ |
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{OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, /* LCD-Data(4) */ |
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{OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, /* LCD-Data(5) */ |
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{OFFSET(lcd_data6), (MODE(0) | PULLUDDIS)}, /* LCD-Data(6) */ |
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{OFFSET(lcd_data7), (MODE(0) | PULLUDDIS)}, /* LCD-Data(7) */ |
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{OFFSET(lcd_data8), (MODE(0) | PULLUDDIS)}, /* LCD-Data(8) */ |
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{OFFSET(lcd_data9), (MODE(0) | PULLUDDIS)}, /* LCD-Data(9) */ |
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{OFFSET(lcd_data10), (MODE(0) | PULLUDDIS)}, /* LCD-Data(10) */ |
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{OFFSET(lcd_data11), (MODE(0) | PULLUDDIS)}, /* LCD-Data(11) */ |
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{OFFSET(lcd_data12), (MODE(0) | PULLUDDIS)}, /* LCD-Data(12) */ |
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{OFFSET(lcd_data13), (MODE(0) | PULLUDDIS)}, /* LCD-Data(13) */ |
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{OFFSET(lcd_data14), (MODE(0) | PULLUDDIS)}, /* LCD-Data(14) */ |
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{OFFSET(lcd_data15), (MODE(0) | PULLUDDIS)}, /* LCD-Data(15) */ |
||||
|
||||
{OFFSET(gpmc_ad8), (MODE(1) | PULLUDDIS)}, /* LCD-Data(16) */ |
||||
{OFFSET(gpmc_ad9), (MODE(1) | PULLUDDIS)}, /* LCD-Data(17) */ |
||||
{OFFSET(gpmc_ad10), (MODE(1) | PULLUDDIS)}, /* LCD-Data(18) */ |
||||
{OFFSET(gpmc_ad11), (MODE(1) | PULLUDDIS)}, /* LCD-Data(19) */ |
||||
{OFFSET(gpmc_ad12), (MODE(1) | PULLUDDIS)}, /* LCD-Data(20) */ |
||||
{OFFSET(gpmc_ad13), (MODE(1) | PULLUDDIS)}, /* LCD-Data(21) */ |
||||
{OFFSET(gpmc_ad14), (MODE(1) | PULLUDDIS)}, /* LCD-Data(22) */ |
||||
{OFFSET(gpmc_ad15), (MODE(1) | PULLUDDIS)}, /* LCD-Data(23) */ |
||||
|
||||
{OFFSET(lcd_vsync), (MODE(0) | PULLUDDIS)}, /* LCD-VSync */ |
||||
{OFFSET(lcd_hsync), (MODE(0) | PULLUDDIS)}, /* LCD-HSync */ |
||||
{OFFSET(lcd_ac_bias_en), (MODE(0) | PULLUDDIS)},/* LCD-DE */ |
||||
{OFFSET(lcd_pclk), (MODE(0) | PULLUDDIS)}, /* LCD-CLK */ |
||||
|
||||
{-1}, |
||||
}; |
||||
|
||||
void enable_uart0_pin_mux(void) |
||||
{ |
||||
configure_module_pin_mux(uart0_pin_mux); |
||||
} |
||||
|
||||
void enable_i2c0_pin_mux(void) |
||||
{ |
||||
configure_module_pin_mux(i2c0_pin_mux); |
||||
} |
||||
|
||||
void enable_board_pin_mux(void) |
||||
{ |
||||
configure_module_pin_mux(i2c0_pin_mux); |
||||
configure_module_pin_mux(mii1_pin_mux); |
||||
configure_module_pin_mux(usb0_pin_mux); |
||||
configure_module_pin_mux(spi1_pin_mux); |
||||
configure_module_pin_mux(dcan0_pin_mux); |
||||
configure_module_pin_mux(dcan1_pin_mux); |
||||
configure_module_pin_mux(mmc1_pin_mux); |
||||
configure_module_pin_mux(lcd_pin_mux); |
||||
configure_module_pin_mux(gpios); |
||||
} |
@ -0,0 +1,128 @@ |
||||
/*
|
||||
* kwb.h |
||||
* |
||||
* specific parts for B&R KWB Motherboard |
||||
* |
||||
* Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at> - |
||||
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
|
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_KWB_H__ |
||||
#define __CONFIG_KWB_H__ |
||||
|
||||
#include <configs/bur_am335x_common.h> |
||||
/* ------------------------------------------------------------------------- */ |
||||
/* Clock Defines */ |
||||
#define V_OSCK 26000000 /* Clock output from T2 */ |
||||
#define V_SCLK (V_OSCK) |
||||
|
||||
#define CONFIG_POWER_TPS65217 |
||||
|
||||
#define CONFIG_MACH_TYPE 3589 |
||||
/* I2C IP block */ |
||||
#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 20000 |
||||
|
||||
/* GPIO */ |
||||
#define CONFIG_SPL_GPIO_SUPPORT |
||||
|
||||
/* MMC/SD IP block */ |
||||
#define CONFIG_MMC |
||||
#define CONFIG_GENERIC_MMC |
||||
#define CONFIG_OMAP_HSMMC |
||||
#define CONFIG_CMD_MMC |
||||
#define CONFIG_SUPPORT_EMMC_BOOT |
||||
/* RAW SD card / eMMC locations. */ |
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /*addr. 0x60000 */ |
||||
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ |
||||
#define CONFIG_SPL_MMC_SUPPORT |
||||
|
||||
#undef CONFIG_SPL_OS_BOOT |
||||
#ifdef CONFIG_SPL_OS_BOOT |
||||
#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000 |
||||
|
||||
/* RAW SD card / eMMC */ |
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ |
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ |
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ |
||||
|
||||
#endif /* CONFIG_SPL_OS_BOOT */ |
||||
|
||||
/* Always 128 KiB env size */ |
||||
#define CONFIG_ENV_SIZE (128 << 10) |
||||
|
||||
#ifndef CONFIG_SPL_BUILD |
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"autoload=0\0" \
|
||||
"loadaddr=0x80100000\0" \
|
||||
"bootfile=arimg\0" \
|
||||
"usbboot=echo Booting from USB-Stick ...; " \
|
||||
"usb start; " \
|
||||
"fatload usb 0 ${loadaddr} ${bootfile}; " \
|
||||
"usb stop; " \
|
||||
"go ${loadaddr};\0" \
|
||||
"netboot=echo Booting from network ...; " \
|
||||
"setenv autoload 0; " \
|
||||
"dhcp; " \
|
||||
"tftp ${loadaddr} arimg; " \
|
||||
"go ${loadaddr}\0" \
|
||||
"usbupdate=echo Updating UBOOT from USB-Stick ...; " \
|
||||
"usb start; " \
|
||||
"fatload usb 0 0x80000000 updateubootusb.img; " \
|
||||
"source;\0" \
|
||||
"netupdate=echo Updating UBOOT from Network (TFTP) ...; " \
|
||||
"setenv autoload 0; " \
|
||||
"dhcp;" \
|
||||
"tftp 0x80000000 updateUBOOT.img;" \
|
||||
"source;\0" |
||||
#endif /* !CONFIG_SPL_BUILD*/ |
||||
|
||||
#define CONFIG_BOOTCOMMAND \ |
||||
"run usbupdate;" |
||||
#define CONFIG_BOOTDELAY 1 /* TODO: für release auf 0 setzen */ |
||||
|
||||
/* undefine command which we not need here */ |
||||
#undef CONFIG_BOOTM_LINUX |
||||
#undef CONFIG_BOOTM_NETBSD |
||||
#undef CONFIG_BOOTM_PLAN9 |
||||
#undef CONFIG_BOOTM_RTEMS |
||||
#undef CONFIG_GZIP |
||||
#undef CONFIG_ZLIB |
||||
#undef CONFIG_CMD_CRC32 |
||||
|
||||
/* USB configuration */ |
||||
#define CONFIG_USB_MUSB_DSPS |
||||
#define CONFIG_ARCH_MISC_INIT |
||||
#define CONFIG_MUSB_PIO_ONLY |
||||
#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT |
||||
/* attention! not only for gadget, enables also highspeed in hostmode */ |
||||
#define CONFIG_USB_GADGET_DUALSPEED |
||||
#define CONFIG_MUSB_HOST |
||||
#define CONFIG_AM335X_USB0 |
||||
#define CONFIG_AM335X_USB0_MODE MUSB_HOST |
||||
|
||||
#ifdef CONFIG_MUSB_HOST |
||||
#define CONFIG_CMD_USB |
||||
#define CONFIG_USB_STORAGE |
||||
#endif /* CONFIG_MUSB_HOST */ |
||||
|
||||
#undef CONFIG_ENV_IS_NOWHERE |
||||
#define CONFIG_ENV_IS_IN_MMC |
||||
#define CONFIG_SYS_MMC_ENV_DEV 1 |
||||
#define CONFIG_SYS_MMC_ENV_PART 2 |
||||
#define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */ |
||||
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) |
||||
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT |
||||
/*
|
||||
* Common filesystems support. When we have removable storage we |
||||
* enabled a number of useful commands and support. |
||||
*/ |
||||
#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE) |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_FAT_WRITE |
||||
#define CONFIG_CMD_FS_GENERIC |
||||
#endif /* CONFIG_MMC, ... */ |
||||
|
||||
#endif /* ! __CONFIG_TSERIES_H__ */ |
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Reference in new issue