Patch by Anders Larsen, 29 Apr 2005
* Fix problems introduced by Patch by Steven Scholz, 02 Mar 2005
(8e2be51de8)
master
Wolfgang Denk
20 years ago
parent
29ca46c445
commit
080bdb7f3a
@ -1,243 +0,0 @@ |
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/*
|
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* (C) Copyright 2003 |
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* Author : Hamid Ikdoumi (Atmel) |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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#include <at91rm9200_net.h> |
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#include <net.h> |
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#include <dm9161.h> |
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#ifdef CONFIG_DRIVER_ETHER |
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#if (CONFIG_COMMANDS & CFG_CMD_NET) |
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/*
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* Name: |
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* dm9161_IsPhyConnected |
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* Description: |
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* Reads the 2 PHY ID registers |
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* Arguments: |
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* p_mac - pointer to AT91S_EMAC struct |
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* Return value: |
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* TRUE - if id read successfully |
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* FALSE- if error |
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*/ |
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static unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac) |
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{ |
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unsigned short Id1, Id2; |
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at91rm9200_EmacEnableMDIO (p_mac); |
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at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID1, &Id1); |
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at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID2, &Id2); |
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at91rm9200_EmacDisableMDIO (p_mac); |
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|
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if ((Id1 == (DM9161_PHYID1_OUI >> 6)) && |
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((Id2 >> 10) == (DM9161_PHYID1_OUI & DM9161_LSB_MASK))) |
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return TRUE; |
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return FALSE; |
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} |
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|
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/*
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* Name: |
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* dm9161_GetLinkSpeed |
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* Description: |
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* Link parallel detection status of MAC is checked and set in the |
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* MAC configuration registers |
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* Arguments: |
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* p_mac - pointer to MAC |
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* Return value: |
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* TRUE - if link status set succesfully |
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* FALSE - if link status not set |
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*/ |
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static UCHAR dm9161_GetLinkSpeed (AT91PS_EMAC p_mac) |
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{ |
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unsigned short stat1, stat2; |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &stat1)) |
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return FALSE; |
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if (!(stat1 & DM9161_LINK_STATUS)) /* link status up? */ |
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return FALSE; |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_DSCSR, &stat2)) |
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return FALSE; |
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if ((stat1 & DM9161_100BASE_TX_FD) && (stat2 & DM9161_100FDX)) { |
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/*set Emac for 100BaseTX and Full Duplex */ |
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p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
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return TRUE; |
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} |
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if ((stat1 & DM9161_10BASE_T_FD) && (stat2 & DM9161_10FDX)) { |
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/*set MII for 10BaseT and Full Duplex */ |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_FD; |
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return TRUE; |
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} |
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if ((stat1 & DM9161_100BASE_T4_HD) && (stat2 & DM9161_100HDX)) { |
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/*set MII for 100BaseTX and Half Duplex */ |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_SPD; |
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return TRUE; |
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} |
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if ((stat1 & DM9161_10BASE_T_HD) && (stat2 & DM9161_10HDX)) { |
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/*set MII for 10BaseT and Half Duplex */ |
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p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); |
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return TRUE; |
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} |
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return FALSE; |
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} |
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/*
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* Name: |
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* dm9161_InitPhy |
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* Description: |
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* MAC starts checking its link by using parallel detection and |
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* Autonegotiation and the same is set in the MAC configuration registers |
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* Arguments: |
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* p_mac - pointer to struct AT91S_EMAC |
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* Return value: |
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* TRUE - if link status set succesfully |
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* FALSE - if link status not set |
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*/ |
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static UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac) |
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{ |
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UCHAR ret = TRUE; |
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unsigned short IntValue; |
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at91rm9200_EmacEnableMDIO (p_mac); |
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if (!dm9161_GetLinkSpeed (p_mac)) { |
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/* Try another time */ |
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ret = dm9161_GetLinkSpeed (p_mac); |
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} |
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/* Disable PHY Interrupts */ |
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at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue); |
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/* clear FDX, SPD, Link, INTR masks */ |
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IntValue &= ~(DM9161_FDX_MASK | DM9161_SPD_MASK | |
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DM9161_LINK_MASK | DM9161_INTR_MASK); |
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at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue); |
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at91rm9200_EmacDisableMDIO (p_mac); |
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return (ret); |
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} |
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/*
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* Name: |
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* dm9161_AutoNegotiate |
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* Description: |
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* MAC Autonegotiates with the partner status of same is set in the |
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* MAC configuration registers |
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* Arguments: |
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* dev - pointer to struct net_device |
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* Return value: |
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* TRUE - if link status set successfully |
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* FALSE - if link status not set |
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*/ |
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static UCHAR dm9161_AutoNegotiate (AT91PS_EMAC p_mac, int *status) |
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{ |
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unsigned short value; |
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unsigned short PhyAnar; |
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unsigned short PhyAnalpar; |
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/* Set dm9161 control register */ |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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value &= ~DM9161_AUTONEG; /* remove autonegotiation enable */ |
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value |= DM9161_ISOLATE; /* Electrically isolate PHY */ |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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/* Set the Auto_negotiation Advertisement Register */ |
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/* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */ |
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PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX | |
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DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3; |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_ANAR, &PhyAnar)) |
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return FALSE; |
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/* Read the Control Register */ |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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value |= DM9161_SPEED_SELECT | DM9161_AUTONEG | DM9161_DUPLEX_MODE; |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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/* Restart Auto_negotiation */ |
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value |= DM9161_RESTART_AUTONEG; |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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/*check AutoNegotiate complete */ |
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udelay (10000); |
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at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &value); |
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if (!(value & DM9161_AUTONEG_COMP)) |
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return FALSE; |
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/* Get the AutoNeg Link partner base page */ |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_ANLPAR, &PhyAnalpar)) |
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return FALSE; |
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if ((PhyAnar & DM9161_TX_FDX) && (PhyAnalpar & DM9161_TX_FDX)) { |
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/*set MII for 100BaseTX and Full Duplex */ |
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p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
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return TRUE; |
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} |
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if ((PhyAnar & DM9161_10_FDX) && (PhyAnalpar & DM9161_10_FDX)) { |
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/*set MII for 10BaseT and Full Duplex */ |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_FD; |
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return TRUE; |
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} |
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return FALSE; |
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} |
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/*
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* Name: |
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* at91rm92000_GetPhyInterface |
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* Description: |
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* Initialise the interface functions to the PHY |
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* Arguments: |
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* None |
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* Return value: |
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* None |
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*/ |
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void at91rm92000_GetPhyInterface(AT91PS_PhyOps p_phyops) |
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{ |
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p_phyops->Init = dm9161_InitPhy; |
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p_phyops->IsPhyConnected = dm9161_IsPhyConnected; |
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p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed; |
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p_phyops->AutoNegotiate = dm9161_AutoNegotiate; |
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} |
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#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ |
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#endif /* CONFIG_DRIVER_ETHER */ |
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@ -1,243 +0,0 @@ |
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/*
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* (C) Copyright 2003 |
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* Author : Hamid Ikdoumi (Atmel) |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <at91rm9200_net.h> |
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#include <net.h> |
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#include <dm9161.h> |
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#ifdef CONFIG_DRIVER_ETHER |
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#if (CONFIG_COMMANDS & CFG_CMD_NET) |
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/*
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* Name: |
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* dm9161_IsPhyConnected |
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* Description: |
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* Reads the 2 PHY ID registers |
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* Arguments: |
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* p_mac - pointer to AT91S_EMAC struct |
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* Return value: |
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* TRUE - if id read successfully |
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* FALSE- if error |
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*/ |
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static unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac) |
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{ |
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unsigned short Id1, Id2; |
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at91rm9200_EmacEnableMDIO (p_mac); |
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at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID1, &Id1); |
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at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID2, &Id2); |
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at91rm9200_EmacDisableMDIO (p_mac); |
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if ((Id1 == (DM9161_PHYID1_OUI >> 6)) && |
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((Id2 >> 10) == (DM9161_PHYID1_OUI & DM9161_LSB_MASK))) |
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return TRUE; |
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return FALSE; |
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} |
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/*
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* Name: |
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* dm9161_GetLinkSpeed |
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* Description: |
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* Link parallel detection status of MAC is checked and set in the |
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* MAC configuration registers |
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* Arguments: |
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* p_mac - pointer to MAC |
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* Return value: |
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* TRUE - if link status set succesfully |
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* FALSE - if link status not set |
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*/ |
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static UCHAR dm9161_GetLinkSpeed (AT91PS_EMAC p_mac) |
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{ |
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unsigned short stat1, stat2; |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &stat1)) |
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return FALSE; |
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if (!(stat1 & DM9161_LINK_STATUS)) /* link status up? */ |
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return FALSE; |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_DSCSR, &stat2)) |
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return FALSE; |
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if ((stat1 & DM9161_100BASE_TX_FD) && (stat2 & DM9161_100FDX)) { |
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/*set Emac for 100BaseTX and Full Duplex */ |
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p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
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return TRUE; |
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} |
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if ((stat1 & DM9161_10BASE_T_FD) && (stat2 & DM9161_10FDX)) { |
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/*set MII for 10BaseT and Full Duplex */ |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_FD; |
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return TRUE; |
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} |
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if ((stat1 & DM9161_100BASE_T4_HD) && (stat2 & DM9161_100HDX)) { |
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/*set MII for 100BaseTX and Half Duplex */ |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_SPD; |
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return TRUE; |
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} |
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if ((stat1 & DM9161_10BASE_T_HD) && (stat2 & DM9161_10HDX)) { |
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/*set MII for 10BaseT and Half Duplex */ |
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p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); |
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return TRUE; |
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} |
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return FALSE; |
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} |
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/*
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* Name: |
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* dm9161_InitPhy |
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* Description: |
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* MAC starts checking its link by using parallel detection and |
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* Autonegotiation and the same is set in the MAC configuration registers |
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* Arguments: |
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* p_mac - pointer to struct AT91S_EMAC |
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* Return value: |
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* TRUE - if link status set succesfully |
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* FALSE - if link status not set |
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*/ |
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static UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac) |
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{ |
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UCHAR ret = TRUE; |
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unsigned short IntValue; |
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at91rm9200_EmacEnableMDIO (p_mac); |
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if (!dm9161_GetLinkSpeed (p_mac)) { |
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/* Try another time */ |
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ret = dm9161_GetLinkSpeed (p_mac); |
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} |
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|
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/* Disable PHY Interrupts */ |
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at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue); |
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/* clear FDX, SPD, Link, INTR masks */ |
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IntValue &= ~(DM9161_FDX_MASK | DM9161_SPD_MASK | |
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DM9161_LINK_MASK | DM9161_INTR_MASK); |
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at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue); |
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at91rm9200_EmacDisableMDIO (p_mac); |
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return (ret); |
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} |
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|
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/*
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* Name: |
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* dm9161_AutoNegotiate |
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* Description: |
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* MAC Autonegotiates with the partner status of same is set in the |
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* MAC configuration registers |
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* Arguments: |
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* dev - pointer to struct net_device |
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* Return value: |
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* TRUE - if link status set successfully |
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* FALSE - if link status not set |
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*/ |
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static UCHAR dm9161_AutoNegotiate (AT91PS_EMAC p_mac, int *status) |
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{ |
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unsigned short value; |
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unsigned short PhyAnar; |
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unsigned short PhyAnalpar; |
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|
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/* Set dm9161 control register */ |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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value &= ~DM9161_AUTONEG; /* remove autonegotiation enable */ |
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value |= DM9161_ISOLATE; /* Electrically isolate PHY */ |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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|
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/* Set the Auto_negotiation Advertisement Register */ |
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/* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */ |
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PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX | |
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DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3; |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_ANAR, &PhyAnar)) |
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return FALSE; |
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|
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/* Read the Control Register */ |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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|
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value |= DM9161_SPEED_SELECT | DM9161_AUTONEG | DM9161_DUPLEX_MODE; |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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/* Restart Auto_negotiation */ |
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value |= DM9161_RESTART_AUTONEG; |
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if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value)) |
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return FALSE; |
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|
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/*check AutoNegotiate complete */ |
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udelay (10000); |
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at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &value); |
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if (!(value & DM9161_AUTONEG_COMP)) |
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return FALSE; |
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|
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/* Get the AutoNeg Link partner base page */ |
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if (!at91rm9200_EmacReadPhy (p_mac, DM9161_ANLPAR, &PhyAnalpar)) |
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return FALSE; |
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|
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if ((PhyAnar & DM9161_TX_FDX) && (PhyAnalpar & DM9161_TX_FDX)) { |
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/*set MII for 100BaseTX and Full Duplex */ |
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p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
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return TRUE; |
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} |
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|
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if ((PhyAnar & DM9161_10_FDX) && (PhyAnalpar & DM9161_10_FDX)) { |
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/*set MII for 10BaseT and Full Duplex */ |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_FD; |
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return TRUE; |
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} |
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return FALSE; |
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} |
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|
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|
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/*
|
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* Name: |
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* at91rm92000_GetPhyInterface |
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* Description: |
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* Initialise the interface functions to the PHY |
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* Arguments: |
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* None |
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* Return value: |
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* None |
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*/ |
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void at91rm92000_GetPhyInterface(AT91PS_PhyOps p_phyops) |
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{ |
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p_phyops->Init = dm9161_InitPhy; |
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p_phyops->IsPhyConnected = dm9161_IsPhyConnected; |
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p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed; |
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p_phyops->AutoNegotiate = dm9161_AutoNegotiate; |
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} |
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|
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#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ |
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|
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#endif /* CONFIG_DRIVER_ETHER */ |
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