@ -38,6 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS )
# define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9)
# define ETH_PHY_RESET IMX_GPIO_NR(3, 29)
int dram_init ( void )
@ -59,6 +60,8 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL ( USDHC_PAD_CTRL ) ,
MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL ( USDHC_PAD_CTRL ) ,
MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL ( USDHC_PAD_CTRL ) ,
/* SOM MicroSD Card Detect */
MX6_PAD_EIM_DA9__GPIO_3_9 | MUX_PAD_CTRL ( NO_PAD_CTRL ) ,
} ;
static iomux_v3_cfg_t const enet_pads [ ] = {
@ -100,12 +103,27 @@ static struct fsl_esdhc_cfg usdhc_cfg[1] = {
{ USDHC3_BASE_ADDR } ,
} ;
int board_mmc_getcd ( struct mmc * mmc )
{
struct fsl_esdhc_cfg * cfg = ( struct fsl_esdhc_cfg * ) mmc - > priv ;
int ret = 0 ;
switch ( cfg - > esdhc_base ) {
case USDHC3_BASE_ADDR :
ret = ! gpio_get_value ( USDHC3_CD_GPIO ) ;
break ;
}
return ret ;
}
int board_mmc_init ( bd_t * bis )
{
imx_iomux_v3_setup_multiple_pads ( usdhc3_pads , ARRAY_SIZE ( usdhc3_pads ) ) ;
usdhc_cfg [ 0 ] . sdhc_clk = mxc_get_clock ( MXC_ESDHC3_CLK ) ;
usdhc_cfg [ 0 ] . max_bus_width = 4 ;
gpio_direction_input ( USDHC3_CD_GPIO ) ;
return fsl_esdhc_initialize ( bis , & usdhc_cfg [ 0 ] ) ;
}