Add initial support for AM654 based EVM running on A53. Enable 4GB of DDR available on the EVM so that kernel DTB file can be updated accordingly. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [Andreas: Added 4GB ddr support] Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>lime2-spi
Lokesh Vutla
6 years ago
committed by
Tom Rini
parent
3980b16137
commit
0911d95263
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# SPDX-License-Identifier: GPL-2.0+ |
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# |
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# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ |
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# Lokesh Vutla <lokeshvutla@ti.com> |
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|
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choice |
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prompt "K3 AM65 based boards" |
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optional |
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config TARGET_AM654_A53_EVM |
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bool "TI K3 based AM654 EVM running on A53" |
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select ARM64 |
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select SOC_K3_AM6 |
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endchoice |
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if TARGET_AM654_A53_EVM |
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config SYS_BOARD |
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default "am65x" |
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config SYS_VENDOR |
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default "ti" |
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config SYS_CONFIG_NAME |
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default "am65x_evm" |
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endif |
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@ -0,0 +1,5 @@ |
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AM65x BOARD |
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M: Lokesh Vutla <lokeshvutla@ti.com> |
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S: Maintained |
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F: board/ti/am65x/ |
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F: include/configs/am65x_evm.h |
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#
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# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
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# Lokesh Vutla <lokeshvutla@ti.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := evm.o
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Introduction: |
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------------- |
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The AM65x family of SoCs is the first device family from K3 Multicore |
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SoC architecture, targeted for broad market and industrial control with |
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aim to meet the complex processing needs of modern embedded products. |
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|
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The device is built over three domains, each containing specific processing |
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cores, voltage domains and peripherals: |
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1. Wake-up (WKUP) domain: |
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- Device Management and Security Controller (DMSC) |
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2. Microcontroller (MCU) domain: |
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- Dual Core ARM Cortex-R5F processor |
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3. MAIN domain: |
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- Quad core 64-bit ARM Cortex-A53 |
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|
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More info can be found in TRM: http://www.ti.com/lit/pdf/spruid7 |
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Boot Flow: |
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---------- |
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On AM65x family devices, ROM supports boot only via MCU(R5). This means that |
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bootloader has to run on R5 core. In order to meet this constraint, and for |
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the following reasons the boot flow is designed as mentioned: |
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1. Need to move away from R5 asap, so that we want to start *any* |
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firmware on the r5 cores like.... autosar can be loaded to receive CAN |
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response and other safety operations to be started. This operation is |
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very time critical and is applicable for all automotive use cases. |
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2. U-Boot on A53 should start other remotecores for various |
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applications. This should happen before running Linux. |
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3. In production boot flow, we might not like to use full u-boot, |
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instead use Flacon boot flow to reduce boot time. |
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|
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+------------------------------------------------------------------------+ |
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| DMSC | R5 | A53 | |
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+------------------------------------------------------------------------+ |
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| +--------+ | | | |
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| | Reset | | | | |
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| +--------+ | | | |
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| : | | | |
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| +--------+ | +-----------+ | | |
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| | *rom* |----------|-->| Reset rls | | | |
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| +--------+ | +-----------+ | | |
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| | | | : | | |
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| | rom | | : | | |
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| |services| | : | | |
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| | | | +-------------+ | | |
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| | | | | *R5 rom* | | | |
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| | | | +-------------+ | | |
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| | |<---------|---|Load and auth| | | |
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| | | | | tiboot3.bin | | | |
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| | | | +-------------+ | | |
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| | | | : | | |
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| | | | : | | |
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| | | | : | | |
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| | | | +-------------+ | | |
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| | Start | | | *R5 SPL* | | | |
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| | System | | +-------------+ | | |
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| |Firmware|<---------|---|Load and auth| | | |
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| +--------+ | | sysfw bin | | | |
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| : | +-------------+ | | |
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| +---------+ | | DDR | | | |
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| | *SYSFW* | | | config | | | |
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| +---------+ | +-------------+ | | |
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| | |<--------|---| Load | | | |
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| | | | | tispl.bin | | | |
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| | | | +-------------+ | | |
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| | |<--------|---| Start A53 | | | |
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| | | | | and Reset | | | |
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| | | | +-------------+ | | |
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| | | | | +-----------+ | |
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| | |---------|-----------------------|---->| Reset rls | | |
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| | | | | +-----------+ | |
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| | DMSC | | | : | |
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| |Services | | | +-----------+ | |
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| | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *A53 SPL* | | |
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| | | | | +-----------+ | |
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| | | | | | Load | | |
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| | | | | | u-boot.img| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *u-boot* | | |
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| | | | | +-----------+ | |
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| | | | | | prompt | | |
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| | | | | +-----------+ | |
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| +---------+ | | | |
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| | | | |
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+------------------------------------------------------------------------+ |
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- Here DMSC acts as master and provides all the critical services. R5/A53 |
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requests DMSC to get these services done as shown in the above diagram. |
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Sources: |
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-------- |
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1. SYSFW: |
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System Firmware repo is closed source and the binaries are delivered |
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to users with NDA. Please contact TI to get the System Firmware |
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Binary named ti-sci-firmware-am6x.bin that runs on AM65x SoC. |
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2. ATF: |
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Tree: https://github.com/ARM-software/arm-trusted-firmware.git |
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Branch: master |
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3. OPTEE: |
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Tree: https://github.com/OP-TEE/optee_os.git |
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Branch: master |
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4. U-Boot: |
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Tree: http://git.denx.de/u-boot.git |
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Branch: master |
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Build procedure: |
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---------------- |
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1. SYSFW: |
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ROM expects a signed binary that contains the X509 certificate. So |
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the binary ti-sci-firmware-am6x.bin cannot be uses as-is and needs to be signed. |
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Contact TI on the procedure to sign the system firmware binary. |
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2. ATF: |
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$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed |
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3. OPTEE: |
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$ make PLATFORM=k3-am65x CFG_ARM64_core=y |
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4. U-Boot: |
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4.1. R5: |
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TBD. |
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4.2. A53: |
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$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- am65x_evm_a53_defconfig O=/tmp/a53 |
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$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager.bin O=/tmp/a53 |
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Target Images |
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-------------- |
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Copy the below images to an SD card and boot: |
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- tiboot3.bin from step 4.1 |
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- tispl.bin, u-boot.img from 4.2 |
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@ -0,0 +1,56 @@ |
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board specific initialization for AM654 EVM |
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* |
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* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com> |
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* |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <spl.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int board_init(void) |
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{ |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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#ifdef CONFIG_PHYS_64BIT |
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gd->ram_size = 0x100000000; |
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#else |
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gd->ram_size = 0x80000000; |
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#endif |
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return 0; |
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} |
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ulong board_get_usable_ram_top(ulong total_size) |
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{ |
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#ifdef CONFIG_PHYS_64BIT |
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/* Limit RAM used by U-Boot to the DDR low region */ |
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if (gd->ram_top > 0x100000000) |
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return 0x100000000; |
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#endif |
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return gd->ram_top; |
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} |
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int dram_init_banksize(void) |
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{ |
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/* Bank 0 declares the memory available in the DDR low region */ |
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
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gd->bd->bi_dram[0].size = 0x80000000; |
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#ifdef CONFIG_PHYS_64BIT |
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/* Bank 1 declares the memory available in the DDR high region */ |
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gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1; |
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gd->bd->bi_dram[1].size = 0x80000000; |
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#endif |
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return 0; |
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} |
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@ -0,0 +1,34 @@ |
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/* SPDX-License-Identifier: GPL-2.0+ */ |
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/*
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* Configuration header file for K3 AM654 EVM |
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* |
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* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com> |
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*/ |
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#ifndef __CONFIG_AM654_EVM_H |
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#define __CONFIG_AM654_EVM_H |
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#include <linux/sizes.h> |
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#include <config_distro_bootcmd.h> |
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#define CONFIG_ENV_SIZE (128 << 10) |
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/* DDR Configuration */ |
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#define CONFIG_SYS_SDRAM_BASE1 0x880000000 |
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/* SPL Loader Configuration */ |
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#ifdef CONFIG_TARGET_AM654_A53_EVM |
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#define CONFIG_SPL_TEXT_BASE 0x80080000 |
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#endif |
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#define CONFIG_SKIP_LOWLEVEL_INIT |
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#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE |
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ |
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CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE - 4) |
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/* Now for the remaining common defines */ |
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#include <configs/ti_armv7_common.h> |
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#endif /* __CONFIG_AM654_EVM_H */ |
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