Mike Frysinger
17 years ago
parent
5c45f7cac2
commit
0c31ddf7b7
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/u-boot.lds |
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#
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# U-boot - Makefile
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#
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# Copyright (c) 2005-2008 Analog Device Inc.
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS-y := $(BOARD).o
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COBJS-$(CONFIG_STATUS_LED) += status-led.o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS-y))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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$(obj)u-boot.lds: u-boot.lds.S |
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$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,77 @@ |
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/*
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* U-boot - main board file |
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* |
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* Copyright (c) 2005-2009 Analog Devices Inc. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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#include <common.h> |
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#include <config.h> |
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#include <command.h> |
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#include <net.h> |
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#include <netdev.h> |
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#include <asm/blackfin.h> |
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#include <asm/net.h> |
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#include <asm/mach-common/bits/otp.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int checkboard(void) |
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{ |
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printf("Board: ADI BF526 EZ-Board board\n"); |
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printf(" Support: http://blackfin.uclinux.org/\n"); |
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return 0; |
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} |
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phys_size_t initdram(int board_type) |
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{ |
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; |
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; |
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return gd->bd->bi_memsize; |
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} |
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#ifdef CONFIG_BFIN_MAC |
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static void board_init_enetaddr(uchar *mac_addr) |
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{ |
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bool valid_mac = false; |
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/* the MAC is stored in OTP memory page 0xDF */ |
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uint32_t ret; |
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uint64_t otp_mac; |
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ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); |
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if (!(ret & OTP_MASTER_ERROR)) { |
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uchar *otp_mac_p = (uchar *)&otp_mac; |
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for (ret = 0; ret < 6; ++ret) |
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mac_addr[ret] = otp_mac_p[5 - ret]; |
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if (is_valid_ether_addr(mac_addr)) |
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valid_mac = true; |
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} |
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if (!valid_mac) { |
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puts("Warning: Generating 'random' MAC address\n"); |
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bfin_gen_rand_mac(mac_addr); |
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} |
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eth_setenv_enetaddr("ethaddr", mac_addr); |
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} |
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int board_eth_init(bd_t *bis) |
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{ |
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return bfin_EMAC_initialize(bis); |
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} |
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#endif |
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int misc_init_r(void) |
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{ |
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#ifdef CONFIG_BFIN_MAC |
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uchar enetaddr[6]; |
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if (!eth_getenv_enetaddr("ethaddr", enetaddr)) |
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board_init_enetaddr(enetaddr); |
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#endif |
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return 0; |
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} |
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@ -0,0 +1,32 @@ |
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#
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# Copyright (c) 2005-2008 Analog Device Inc.
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#
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# (C) Copyright 2001
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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# This is not actually used for Blackfin boards so do not change it
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#TEXT_BASE = do-not-use-me
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LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
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# Set some default LDR flags based on boot mode.
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LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
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@ -0,0 +1,56 @@ |
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/*
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* U-boot - status leds |
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* |
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* Copyright (c) 2005-2009 Analog Devices Inc. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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#include <common.h> |
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#include <config.h> |
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#include <command.h> |
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#include <status_led.h> |
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static void set_led_f(int pf, int state) |
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{ |
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switch (state) { |
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case STATUS_LED_OFF: bfin_write_PORTFIO_CLEAR(pf); break; |
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case STATUS_LED_BLINKING: bfin_write_PORTFIO_TOGGLE(pf); break; |
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case STATUS_LED_ON: bfin_write_PORTFIO_SET(pf); break; |
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} |
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} |
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static void set_led_g(int pf, int state) |
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{ |
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switch (state) { |
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case STATUS_LED_OFF: bfin_write_PORTGIO_CLEAR(pf); break; |
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case STATUS_LED_BLINKING: bfin_write_PORTGIO_TOGGLE(pf); break; |
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case STATUS_LED_ON: bfin_write_PORTGIO_SET(pf); break; |
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} |
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} |
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static void set_leds(led_id_t mask, int state) |
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{ |
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if (mask & 0x1) set_led_f(PF8, state); |
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if (mask & 0x2) set_led_g(PG11, state); |
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if (mask & 0x4) set_led_g(PG12, state); |
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} |
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void __led_init(led_id_t mask, int state) |
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{ |
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bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~(PF8)); |
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bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~(PG11 | PG12)); |
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bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() & ~(PF8)); |
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bfin_write_PORTGIO_INEN(bfin_read_PORTGIO_INEN() & ~(PG11 | PG12)); |
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bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() | (PF8)); |
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bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | (PG11 | PG12)); |
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} |
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void __led_set(led_id_t mask, int state) |
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{ |
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set_leds(mask, state); |
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} |
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void __led_toggle(led_id_t mask) |
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{ |
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set_leds(mask, STATUS_LED_BLINKING); |
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} |
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@ -0,0 +1,124 @@ |
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/* |
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* U-boot - u-boot.lds.S |
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* |
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* Copyright (c) 2005-2008 Analog Device Inc. |
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* |
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* (C) Copyright 2000-2004 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <config.h> |
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#include <asm/blackfin.h> |
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#undef ALIGN |
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#undef ENTRY |
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#undef bfin |
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/* If we don't actually load anything into L1 data, this will avoid |
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* a syntax error. If we do actually load something into L1 data, |
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* we'll get a linker memory load error (which is what we'd want). |
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* This is here in the first place so we can quickly test building |
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* for different CPU's which may lack non-cache L1 data. |
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*/ |
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#ifndef L1_DATA_B_SRAM |
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# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE |
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# define L1_DATA_B_SRAM_SIZE 0 |
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#endif |
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OUTPUT_ARCH(bfin) |
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MEMORY |
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{ |
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ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN |
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l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE |
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l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE |
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} |
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ENTRY(_start) |
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SECTIONS |
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{ |
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.text : |
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{ |
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cpu/blackfin/start.o (.text .text.*) |
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__initcode_start = .;
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cpu/blackfin/initcode.o (.text .text.*) |
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__initcode_end = .;
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*(.text .text.*) |
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} >ram |
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.rodata : |
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{ |
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. = ALIGN(4);
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*(.rodata .rodata.*) |
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*(.rodata1) |
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*(.eh_frame) |
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. = ALIGN(4);
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} >ram |
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.data : |
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{ |
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. = ALIGN(256);
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*(.data .data.*) |
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*(.data1) |
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*(.sdata) |
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*(.sdata2) |
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*(.dynamic) |
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CONSTRUCTORS |
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} >ram |
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.u_boot_cmd : |
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{ |
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___u_boot_cmd_start = .;
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*(.u_boot_cmd) |
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___u_boot_cmd_end = .;
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} >ram |
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.text_l1 : |
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{ |
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. = ALIGN(4);
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__stext_l1 = .;
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*(.l1.text) |
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. = ALIGN(4);
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__etext_l1 = .;
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} >l1_code AT>ram |
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__stext_l1_lma = LOADADDR(.text_l1);
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.data_l1 : |
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{ |
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. = ALIGN(4);
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__sdata_l1 = .;
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*(.l1.data) |
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*(.l1.bss) |
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. = ALIGN(4);
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__edata_l1 = .;
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} >l1_data AT>ram |
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__sdata_l1_lma = LOADADDR(.data_l1);
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.bss : |
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{ |
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. = ALIGN(4);
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__bss_start = .;
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*(.sbss) *(.scommon) |
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*(.dynbss) |
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*(.bss .bss.*) |
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*(COMMON) |
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__bss_end = .;
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} >ram |
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} |
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@ -0,0 +1,190 @@ |
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/*
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* U-boot - Configuration file for BF526 EZBrd board |
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*/ |
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#ifndef __CONFIG_BF526_EZBRD_H__ |
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#define __CONFIG_BF526_EZBRD_H__ |
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#include <asm/blackfin-config-pre.h> |
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/*
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* Processor Settings |
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*/ |
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#define CONFIG_BFIN_CPU bf526-0.0 |
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#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA |
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/*
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* Clock Settings |
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* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
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* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
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*/ |
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/* CONFIG_CLKIN_HZ is any value in Hz */ |
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#define CONFIG_CLKIN_HZ 25000000 |
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/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
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/* 1 = CLKIN / 2 */ |
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#define CONFIG_CLKIN_HALF 0 |
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/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
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/* 1 = bypass PLL */ |
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#define CONFIG_PLL_BYPASS 0 |
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/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
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/* Values can range from 0-63 (where 0 means 64) */ |
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#define CONFIG_VCO_MULT 16 |
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/* CCLK_DIV controls the core clock divider */ |
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/* Values can be 1, 2, 4, or 8 ONLY */ |
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#define CONFIG_CCLK_DIV 1 |
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/* SCLK_DIV controls the system clock divider */ |
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/* Values can range from 1-15 */ |
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#define CONFIG_SCLK_DIV 5 |
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/*
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* Memory Settings |
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*/ |
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/* This board has a 64meg MT48H32M16 */ |
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#define CONFIG_MEM_ADD_WDTH 10 |
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#define CONFIG_MEM_SIZE 64 |
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#define CONFIG_EBIU_SDRRC_VAL 0x0267 |
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#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_2 | PASR_ALL | TRAS_6 | TRP_4 | TRCD_2 | TWR_2 | PSS) |
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#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) |
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#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) |
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#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) |
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
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#define CONFIG_SYS_MALLOC_LEN (512 * 1024) |
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/*
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* NAND Settings |
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* (can't be used same time as ethernet) |
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*/ |
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#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) |
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#define CONFIG_BFIN_NFC |
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#endif |
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#ifdef CONFIG_BFIN_NFC |
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#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 |
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#define CONFIG_DRIVER_NAND_BFIN |
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#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
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#define NAND_MAX_CHIPS 1 |
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#define CONFIG_CMD_NAND |
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#endif |
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/*
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* Network Settings |
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*/ |
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#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ |
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!defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) |
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#define ADI_CMDS_NETWORK 1 |
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#define CONFIG_BFIN_MAC |
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#define CONFIG_RMII |
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#define CONFIG_NETCONSOLE 1 |
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#define CONFIG_NET_MULTI 1 |
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#endif |
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#define CONFIG_HOSTNAME bf526-ezbrd |
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/* Uncomment next line to use fixed MAC address */ |
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/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ |
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/*
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* Flash Settings |
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*/ |
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#define CONFIG_FLASH_CFI_DRIVER |
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#define CONFIG_SYS_FLASH_BASE 0x20000000 |
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#define CONFIG_SYS_FLASH_CFI |
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#define CONFIG_SYS_FLASH_PROTECTION |
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
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#define CONFIG_SYS_MAX_FLASH_SECT 71 |
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|
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|
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/*
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* SPI Settings |
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*/ |
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#define CONFIG_BFIN_SPI |
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#define CONFIG_ENV_SPI_MAX_HZ 30000000 |
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#define CONFIG_SF_DEFAULT_HZ 30000000 |
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#define CONFIG_SPI_FLASH |
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#define CONFIG_SPI_FLASH_SST |
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|
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|
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/*
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* Env Storage Settings |
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*/ |
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#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) |
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#define CONFIG_ENV_IS_IN_SPI_FLASH |
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#define CONFIG_ENV_OFFSET 0x4000 |
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#define CONFIG_ENV_SIZE 0x2000 |
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#define CONFIG_ENV_SECT_SIZE 0x2000 |
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#else |
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#define CONFIG_ENV_IS_IN_FLASH |
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#define CONFIG_ENV_OFFSET 0x4000 |
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
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#define CONFIG_ENV_SIZE 0x2000 |
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#define CONFIG_ENV_SECT_SIZE 0x2000 |
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#endif |
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#define ENV_IS_EMBEDDED_CUSTOM |
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|
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/*
|
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* I2C Settings |
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*/ |
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#define CONFIG_BFIN_TWI_I2C 1 |
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#define CONFIG_HARD_I2C 1 |
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#define CONFIG_SYS_I2C_SPEED 50000 |
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#define CONFIG_SYS_I2C_SLAVE 0 |
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|
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|
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/*
|
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* USB Settings |
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*/ |
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#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) |
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#define CONFIG_USB |
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#define CONFIG_MUSB_HCD |
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#define CONFIG_USB_BLACKFIN |
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#define CONFIG_USB_STORAGE |
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#define CONFIG_MUSB_TIMEOUT 100000 |
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#endif |
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|
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|
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/*
|
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* Misc Settings |
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*/ |
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#define CONFIG_MISC_INIT_R |
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#define CONFIG_RTC_BFIN |
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#define CONFIG_UART_CONSOLE 1 |
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|
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/* define to enable run status via led */ |
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/* #define CONFIG_STATUS_LED */ |
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#ifdef CONFIG_STATUS_LED |
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#define CONFIG_BOARD_SPECIFIC_LED |
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#ifndef __ASSEMBLY__ |
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typedef unsigned int led_id_t; |
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void __led_init(led_id_t mask, int state); |
||||
void __led_set(led_id_t mask, int state); |
||||
void __led_toggle(led_id_t mask); |
||||
#endif |
||||
/* use LED0 to indicate booting/alive */ |
||||
#define STATUS_LED_BOOT 0 |
||||
#define STATUS_LED_BIT 1 |
||||
#define STATUS_LED_STATE STATUS_LED_ON |
||||
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4) |
||||
/* use LED1 to indicate crash */ |
||||
#define STATUS_LED_CRASH 1 |
||||
#define STATUS_LED_BIT1 2 |
||||
#define STATUS_LED_STATE1 STATUS_LED_ON |
||||
#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) |
||||
#endif |
||||
|
||||
|
||||
/*
|
||||
* Pull in common ADI header for remaining command/environment setup |
||||
*/ |
||||
#include <configs/bfin_adi_common.h> |
||||
|
||||
#include <asm/blackfin-config-post.h> |
||||
|
||||
#endif |
||||
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Reference in new issue