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@ -18,10 +18,14 @@ |
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#define SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */ |
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#define SR_RX_FIFO_FULL 0x02 /* receive FIFO full */ |
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#define ULITE_CONTROL_RST_TX 0x01 |
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#define ULITE_CONTROL_RST_RX 0x02 |
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struct uartlite { |
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unsigned int rx_fifo; |
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unsigned int tx_fifo; |
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unsigned int status; |
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unsigned int control; |
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}; |
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static struct uartlite *userial_ports[4] = { |
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@ -75,8 +79,16 @@ static int uartlite_serial_tstc(const int port) |
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static int uartlite_serial_init(const int port) |
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{ |
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if (userial_ports[port]) |
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struct uartlite *regs = userial_ports[port]; |
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if (regs) { |
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out_be32(®s->control, 0); |
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out_be32(®s->control, |
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ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); |
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in_be32(®s->control); |
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return 0; |
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} |
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return -1; |
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} |
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