|
|
|
@ -35,20 +35,20 @@ enum { |
|
|
|
|
int get_fpga_state(unsigned dev); |
|
|
|
|
void print_fpga_state(unsigned dev); |
|
|
|
|
|
|
|
|
|
typedef struct ihs_gpio { |
|
|
|
|
struct ihs_gpio { |
|
|
|
|
u16 read; |
|
|
|
|
u16 clear; |
|
|
|
|
u16 set; |
|
|
|
|
} ihs_gpio_t; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
typedef struct ihs_i2c { |
|
|
|
|
struct ihs_i2c { |
|
|
|
|
u16 write_mailbox; |
|
|
|
|
u16 write_mailbox_ext; |
|
|
|
|
u16 read_mailbox; |
|
|
|
|
u16 read_mailbox_ext; |
|
|
|
|
} ihs_i2c_t; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
typedef struct ihs_osd { |
|
|
|
|
struct ihs_osd { |
|
|
|
|
u16 version; |
|
|
|
|
u16 features; |
|
|
|
|
u16 control; |
|
|
|
@ -56,21 +56,21 @@ typedef struct ihs_osd { |
|
|
|
|
u16 xy_scale; |
|
|
|
|
u16 x_pos; |
|
|
|
|
u16 y_pos; |
|
|
|
|
} ihs_osd_t; |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_NEO |
|
|
|
|
typedef struct ihs_fpga { |
|
|
|
|
struct ihs_fpga { |
|
|
|
|
u16 reflection_low; /* 0x0000 */ |
|
|
|
|
u16 versions; /* 0x0002 */ |
|
|
|
|
u16 fpga_features; /* 0x0004 */ |
|
|
|
|
u16 fpga_version; /* 0x0006 */ |
|
|
|
|
u16 reserved_0[8187]; /* 0x0008 */ |
|
|
|
|
u16 reflection_high; /* 0x3ffe */ |
|
|
|
|
} ihs_fpga_t; |
|
|
|
|
}; |
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_IO |
|
|
|
|
typedef struct ihs_fpga { |
|
|
|
|
struct ihs_fpga { |
|
|
|
|
u16 reflection_low; /* 0x0000 */ |
|
|
|
|
u16 versions; /* 0x0002 */ |
|
|
|
|
u16 fpga_features; /* 0x0004 */ |
|
|
|
@ -79,11 +79,11 @@ typedef struct ihs_fpga { |
|
|
|
|
u16 quad_serdes_reset; /* 0x0012 */ |
|
|
|
|
u16 reserved_1[8181]; /* 0x0014 */ |
|
|
|
|
u16 reflection_high; /* 0x3ffe */ |
|
|
|
|
} ihs_fpga_t; |
|
|
|
|
}; |
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_IO64 |
|
|
|
|
typedef struct ihs_fpga { |
|
|
|
|
struct ihs_fpga { |
|
|
|
|
u16 reflection_low; /* 0x0000 */ |
|
|
|
|
u16 versions; /* 0x0002 */ |
|
|
|
|
u16 fpga_features; /* 0x0004 */ |
|
|
|
@ -98,30 +98,30 @@ typedef struct ihs_fpga { |
|
|
|
|
u16 ch0_hicb_config_int;/* 0x0502 */ |
|
|
|
|
u16 reserved_3[7549]; /* 0x0504 */ |
|
|
|
|
u16 reflection_high; /* 0x3ffe */ |
|
|
|
|
} ihs_fpga_t; |
|
|
|
|
}; |
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_IOCON |
|
|
|
|
typedef struct ihs_fpga { |
|
|
|
|
struct ihs_fpga { |
|
|
|
|
u16 reflection_low; /* 0x0000 */ |
|
|
|
|
u16 versions; /* 0x0002 */ |
|
|
|
|
u16 fpga_version; /* 0x0004 */ |
|
|
|
|
u16 fpga_features; /* 0x0006 */ |
|
|
|
|
u16 reserved_0[6]; /* 0x0008 */ |
|
|
|
|
ihs_gpio_t gpio; /* 0x0014 */ |
|
|
|
|
struct ihs_gpio gpio; /* 0x0014 */ |
|
|
|
|
u16 mpc3w_control; /* 0x001a */ |
|
|
|
|
u16 reserved_1[19]; /* 0x001c */ |
|
|
|
|
u16 videocontrol; /* 0x0042 */ |
|
|
|
|
u16 reserved_2[93]; /* 0x0044 */ |
|
|
|
|
u16 reflection_high; /* 0x00fe */ |
|
|
|
|
ihs_osd_t osd; /* 0x0100 */ |
|
|
|
|
struct ihs_osd osd; /* 0x0100 */ |
|
|
|
|
u16 reserved_3[889]; /* 0x010e */ |
|
|
|
|
u16 videomem; /* 0x0800 */ |
|
|
|
|
} ihs_fpga_t; |
|
|
|
|
}; |
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_DLVISION_10G |
|
|
|
|
typedef struct ihs_fpga { |
|
|
|
|
struct ihs_fpga { |
|
|
|
|
u16 reflection_low; /* 0x0000 */ |
|
|
|
|
u16 versions; /* 0x0002 */ |
|
|
|
|
u16 fpga_version; /* 0x0004 */ |
|
|
|
@ -129,16 +129,16 @@ typedef struct ihs_fpga { |
|
|
|
|
u16 reserved_0[10]; /* 0x0008 */ |
|
|
|
|
u16 extended_interrupt; /* 0x001c */ |
|
|
|
|
u16 reserved_1[9]; /* 0x001e */ |
|
|
|
|
ihs_i2c_t i2c; /* 0x0030 */ |
|
|
|
|
struct ihs_i2c i2c; /* 0x0030 */ |
|
|
|
|
u16 reserved_2[16]; /* 0x0038 */ |
|
|
|
|
u16 mpc3w_control; /* 0x0058 */ |
|
|
|
|
u16 reserved_3[34]; /* 0x005a */ |
|
|
|
|
u16 videocontrol; /* 0x009e */ |
|
|
|
|
u16 reserved_4[176]; /* 0x00a0 */ |
|
|
|
|
ihs_osd_t osd; /* 0x0200 */ |
|
|
|
|
struct ihs_osd osd; /* 0x0200 */ |
|
|
|
|
u16 reserved_5[761]; /* 0x020e */ |
|
|
|
|
u16 videomem; /* 0x0800 */ |
|
|
|
|
} ihs_fpga_t; |
|
|
|
|
}; |
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
#endif |
|
|
|
|