From 23446cc34b61faa20dc6da234384521d221622f2 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 13 Aug 2018 20:44:08 -0500 Subject: [PATCH 01/56] ARM: da850evm_direct_nor: Enable CONFIG_BLK At least for now, CONFIG_BLK is working, but this variant of the da850evm doesn't need/support SPL so it's OK to enable it here. Signed-off-by: Adam Ford --- configs/da850evm_direct_nor_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 65eaa9e..4039d0e 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -37,6 +37,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_BLK=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y From 93f3362762f049c63517a73ebbbf6dd8c0e26244 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Wed, 15 Aug 2018 13:22:03 -0500 Subject: [PATCH 02/56] ARM: configs: Add da850evm_nand to boot from NAND The DA850-EVM supports booting from NAND when used with the UI expander board. da850evm_nand will create an ais file that can be burned to NAND and booted while storing the env in NAND along with some partitions tables for storing kernel, dtb and rootfs in NAND. Signed-off-by: Adam Ford --- board/davinci/da8xxevm/MAINTAINERS | 1 + configs/da850evm_nand_defconfig | 60 ++++++++++++++++++++++++++++++++++++++ include/configs/da850evm.h | 11 +++++-- 3 files changed, 69 insertions(+), 3 deletions(-) create mode 100644 configs/da850evm_nand_defconfig diff --git a/board/davinci/da8xxevm/MAINTAINERS b/board/davinci/da8xxevm/MAINTAINERS index 99b4786..5958986 100644 --- a/board/davinci/da8xxevm/MAINTAINERS +++ b/board/davinci/da8xxevm/MAINTAINERS @@ -5,6 +5,7 @@ F: board/davinci/da8xxevm/ F: include/configs/da850evm.h F: configs/da850_am18xxevm_defconfig F: configs/da850evm_defconfig +F: configs/da850evm_nand_defconfig F: configs/da850evm_direct_nor_defconfig OMAPL138_LCDK BOARD diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig new file mode 100644 index 0000000..11d6a2b --- /dev/null +++ b/configs/da850evm_nand_defconfig @@ -0,0 +1,60 @@ +CONFIG_ARM=y +CONFIG_ARCH_DAVINCI=y +CONFIG_SYS_TEXT_BASE=0xc1080000 +CONFIG_TARGET_DA850EVM=y +CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" +CONFIG_BOOTDELAY=3 +CONFIG_VERSION_VARIABLE=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot > " +CONFIG_CRC32_VERIFY=y +# CONFIG_CMD_EEPROM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_GPT is not set +CONFIG_CMD_NAND=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_TIME is not set +# CONFIG_CMD_EXT4 is not set +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=nand512" +CONFIG_MTDPARTS_DEFAULT="mtdparts=nand512:128k(u-boot env),512k(u-boot),128k(spl-os),8m(kernel),-(rootfs)" +CONFIG_CMD_DIAG=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_I2C=y +CONFIG_MTD_PARTITIONS=y +CONFIG_NAND=y +CONFIG_NAND_DAVINCI=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000 +CONFIG_SPL_NAND_SIMPLE=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_DAVINCI_SPI=y +# CONFIG_FAT_WRITE is not set +CONFIG_USE_TINY_PRINTF=y diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 7e52fea..14a6b9e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -36,6 +36,7 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SKIP_LOWLEVEL_INIT #ifdef CONFIG_DIRECT_NOR_BOOT #define CONFIG_ARCH_CPU_INIT @@ -145,8 +146,11 @@ * Flash & Environment */ #ifdef CONFIG_NAND +#ifdef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#endif #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K @@ -160,8 +164,7 @@ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x28000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ @@ -210,9 +213,11 @@ #endif #ifdef CONFIG_USE_SPIFLASH +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE (64 << 10) #define CONFIG_ENV_OFFSET (512 << 10) -#define CONFIG_ENV_SECT_SIZE (64 << 10) +#define CONFIG_ENV_SECT_SIZE (64 << 10) +#endif #ifdef CONFIG_SPL_BUILD #undef CONFIG_SPI_FLASH_MTD #endif From 1eddf549319541ae41b2c8f1cb7a01fe3b737b53 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Thu, 16 Aug 2018 23:13:34 -0500 Subject: [PATCH 03/56] DM: GPIO: Fix da8xx GPIO indexing over GPIO 32 The GPIO banks are broken up into two 16-bit registers for each bank set. Unfortunately, the math that determines how to shift blindly shifted by the number of the gpio. This worked for gpio numbers under 32, but higher gpio's are broken. This fixes the gpio index, so the bank is passed and the shift amount within the register is passed now instead of the gpio number. Fixes: 8e51c0f25406("dm: gpio: Add DM compatibility to GPIO driver for Davinci") Signed-off-by: Adam Ford --- drivers/gpio/da8xx_gpio.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index 1a1d37a..3e95f03 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -13,6 +13,7 @@ #include #include #include +#include #ifndef CONFIG_DM_GPIO static struct gpio_registry { @@ -429,20 +430,27 @@ int gpio_set_value(unsigned int gpio, int value) static struct davinci_gpio *davinci_get_gpio_bank(struct udevice *dev, unsigned int offset) { struct davinci_gpio_bank *bank = dev_get_priv(dev); + unsigned int addr; - /* The device tree is not broken into banks but the infrastructure is + /* + * The device tree is not broken into banks but the infrastructure is * expecting it this way, so we'll first include the 0x10 offset, then * calculate the bank manually based on the offset. + * Casting 'addr' as Unsigned long is needed to make the math work. */ - - return ((struct davinci_gpio *)bank->base) + 0x10 + (offset >> 5); + addr = ((unsigned long)(struct davinci_gpio *)bank->base) + + 0x10 + (0x28 * (offset >> 5)); + return (struct davinci_gpio *)addr; } static int davinci_gpio_direction_input(struct udevice *dev, unsigned int offset) { struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset); - _gpio_direction_input(base, offset); + /* + * Fetch the address based on GPIO, but only pass the masked low 32-bits + */ + _gpio_direction_input(base, (offset & 0x1f)); return 0; } @@ -451,7 +459,7 @@ static int davinci_gpio_direction_output(struct udevice *dev, unsigned int offse { struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset); - _gpio_direction_output(base, offset, value); + _gpio_direction_output(base, (offset & 0x1f), value); return 0; } @@ -459,7 +467,7 @@ static int davinci_gpio_get_value(struct udevice *dev, unsigned int offset) { struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset); - return _gpio_get_value(base, offset); + return _gpio_get_value(base, (offset & 0x1f)); } static int davinci_gpio_set_value(struct udevice *dev, unsigned int offset, @@ -467,7 +475,7 @@ static int davinci_gpio_set_value(struct udevice *dev, unsigned int offset, { struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset); - _gpio_set_value(base, offset, value); + _gpio_set_value(base, (offset & 0x1f), value); return 0; } From 9440b3d3d0bec6a7aa40307aff0699ec48e74a71 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Thu, 16 Aug 2018 23:21:57 -0500 Subject: [PATCH 04/56] dm: gpio: da8xx_gpio: Add support for GPIO_ACTIVE_LOW/HIGH With DM and device tree support, let's use the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW from the device tree as they are intended. Signed-off-by: Adam Ford --- drivers/gpio/da8xx_gpio.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index 3e95f03..b0d49cb 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -493,12 +493,25 @@ static int davinci_gpio_get_function(struct udevice *dev, unsigned int offset) return GPIOF_OUTPUT; } +static int davinci_gpio_xlate(struct udevice *dev, struct gpio_desc *desc, + struct ofnode_phandle_args *args) +{ + desc->offset = args->args[0]; + + if (args->args[1] & GPIO_ACTIVE_LOW) + desc->flags = GPIOD_ACTIVE_LOW; + else + desc->flags = 0; + return 0; +} + static const struct dm_gpio_ops gpio_davinci_ops = { .direction_input = davinci_gpio_direction_input, .direction_output = davinci_gpio_direction_output, .get_value = davinci_gpio_get_value, .set_value = davinci_gpio_set_value, .get_function = davinci_gpio_get_function, + .xlate = davinci_gpio_xlate, }; static int davinci_gpio_probe(struct udevice *dev) From 8e12559193109fab2fa937692e57b79a1e132a84 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Fri, 17 Aug 2018 08:56:15 -0500 Subject: [PATCH 05/56] arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18 Signed-off-by: Adam Ford --- arch/arm/dts/da850-evm.dts | 308 +++++++++++++++++++++++++-------------------- 1 file changed, 172 insertions(+), 136 deletions(-) diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts index 67e72bc..0e82bb9 100644 --- a/arch/arm/dts/da850-evm.dts +++ b/arch/arm/dts/da850-evm.dts @@ -15,143 +15,18 @@ compatible = "ti,da850-evm", "ti,da850"; model = "DA850/AM1808/OMAP-L138 EVM"; - soc@1c00000 { - pmx_core: pinmux@14120 { - status = "okay"; - - mcasp0_pins: pinmux_mcasp0_pins { - pinctrl-single,bits = < - /* - * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR, - * AFSR, AMUTE - */ - 0x00 0x11111111 0xffffffff - /* AXR11, AXR12 */ - 0x04 0x00011000 0x000ff000 - >; - }; - nand_pins: nand_pins { - pinctrl-single,bits = < - /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */ - 0x1c 0x10110110 0xf0ff0ff0 - /* - * EMA_D[0], EMA_D[1], EMA_D[2], - * EMA_D[3], EMA_D[4], EMA_D[5], - * EMA_D[6], EMA_D[7] - */ - 0x24 0x11111111 0xffffffff - /* EMA_A[1], EMA_A[2] */ - 0x30 0x01100000 0x0ff00000 - >; - }; - }; - serial0: serial@42000 { - status = "okay"; - }; - serial1: serial@10c000 { - status = "okay"; - }; - serial2: serial@10d000 { - status = "okay"; - }; - rtc0: rtc@23000 { - status = "okay"; - }; - i2c0: i2c@22000 { - status = "okay"; - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - tps: tps@48 { - reg = <0x48>; - }; - tlv320aic3106: tlv320aic3106@18 { - #sound-dai-cells = <0>; - compatible = "ti,tlv320aic3106"; - reg = <0x18>; - status = "okay"; - - /* Regulators */ - IOVDD-supply = <&vdcdc2_reg>; - /* Derived from VBAT: Baseboard 3.3V / 1.8V */ - AVDD-supply = <&vbat>; - DRVDD-supply = <&vbat>; - DVDD-supply = <&vbat>; - }; - tca6416: gpio@20 { - compatible = "ti,tca6416"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; - }; - wdt: wdt@21000 { - status = "okay"; - }; - mmc0: mmc@40000 { - max-frequency = <50000000>; - bus-width = <4>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - }; - spi1: spi@30e000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; - flash: m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "m25p64"; - spi-max-frequency = <30000000>; - m25p,fast-read; - reg = <0>; - partition@0 { - label = "U-Boot-SPL"; - reg = <0x00000000 0x00010000>; - read-only; - }; - partition@1 { - label = "U-Boot"; - reg = <0x00010000 0x00080000>; - read-only; - }; - partition@2 { - label = "U-Boot-Env"; - reg = <0x00090000 0x00010000>; - read-only; - }; - partition@3 { - label = "Kernel"; - reg = <0x000a0000 0x00280000>; - }; - partition@4 { - label = "Filesystem"; - reg = <0x00320000 0x00400000>; - }; - partition@5 { - label = "MAC-Address"; - reg = <0x007f0000 0x00010000>; - read-only; - }; - }; - }; - mdio: mdio@224000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - bus_freq = <2200000>; - }; - eth0: ethernet@220000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mii_pins>; - }; - gpio: gpio@226000 { - status = "okay"; - }; + chosen { + stdout-path = &serial2; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + ethernet0 = ð0; + spi0 = &spi1; }; + vbat: fixedregulator0 { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -188,6 +63,155 @@ }; }; +&pmx_core { + status = "okay"; + + mcasp0_pins: pinmux_mcasp0_pins { + pinctrl-single,bits = < + /* + * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR, + * AFSR, AMUTE + */ + 0x00 0x11111111 0xffffffff + /* AXR11, AXR12 */ + 0x04 0x00011000 0x000ff000 + >; + }; + nand_pins: nand_pins { + pinctrl-single,bits = < + /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */ + 0x1c 0x10110110 0xf0ff0ff0 + /* + * EMA_D[0], EMA_D[1], EMA_D[2], + * EMA_D[3], EMA_D[4], EMA_D[5], + * EMA_D[6], EMA_D[7] + */ + 0x24 0x11111111 0xffffffff + /* EMA_A[1], EMA_A[2] */ + 0x30 0x01100000 0x0ff00000 + >; + }; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "okay"; +}; + +&serial2 { + status = "okay"; +}; + +&rtc0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + tps: tps@48 { + reg = <0x48>; + }; + tlv320aic3106: tlv320aic3106@18 { + #sound-dai-cells = <0>; + compatible = "ti,tlv320aic3106"; + reg = <0x18>; + status = "okay"; + + /* Regulators */ + IOVDD-supply = <&vdcdc2_reg>; + /* Derived from VBAT: Baseboard 3.3V / 1.8V */ + AVDD-supply = <&vbat>; + DRVDD-supply = <&vbat>; + DVDD-supply = <&vbat>; + }; + tca6416: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&wdt { + status = "okay"; +}; + +&mmc0 { + max-frequency = <50000000>; + bus-width = <4>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio 65 GPIO_ACTIVE_HIGH>; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p64"; + spi-max-frequency = <30000000>; + m25p,fast-read; + reg = <0>; + partition@0 { + label = "U-Boot-SPL"; + reg = <0x00000000 0x00010000>; + read-only; + }; + partition@1 { + label = "U-Boot"; + reg = <0x00010000 0x00080000>; + read-only; + }; + partition@2 { + label = "U-Boot-Env"; + reg = <0x00090000 0x00010000>; + read-only; + }; + partition@3 { + label = "Kernel"; + reg = <0x000a0000 0x00280000>; + }; + partition@4 { + label = "Filesystem"; + reg = <0x00320000 0x00400000>; + }; + partition@5 { + label = "MAC-Address"; + reg = <0x007f0000 0x00010000>; + read-only; + }; + }; +}; + +&mdio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + bus_freq = <2200000>; +}; + +ð0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mii_pins>; +}; + +&gpio { + status = "okay"; +}; + /include/ "tps6507x.dtsi" &tps { @@ -297,6 +321,18 @@ }; }; +&usb_phy { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; + &vpif { pinctrl-names = "default"; pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>; From abb205ded1fe77ea03ccf3c5938ec0ca524e630a Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Fri, 17 Aug 2018 09:32:39 -0500 Subject: [PATCH 06/56] ARM: dts: da850-evm-u-boot: Remove redundant entries With the re-sync from Linux 4.18, several entries in da850-evm-u-boot.dtsi are no longer necessary, so this patch removes them. Signed-off-by: Adam Ford --- arch/arm/dts/da850-evm-u-boot.dtsi | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi index b3546e7..ab1de77 100644 --- a/arch/arm/dts/da850-evm-u-boot.dtsi +++ b/arch/arm/dts/da850-evm-u-boot.dtsi @@ -6,17 +6,6 @@ * Copyright (C) Adam Ford */ -/ { - chosen { - stdout-path = &serial2; - }; - - aliases { - i2c0 = &i2c0; - spi0 = &spi1; - }; -}; - &flash { compatible = "m25p64", "spi-flash"; }; From 535f46dad920094df12b2d19f071db2e6a8ae0ab Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Fri, 17 Aug 2018 14:37:58 -0500 Subject: [PATCH 07/56] GPIO: omap_gpio: Fix gpio name names with device tree The GPIO bank numbers do not appear in the device tree, so this patch makes the gpio name based on the address (ie gpio@49054000_31 vs gpio4_31) adam Signed-off-by: Adam Ford Tested-by: Derald D. Woods --- drivers/gpio/omap_gpio.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index 651f699..0f1ddef 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -288,11 +288,9 @@ static int omap_gpio_probe(struct udevice *dev) struct gpio_bank *bank = dev_get_priv(dev); struct omap_gpio_platdata *plat = dev_get_platdata(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - int banknum; char name[18], *str; - banknum = plat->bank_index; - sprintf(name, "GPIO%d_", banknum + 1); + sprintf(name, "gpio@%4x_", (unsigned int)plat->base); str = strdup(name); if (!str) return -ENOMEM; From e5f7a261db470e97f2018cdff41407af6353d969 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Sun, 19 Aug 2018 20:54:00 -0500 Subject: [PATCH 08/56] regulator: pbias: Add additional compatible flags The driver was developed with references for more than just dra7, but never included. At least for omap3, this appears to be functional. Signed-off-by: Adam Ford --- drivers/power/regulator/pbias_regulator.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c index 8f06e27..366f97b 100644 --- a/drivers/power/regulator/pbias_regulator.c +++ b/drivers/power/regulator/pbias_regulator.c @@ -108,6 +108,10 @@ static struct dm_pmic_ops pbias_ops = { static const struct udevice_id pbias_ids[] = { { .compatible = "ti,pbias-dra7" }, + { .compatible = "ti,pbias-omap2" }, + { .compatible = "ti,pbias-omap3" }, + { .compatible = "ti,pbias-omap4" }, + { .compatible = "ti,pbias-omap5" }, { } }; From afa8cdd60755784a74ec4683106a2abe718f9623 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 20 Aug 2018 20:24:34 -0500 Subject: [PATCH 09/56] DM: I2C: Reduce overhead when used with OF_PLATDATA Platforms with limited resources in SPL may enably OF_PLATDATA, this limits some of the library functions and cannot extract data from the device tree. This patch adds additional wrappers around these functions to only allow them when OF_CONTROL is enabled and OF_PLATDATA is not. Signed-off-by: Adam Ford --- drivers/i2c/i2c-uclass.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index 5e58dd0..c5a3c4e 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -562,7 +562,7 @@ int i2c_deblock(struct udevice *bus) return ops->deblock(bus); } -#if CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip) { int addr; @@ -584,7 +584,7 @@ int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip) static int i2c_post_probe(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev); i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000); @@ -597,7 +597,7 @@ static int i2c_post_probe(struct udevice *dev) static int i2c_child_post_bind(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) struct dm_i2c_chip *plat = dev_get_parent_platdata(dev); if (!dev_of_valid(dev)) @@ -612,7 +612,7 @@ UCLASS_DRIVER(i2c) = { .id = UCLASS_I2C, .name = "i2c", .flags = DM_UC_FLAG_SEQ_ALIAS, -#if CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .post_bind = dm_scan_fdt_dev, #endif .post_probe = i2c_post_probe, From 410c505cc145d570662ef0f841a942e650f8b1df Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 20 Aug 2018 20:24:35 -0500 Subject: [PATCH 10/56] DM: OMAP24XX_I2C: Reduce overhead when used with OF_PLATDATA Platforms with limited resources in SPL may enably OF_PLATDATA, this limits some of the library functions and cannot extract data from the device tree. This patch adds additional wrappers around these functions to only allow them when OF_CONTROL is enabled and OF_PLATDATA is not. Signed-off-by: Adam Ford --- drivers/i2c/omap24xx_i2c.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index 0759585..54bf35e 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -890,6 +890,7 @@ static int omap_i2c_probe(struct udevice *bus) return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static int omap_i2c_ofdata_to_platdata(struct udevice *bus) { struct omap_i2c *priv = dev_get_priv(bus); @@ -901,23 +902,26 @@ static int omap_i2c_ofdata_to_platdata(struct udevice *bus) return 0; } -static const struct dm_i2c_ops omap_i2c_ops = { - .xfer = omap_i2c_xfer, - .probe_chip = omap_i2c_probe_chip, - .set_bus_speed = omap_i2c_set_bus_speed, -}; - static const struct udevice_id omap_i2c_ids[] = { { .compatible = "ti,omap3-i2c" }, { .compatible = "ti,omap4-i2c" }, { } }; +#endif + +static const struct dm_i2c_ops omap_i2c_ops = { + .xfer = omap_i2c_xfer, + .probe_chip = omap_i2c_probe_chip, + .set_bus_speed = omap_i2c_set_bus_speed, +}; U_BOOT_DRIVER(i2c_omap) = { .name = "i2c_omap", .id = UCLASS_I2C, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = omap_i2c_ids, .ofdata_to_platdata = omap_i2c_ofdata_to_platdata, +#endif .probe = omap_i2c_probe, .priv_auto_alloc_size = sizeof(struct omap_i2c), .ops = &omap_i2c_ops, From 99571b41c6c21ccd3737971a51727e6f4d89126d Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 20 Aug 2018 20:27:48 -0500 Subject: [PATCH 11/56] DM: omap_gpio: Reduce overhead when used with OF_PLATDATA Platforms with limited resources in SPL may enable OF_PLATDATA, this limits some of the library functions and cannot extract data from the device tree. This patch adds additional wrappers around these functions to only allow them when OF_CONTROL is enabled and OF_PLATDATA is not. Signed-off-by: Adam Ford Reviewed-by: Simon Glass --- drivers/gpio/omap_gpio.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index 0f1ddef..555eba2 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -335,6 +335,7 @@ static int omap_gpio_bind(struct udevice *dev) } #endif +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id omap_gpio_ids[] = { { .compatible = "ti,omap3-gpio" }, { .compatible = "ti,omap4-gpio" }, @@ -342,7 +343,6 @@ static const struct udevice_id omap_gpio_ids[] = { { } }; -#if CONFIG_IS_ENABLED(OF_CONTROL) static int omap_gpio_ofdata_to_platdata(struct udevice *dev) { struct omap_gpio_platdata *plat = dev_get_platdata(dev); @@ -361,14 +361,15 @@ U_BOOT_DRIVER(gpio_omap) = { .name = "gpio_omap", .id = UCLASS_GPIO, #if CONFIG_IS_ENABLED(OF_CONTROL) +#if !CONFIG_IS_ENABLED(OF_PLATDATA) + .of_match = omap_gpio_ids, .ofdata_to_platdata = of_match_ptr(omap_gpio_ofdata_to_platdata), - .bind = dm_scan_fdt_dev, .platdata_auto_alloc_size = sizeof(struct omap_gpio_platdata), +#endif #else .bind = omap_gpio_bind, #endif .ops = &gpio_omap_ops, - .of_match = omap_gpio_ids, .probe = omap_gpio_probe, .priv_auto_alloc_size = sizeof(struct gpio_bank), .flags = DM_FLAG_PRE_RELOC, From 668146128aefc4c0e493056501092e90c85f1dd3 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 20 Aug 2018 20:34:00 -0500 Subject: [PATCH 12/56] ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabled boot-common.c checks to see if I2C is enabled in SPL, but it doens't check for DM_I2C before initializing it. This will now only initialize the I2C is the DM_I2C is not enabled to avoid initializing it more than once. Signed-off-by: Adam Ford Reviewed-by: Simon Glass --- arch/arm/mach-omap2/boot-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index d4a1e2e..176d4f6 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -202,7 +202,7 @@ void spl_board_init(void) #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT) gpmc_init(); #endif -#ifdef CONFIG_SPL_I2C_SUPPORT +#if defined(CONFIG_SPL_I2C_SUPPORT) && !defined(CONFIG_DM_I2C) i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); #endif #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT) From 750df1979d5713b3b8a5aab91315d90b9966c60e Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 20 Aug 2018 20:43:00 -0500 Subject: [PATCH 13/56] DM: serial: ti_omap3_common: Don't define serial unless !DM_SERIAL The serial port was being manually configured during SPL build, however in preparation to allow DM in SPL, this needs to change to be based on whether or not DM_SERIAL is enabled because, soon the assumption that SPL means no DM may not be accurate. Signed-off-by: Adam Ford Reviewed-by: Simon Glass --- include/configs/ti_omap3_common.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index dcf7630..c668284 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -27,12 +27,10 @@ /* NS16550 Configuration */ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#if defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_NS16550_SERIAL #if !defined(CONFIG_DM_SERIAL) +#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #endif /* !CONFIG_DM_SERIAL */ -#endif /* CONFIG_SPL_BUILD */ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} From 307a214329908e4abc0f978b9a10b1467e3872c6 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Tue, 21 Aug 2018 07:16:56 -0500 Subject: [PATCH 14/56] mmc: omap_hsmmc: Make DM_GPIO calls dependent on DM_GPIO The getcd and getwp functions when DM_MMC is enabled are assumming the DM_GPIO is enabled. In cases (like SPL) where DM_GPIO may not be enabled, wrap these calls in an #ifdef Signed-off-by: Adam Ford --- drivers/mmc/omap_hsmmc.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index caaa914..4d171f45 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -1365,9 +1365,10 @@ static int omap_hsmmc_set_ios(struct udevice *dev) static int omap_hsmmc_getcd(struct udevice *dev) { struct omap_hsmmc_data *priv = dev_get_priv(dev); - int value; - + int value = -1; +#if CONFIG_IS_ENABLED(DM_GPIO) value = dm_gpio_get_value(&priv->cd_gpio); +#endif /* if no CD return as 1 */ if (value < 0) return 1; @@ -1379,10 +1380,11 @@ static int omap_hsmmc_getcd(struct udevice *dev) static int omap_hsmmc_getwp(struct udevice *dev) { + int value = 0; +#if CONFIG_IS_ENABLED(DM_GPIO) struct omap_hsmmc_data *priv = dev_get_priv(dev); - int value; - value = dm_gpio_get_value(&priv->wp_gpio); +#endif /* if no WP return as 0 */ if (value < 0) return 0; @@ -1901,10 +1903,12 @@ static int omap_hsmmc_probe(struct udevice *dev) device_get_supply_regulator(dev, "pbias-supply", &priv->pbias_supply); #endif -#if defined(OMAP_HSMMC_USE_GPIO) && CONFIG_IS_ENABLED(OF_CONTROL) +#if defined(OMAP_HSMMC_USE_GPIO) +#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_GPIO) gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN); #endif +#endif mmc->dev = dev; upriv->mmc = mmc; From 4869fa3f46e6400358a9f3cef76ec96b80c4cc8b Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Tue, 21 Aug 2018 10:43:30 -0500 Subject: [PATCH 15/56] ARM: omap3_logic_defconfig: Convert to DM_SPL The OF_CONTROL and OF_PLATDATA are not really useful without DM. This patch supports DM_SPL, but it requires manual references both Serial and MMC. Signed-off-by: Adam Ford --- board/logicpd/omap3som/omap3logic.c | 31 +++++++++++++++++++++++++++++++ configs/omap3_logic_defconfig | 3 +++ 2 files changed, 34 insertions(+) diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c index fbad89b..620423b 100644 --- a/board/logicpd/omap3som/omap3logic.c +++ b/board/logicpd/omap3som/omap3logic.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -39,6 +40,36 @@ DECLARE_GLOBAL_DATA_PTR; +/* This is only needed until SPL gets OF support */ +#ifdef CONFIG_SPL_BUILD +static const struct ns16550_platdata omap3logic_serial = { + .base = OMAP34XX_UART1, + .reg_shift = 2, + .clock = V_NS16550_CLK, + .fcr = UART_FCR_DEFVAL, +}; + +U_BOOT_DEVICE(omap3logic_uart) = { + "ns16550_serial", + &omap3logic_serial +}; + +static const struct omap_hsmmc_plat omap3_logic_mmc0_platdata = { + .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE, + .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT, + .cfg.f_min = 400000, + .cfg.f_max = 52000000, + .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195, + .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, +}; + +U_BOOT_DEVICE(am335x_mmc0) = { + .name = "omap_hsmmc", + .platdata = &omap3_logic_mmc0_platdata, +}; + +#endif + /* * two dimensional array of strucures containining board name and Linux * machine IDs; row it selected based on CPU column is slected based diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index eab379b..c6acfab 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +# CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set @@ -32,6 +33,7 @@ CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_SPL_OF_PLATDATA=y # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y +CONFIG_SPL_DM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_DM_I2C=y @@ -46,6 +48,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x08000000 CONFIG_SMC911X_32_BIT=y +CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y From 5c4689e43e87606661fe8dca6c98eaea4d153a73 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 3 Sep 2018 13:56:47 -0500 Subject: [PATCH 16/56] ARM: omap3_logic: Enable Pinctrl The simple pinctrl driver currently available works with the omap3. Enabling this will use the device tree to automatically set the pin-muxing for various drivers. Signed-off-by: Adam Ford --- configs/omap3_logic_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index c6acfab..cea4e55 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -48,6 +48,8 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x08000000 CONFIG_SMC911X_32_BIT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From df6565c36c607104590e954d093b92a58a9d5d28 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Thu, 9 Aug 2018 06:15:12 -0500 Subject: [PATCH 17/56] MMC: Enable DM_MMC for Davinci With CONFIG_BLK becoming a requirement, the Davinci MMC driver needs to be updated with DM_MMC support. Since SPL is tiny and many boards do not support DM in SPL, this retains the backwards compatibility for those boards who need to initialize MMC manually in SPL. Signed-off-by: Peter Howard Signed-off-by: Adam Ford --- drivers/mmc/davinci_mmc.c | 158 ++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 147 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c index d7cb88a..db950ea 100644 --- a/drivers/mmc/davinci_mmc.c +++ b/drivers/mmc/davinci_mmc.c @@ -7,9 +7,10 @@ #include #include -#include +#include #include #include +#include #include #include #include @@ -23,10 +24,38 @@ #define set_bit(addr, val) set_val((addr), (get_val(addr) | (val))) #define clear_bit(addr, val) set_val((addr), (get_val(addr) & ~(val))) +#ifdef CONFIG_DM_MMC +struct davinci_of_data { + const char *name; + u8 version; +}; + +/* Davinci MMC board definitions */ +struct davinci_mmc_priv { + struct davinci_mmc_regs *reg_base; /* Register base address */ + uint input_clk; /* Input clock to MMC controller */ + uint version; /* MMC Controller version */ +}; + +struct davinci_mmc_plat +{ + struct mmc_config cfg; + struct mmc mmc; +}; +#endif + /* Set davinci clock prescalar value based on the required clock in HZ */ +#if !CONFIG_IS_ENABLED(DM_MMC) static void dmmc_set_clock(struct mmc *mmc, uint clock) { struct davinci_mmc *host = mmc->priv; +#else + +static void davinci_mmc_set_clock(struct udevice *dev, uint clock) +{ + struct davinci_mmc_priv *host = dev_get_priv(dev); + struct mmc *mmc = mmc_get_mmc_dev(dev); +#endif struct davinci_mmc_regs *regs = host->reg_base; uint clkrt, sysclk2, act_clock; @@ -120,13 +149,19 @@ static int dmmc_check_status(volatile struct davinci_mmc_regs *regs, } /* - * Sends a command out on the bus. Takes the mmc pointer, + * Sends a command out on the bus. Takes the device pointer, * a command pointer, and an optional data pointer. */ -static int -dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) +#if !CONFIG_IS_ENABLED(DM_MMC) +static int dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { struct davinci_mmc *host = mmc->priv; +#else +static int +davinci_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) +{ + struct davinci_mmc_priv *host = dev_get_priv(dev); +#endif volatile struct davinci_mmc_regs *regs = host->reg_base; uint mmcstatus, status_rdy, status_err; uint i, cmddata, bytes_left = 0; @@ -312,9 +347,15 @@ dmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) } /* Initialize Davinci MMC controller */ +#if !CONFIG_IS_ENABLED(DM_MMC) static int dmmc_init(struct mmc *mmc) { struct davinci_mmc *host = mmc->priv; +#else +static int davinci_dm_mmc_init(struct udevice *dev) +{ + struct davinci_mmc_priv *host = dev_get_priv(dev); +#endif struct davinci_mmc_regs *regs = host->reg_base; /* Clear status registers explicitly - soft reset doesn't clear it @@ -347,11 +388,19 @@ static int dmmc_init(struct mmc *mmc) } /* Set buswidth or clock as indicated by the MMC framework */ +#if !CONFIG_IS_ENABLED(DM_MMC) static int dmmc_set_ios(struct mmc *mmc) { struct davinci_mmc *host = mmc->priv; struct davinci_mmc_regs *regs = host->reg_base; +#else +static int davinci_mmc_set_ios(struct udevice *dev) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct davinci_mmc_priv *host = dev_get_priv(dev); + struct davinci_mmc_regs *regs = host->reg_base; +#endif /* Set the bus width */ if (mmc->bus_width == 4) set_bit(®s->mmcctl, MMCCTL_WIDTH_4_BIT); @@ -359,21 +408,33 @@ static int dmmc_set_ios(struct mmc *mmc) clear_bit(®s->mmcctl, MMCCTL_WIDTH_4_BIT); /* Set clock speed */ - if (mmc->clock) + if (mmc->clock) { +#if !CONFIG_IS_ENABLED(DM_MMC) dmmc_set_clock(mmc, mmc->clock); - +#else + davinci_mmc_set_clock(dev, mmc->clock); +#endif + } return 0; } +#if !CONFIG_IS_ENABLED(DM_MMC) static const struct mmc_ops dmmc_ops = { - .send_cmd = dmmc_send_cmd, - .set_ios = dmmc_set_ios, - .init = dmmc_init, + .send_cmd = dmmc_send_cmd, + .set_ios = dmmc_set_ios, + .init = dmmc_init, }; +#else +static const struct dm_mmc_ops davinci_mmc_ops = { + .send_cmd = davinci_mmc_send_cmd, + .set_ios = davinci_mmc_set_ios, +}; +#endif +#if !CONFIG_IS_ENABLED(DM_MMC) /* Called from board_mmc_init during startup. Can be called multiple times - * depending on the number of slots available on board and controller - */ +* depending on the number of slots available on board and controller +*/ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host) { host->cfg.name = "davinci"; @@ -389,3 +450,78 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host) return 0; } +#else + + +static int davinci_mmc_probe(struct udevice *dev) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct davinci_mmc_plat *plat = dev_get_platdata(dev); + struct davinci_mmc_priv *priv = dev_get_priv(dev); + struct mmc_config *cfg = &plat->cfg; + struct davinci_of_data *data = + (struct davinci_of_data *)dev_get_driver_data(dev); + cfg->f_min = 200000; + cfg->f_max = 25000000; + cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34, + cfg->host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ + cfg->b_max = DAVINCI_MAX_BLOCKS; + + if (data) { + cfg->name = data->name; + priv->version = data->version; + } + + priv->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev); + priv->input_clk = clk_get(DAVINCI_MMCSD_CLKID); + + upriv->mmc = &plat->mmc; + + return davinci_dm_mmc_init(dev); +} + +static int davinci_mmc_bind(struct udevice *dev) +{ + struct davinci_mmc_plat *plat = dev_get_platdata(dev); + + return mmc_bind(dev, &plat->mmc, &plat->cfg); +} + + +const struct davinci_of_data davinci_mmc_host_info[] = { + { + .name = "dm6441-mmc", + .version = MMC_CTLR_VERSION_1, + }, + { + .name = "da830-mmc", + .version = MMC_CTLR_VERSION_2, + }, + {}, +}; + +static const struct udevice_id davinci_mmc_ids[] = { + { + .compatible = "ti,dm6441-mmc", + .data = (ulong) &davinci_mmc_host_info[MMC_CTLR_VERSION_1] + }, + { + .compatible = "ti,da830-mmc", + .data = (ulong) &davinci_mmc_host_info[MMC_CTLR_VERSION_2] + }, + {}, +}; + +U_BOOT_DRIVER(davinci_mmc_drv) = { + .name = "davinci_mmc", + .id = UCLASS_MMC, + .of_match = davinci_mmc_ids, +#if CONFIG_BLK + .bind = davinci_mmc_bind, +#endif + .probe = davinci_mmc_probe, + .ops = &davinci_mmc_ops, + .platdata_auto_alloc_size = sizeof(struct davinci_mmc_plat), + .priv_auto_alloc_size = sizeof(struct davinci_mmc_priv), +}; +#endif From 4aeb939e77e4c43195be64a07e6035d3f7af9e91 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Thu, 9 Aug 2018 06:15:13 -0500 Subject: [PATCH 18/56] ARM: davinci: da850evm: Support DM_MMC With the updated driver available to support DM_MMC, this patch enables DM_MMC for da850evm. Signed-off-by: Adam Ford --- board/davinci/da8xxevm/da850evm.c | 2 ++ configs/da850evm_defconfig | 1 + 2 files changed, 3 insertions(+) diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 5583b45..e8ec553 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -204,6 +204,7 @@ int misc_init_r(void) return 0; } +#ifndef CONFIG_DM_MMC #ifdef CONFIG_MMC_DAVINCI static struct davinci_mmc mmc_sd0 = { .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, @@ -220,6 +221,7 @@ int board_mmc_init(bd_t *bis) return davinci_mmc_init(bis, &mmc_sd0); } #endif +#endif static const struct pinmux_config gpio_pins[] = { #ifdef CONFIG_USE_NOR diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index e81efe8..c30f396 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -43,6 +43,7 @@ CONFIG_DM_GPIO=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DAVINCI=y +CONFIG_DM_MMC=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_DM_SPI_FLASH=y From 21af33ed0319b1a5133ea78a4261b5464e1a6a1b Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Thu, 9 Aug 2018 06:15:14 -0500 Subject: [PATCH 19/56] ARM: davinci: omapl138_lcdk: Enable DM_MMC With DM_MMC now available, this patch enables DM_MMC for the omapl138_lcdk in U-Boot and keeps the older style for SPL. Signed-off-by: Peter Howard Signed-off-by: Adam Ford --- board/davinci/da8xxevm/omapl138_lcdk.c | 2 ++ configs/omapl138_lcdk_defconfig | 1 + 2 files changed, 3 insertions(+) diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c index 15ffc3b..2c2f885 100644 --- a/board/davinci/da8xxevm/omapl138_lcdk.c +++ b/board/davinci/da8xxevm/omapl138_lcdk.c @@ -353,6 +353,7 @@ int misc_init_r(void) return 0; } +#ifndef CONFIG_DM_MMC #ifdef CONFIG_MMC_DAVINCI static struct davinci_mmc mmc_sd0 = { .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, @@ -369,3 +370,4 @@ int board_mmc_init(bd_t *bis) return davinci_mmc_init(bis, &mmc_sd0); } #endif +#endif diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 96311af..e3a06c8 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -37,6 +37,7 @@ CONFIG_DM=y CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y CONFIG_SYS_I2C_DAVINCI=y +CONFIG_DM_MMC=y CONFIG_NAND=y CONFIG_NAND_DAVINCI=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y From 5f389201dece76b484443773dce2525dc205f5a1 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 13 Aug 2018 21:09:17 -0500 Subject: [PATCH 20/56] ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL With DM enabled, this patch enables DM_SERIAL and removes the NS16550 initialization from da850_lowlevel since the driver will take care of that itself. Signed-off-by: Adam Ford --- arch/arm/mach-davinci/da850_lowlevel.c | 4 ++-- configs/da850evm_direct_nor_defconfig | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c index 95dc93a..8ceb177 100644 --- a/arch/arm/mach-davinci/da850_lowlevel.c +++ b/arch/arm/mach-davinci/da850_lowlevel.c @@ -288,10 +288,10 @@ int arch_cpu_init(void) /* GPIO setup */ board_gpio_init(); - +#if !defined(CONFIG_DM_SERIAL) NS16550_init((NS16550_t)(CONFIG_SYS_NS16550_COM1), CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); - +#endif /* * Fix Power and Emulation Management Register * see sprufw3a.pdf page 37 Table 24 diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 4039d0e..1423a17 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -6,6 +6,7 @@ CONFIG_DA850_LOWLEVEL=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_F is not set +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -50,6 +51,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y From a40d3cc845756e1e38af5ac31986539417e64abb Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 3 Sep 2018 14:05:41 -0500 Subject: [PATCH 21/56] ARM: omap3_logic: Enable DM_PMIC and DM_REGULATOR Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO gives us the ability to better monitor voltages and enable hardware through the device tree. The TL4030 (TPS65950) is not yet migrated to DM, so this patch only enables the fixed and GPIO controlled regulators. Signed-off-by: Adam Ford --- configs/omap3_logic_defconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index cea4e55..9b50a30 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -50,6 +50,11 @@ CONFIG_SMC911X_BASE=0x08000000 CONFIG_SMC911X_32_BIT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_SYS_NS16550=y CONFIG_SPI=y From 8cd21a63463318b1f7c90778da364dd649c27ca9 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Sun, 19 Aug 2018 11:11:02 -0500 Subject: [PATCH 22/56] Configs: am3517_evm: Remove TWL4030 reference This SOM and kit do not nor have they ever had a twl4030 PMIC. This patch removes the references to it. Signed-off-by: Adam Ford --- configs/am3517_evm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index e845e35..96491f3 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_SPL_NAND_SIMPLE=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y +# CONFIG_TWL4030_POWER is not set CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SPI=y From 819ad5f625b17d189c5dcaec377c451fd3266def Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Sun, 19 Aug 2018 11:11:03 -0500 Subject: [PATCH 23/56] ARM: am3517_evm: Disable DM_I2C_COMPAT DM_I2C_COMPAT is somehow being enabled outside of Kconfig, so this explicitly undefines it in the header file, and brackets the I2C initialization around an #ifdef to not manually initialize the I2C controller when the DM_I2C is enabled. Signed-off-by: Adam Ford Tested-by: Derald D. Woods --- board/logicpd/am3517evm/am3517evm.c | 3 ++- include/configs/am3517_evm.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c index da8be22..6f72839 100644 --- a/board/logicpd/am3517evm/am3517evm.c +++ b/board/logicpd/am3517evm/am3517evm.c @@ -108,10 +108,11 @@ int misc_init_r(void) volatile unsigned int ctr; u32 reset; +#if !defined(CONFIG_DM_I2C) #ifdef CONFIG_SYS_I2C_OMAP24XX i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); #endif - +#endif omap_die_id_display(); am3517_evm_musb_init(); diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 1fe81d8..a3d261b 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -23,8 +23,9 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #include -#undef CONFIG_SDRC /* Disable SDRC since we have EMIF4 */ +#undef CONFIG_DM_I2C_COMPAT +#define CONFIG_MISC_INIT_R #define CONFIG_REVISION_TAG /* Hardware drivers */ From 04355de71def5e91898e2dc2a36d2eda47ba12b4 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 3 Sep 2018 03:47:52 -0500 Subject: [PATCH 24/56] MMC: davinici_mmc: Enable CD and WP with DM and OF_CONTROL When used with a device tree, this will extract the card detect and write protect pins from the device tree and configure them accordingly. This assumes the GPIO_ACTIVE_LOW/HIGH is supported by da8xx_gpio. Signed-off-by: Adam Ford --- drivers/mmc/davinci_mmc.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c index db950ea..0d63279 100644 --- a/drivers/mmc/davinci_mmc.c +++ b/drivers/mmc/davinci_mmc.c @@ -15,6 +15,7 @@ #include #include #include +#include #define DAVINCI_MAX_BLOCKS (32) #define WATCHDOG_COUNT (100000) @@ -35,6 +36,8 @@ struct davinci_mmc_priv { struct davinci_mmc_regs *reg_base; /* Register base address */ uint input_clk; /* Input clock to MMC controller */ uint version; /* MMC Controller version */ + struct gpio_desc cd_gpio; /* Card Detect GPIO */ + struct gpio_desc wp_gpio; /* Write Protect GPIO */ }; struct davinci_mmc_plat @@ -425,9 +428,41 @@ static const struct mmc_ops dmmc_ops = { .init = dmmc_init, }; #else + +static int davinci_mmc_getcd(struct udevice *dev) +{ + int value = -1; +#if CONFIG_IS_ENABLED(DM_GPIO) + struct davinci_mmc_priv *priv = dev_get_priv(dev); + value = dm_gpio_get_value(&priv->cd_gpio); +#endif + /* if no CD return as 1 */ + if (value < 0) + return 1; + + return value; +} + +static int davinci_mmc_getwp(struct udevice *dev) +{ + int value = -1; +#if CONFIG_IS_ENABLED(DM_GPIO) + struct davinci_mmc_priv *priv = dev_get_priv(dev); + + value = dm_gpio_get_value(&priv->wp_gpio); +#endif + /* if no WP return as 0 */ + if (value < 0) + return 0; + + return value; +} + static const struct dm_mmc_ops davinci_mmc_ops = { .send_cmd = davinci_mmc_send_cmd, .set_ios = davinci_mmc_set_ios, + .get_cd = davinci_mmc_getcd, + .get_wp = davinci_mmc_getwp, }; #endif @@ -475,6 +510,12 @@ static int davinci_mmc_probe(struct udevice *dev) priv->reg_base = (struct davinci_mmc_regs *)dev_read_addr(dev); priv->input_clk = clk_get(DAVINCI_MMCSD_CLKID); +#if CONFIG_IS_ENABLED(DM_GPIO) + /* These GPIOs are optional */ + gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); + gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN); +#endif + upriv->mmc = &plat->mmc; return davinci_dm_mmc_init(dev); From ca1d6ca3653c5aa7679a55fd84a20e175d3b8e64 Mon Sep 17 00:00:00 2001 From: Tuomas Tynkkynen Date: Thu, 16 Aug 2018 02:08:11 +0300 Subject: [PATCH 25/56] i2c: Drop CONFIG_SYS_I2C_MXS Last user of this driver went away in May 2017, in commit eb5ba3aefdf0f6 ("i2c: Drop use of CONFIG_I2C_HARD") Signed-off-by: Tuomas Tynkkynen --- drivers/i2c/Makefile | 1 - drivers/i2c/mxs_i2c.c | 319 -------------------------------------------------- 2 files changed, 320 deletions(-) delete mode 100644 drivers/i2c/mxs_i2c.c diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index da368cc..f2cbe78 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -24,7 +24,6 @@ obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o obj-$(CONFIG_SYS_I2C_MESON) += meson_i2c.o obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o -obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c deleted file mode 100644 index 6766d37..0000000 --- a/drivers/i2c/mxs_i2c.c +++ /dev/null @@ -1,319 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Freescale i.MX28 I2C Driver - * - * Copyright (C) 2011 Marek Vasut - * on behalf of DENX Software Engineering GmbH - * - * Partly based on Linux kernel i2c-mxs.c driver: - * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. - * - * Which was based on a (non-working) driver which was: - * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define MXS_I2C_MAX_TIMEOUT 1000000 - -static struct mxs_i2c_regs *mxs_i2c_get_base(struct i2c_adapter *adap) -{ - if (adap->hwadapnr == 0) - return (struct mxs_i2c_regs *)MXS_I2C0_BASE; - else - return (struct mxs_i2c_regs *)MXS_I2C1_BASE; -} - -static unsigned int mxs_i2c_get_bus_speed(struct i2c_adapter *adap) -{ - struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap); - uint32_t clk = mxc_get_clock(MXC_XTAL_CLK); - uint32_t timing0; - - timing0 = readl(&i2c_regs->hw_i2c_timing0); - /* - * This is a reverse version of the algorithm presented in - * i2c_set_bus_speed(). Please refer there for details. - */ - return clk / ((((timing0 >> 16) - 3) * 2) + 38); -} - -static uint mxs_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed) -{ - struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap); - /* - * The timing derivation algorithm. There is no documentation for this - * algorithm available, it was derived by using the scope and fiddling - * with constants until the result observed on the scope was good enough - * for 20kHz, 50kHz, 100kHz, 200kHz, 300kHz and 400kHz. It should be - * possible to assume the algorithm works for other frequencies as well. - * - * Note it was necessary to cap the frequency on both ends as it's not - * possible to configure completely arbitrary frequency for the I2C bus - * clock. - */ - uint32_t clk = mxc_get_clock(MXC_XTAL_CLK); - uint32_t base = ((clk / speed) - 38) / 2; - uint16_t high_count = base + 3; - uint16_t low_count = base - 3; - uint16_t rcv_count = (high_count * 3) / 4; - uint16_t xmit_count = low_count / 4; - - if (speed > 540000) { - printf("MXS I2C: Speed too high (%d Hz)\n", speed); - return -EINVAL; - } - - if (speed < 12000) { - printf("MXS I2C: Speed too low (%d Hz)\n", speed); - return -EINVAL; - } - - writel((high_count << 16) | rcv_count, &i2c_regs->hw_i2c_timing0); - writel((low_count << 16) | xmit_count, &i2c_regs->hw_i2c_timing1); - - writel((0x0030 << I2C_TIMING2_BUS_FREE_OFFSET) | - (0x0030 << I2C_TIMING2_LEADIN_COUNT_OFFSET), - &i2c_regs->hw_i2c_timing2); - - return 0; -} - -static void mxs_i2c_reset(struct i2c_adapter *adap) -{ - struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap); - int ret; - int speed = mxs_i2c_get_bus_speed(adap); - - ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg); - if (ret) { - debug("MXS I2C: Block reset timeout\n"); - return; - } - - writel(I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | I2C_CTRL1_NO_SLAVE_ACK_IRQ | - I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ | - I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ, - &i2c_regs->hw_i2c_ctrl1_clr); - - writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, &i2c_regs->hw_i2c_queuectrl_set); - - mxs_i2c_set_bus_speed(adap, speed); -} - -static void mxs_i2c_setup_read(struct i2c_adapter *adap, uint8_t chip, int len) -{ - struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap); - - writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START | - I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION | - (1 << I2C_QUEUECMD_XFER_COUNT_OFFSET), - &i2c_regs->hw_i2c_queuecmd); - - writel((chip << 1) | 1, &i2c_regs->hw_i2c_data); - - writel(I2C_QUEUECMD_SEND_NAK_ON_LAST | I2C_QUEUECMD_MASTER_MODE | - (len << I2C_QUEUECMD_XFER_COUNT_OFFSET) | - I2C_QUEUECMD_POST_SEND_STOP, &i2c_regs->hw_i2c_queuecmd); - - writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set); -} - -static int mxs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, - int alen, uchar *buf, int blen, int stop) -{ - struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap); - uint32_t data, tmp; - int i, remain, off; - int timeout = MXS_I2C_MAX_TIMEOUT; - - if ((alen > 4) || (alen == 0)) { - debug("MXS I2C: Invalid address length\n"); - return -EINVAL; - } - - if (stop) - stop = I2C_QUEUECMD_POST_SEND_STOP; - - writel(I2C_QUEUECMD_PRE_SEND_START | - I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION | - ((blen + alen + 1) << I2C_QUEUECMD_XFER_COUNT_OFFSET) | stop, - &i2c_regs->hw_i2c_queuecmd); - - data = (chip << 1) << 24; - - for (i = 0; i < alen; i++) { - data >>= 8; - data |= ((char *)&addr)[alen - i - 1] << 24; - if ((i & 3) == 2) - writel(data, &i2c_regs->hw_i2c_data); - } - - off = i; - for (; i < off + blen; i++) { - data >>= 8; - data |= buf[i - off] << 24; - if ((i & 3) == 2) - writel(data, &i2c_regs->hw_i2c_data); - } - - remain = 24 - ((i & 3) * 8); - if (remain) - writel(data >> remain, &i2c_regs->hw_i2c_data); - - writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set); - - while (--timeout) { - tmp = readl(&i2c_regs->hw_i2c_queuestat); - if (tmp & I2C_QUEUESTAT_WR_QUEUE_EMPTY) - break; - } - - if (!timeout) { - debug("MXS I2C: Failed transmitting data!\n"); - return -EINVAL; - } - - return 0; -} - -static int mxs_i2c_wait_for_ack(struct i2c_adapter *adap) -{ - struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap); - uint32_t tmp; - int timeout = MXS_I2C_MAX_TIMEOUT; - - for (;;) { - tmp = readl(&i2c_regs->hw_i2c_ctrl1); - if (tmp & I2C_CTRL1_NO_SLAVE_ACK_IRQ) { - debug("MXS I2C: No slave ACK\n"); - goto err; - } - - if (tmp & ( - I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ | - I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ)) { - debug("MXS I2C: Error (CTRL1 = %08x)\n", tmp); - goto err; - } - - if (tmp & I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ) - break; - - if (!timeout--) { - debug("MXS I2C: Operation timed out\n"); - goto err; - } - - udelay(1); - } - - return 0; - -err: - mxs_i2c_reset(adap); - return 1; -} - -static int mxs_i2c_if_read(struct i2c_adapter *adap, uint8_t chip, - uint addr, int alen, uint8_t *buffer, - int len) -{ - struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap); - uint32_t tmp = 0; - int timeout = MXS_I2C_MAX_TIMEOUT; - int ret; - int i; - - ret = mxs_i2c_write(adap, chip, addr, alen, NULL, 0, 0); - if (ret) { - debug("MXS I2C: Failed writing address\n"); - return ret; - } - - ret = mxs_i2c_wait_for_ack(adap); - if (ret) { - debug("MXS I2C: Failed writing address\n"); - return ret; - } - - mxs_i2c_setup_read(adap, chip, len); - ret = mxs_i2c_wait_for_ack(adap); - if (ret) { - debug("MXS I2C: Failed reading address\n"); - return ret; - } - - for (i = 0; i < len; i++) { - if (!(i & 3)) { - while (--timeout) { - tmp = readl(&i2c_regs->hw_i2c_queuestat); - if (!(tmp & I2C_QUEUESTAT_RD_QUEUE_EMPTY)) - break; - } - - if (!timeout) { - debug("MXS I2C: Failed receiving data!\n"); - return -ETIMEDOUT; - } - - tmp = readl(&i2c_regs->hw_i2c_queuedata); - } - buffer[i] = tmp & 0xff; - tmp >>= 8; - } - - return 0; -} - -static int mxs_i2c_if_write(struct i2c_adapter *adap, uint8_t chip, - uint addr, int alen, uint8_t *buffer, - int len) -{ - int ret; - ret = mxs_i2c_write(adap, chip, addr, alen, buffer, len, 1); - if (ret) { - debug("MXS I2C: Failed writing address\n"); - return ret; - } - - ret = mxs_i2c_wait_for_ack(adap); - if (ret) - debug("MXS I2C: Failed writing address\n"); - - return ret; -} - -static int mxs_i2c_probe(struct i2c_adapter *adap, uint8_t chip) -{ - int ret; - ret = mxs_i2c_write(adap, chip, 0, 1, NULL, 0, 1); - if (!ret) - ret = mxs_i2c_wait_for_ack(adap); - mxs_i2c_reset(adap); - return ret; -} - -static void mxs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) -{ - mxs_i2c_reset(adap); - mxs_i2c_set_bus_speed(adap, speed); - - return; -} - -U_BOOT_I2C_ADAP_COMPLETE(mxs0, mxs_i2c_init, mxs_i2c_probe, - mxs_i2c_if_read, mxs_i2c_if_write, - mxs_i2c_set_bus_speed, - CONFIG_SYS_I2C_SPEED, 0, 0) -U_BOOT_I2C_ADAP_COMPLETE(mxs1, mxs_i2c_init, mxs_i2c_probe, - mxs_i2c_if_read, mxs_i2c_if_write, - mxs_i2c_set_bus_speed, - CONFIG_SYS_I2C_SPEED, 0, 1) From 7236e24bc4366e166b9f5f5e156f7b64cdb64949 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 9 Aug 2018 09:09:20 +0200 Subject: [PATCH 26/56] fs: ubifs: Add missing newlines in super.c I just stumbled over some cluttered UBIFS messages. It seems some newline chars are missing in the current U-Boot UBI source. Signed-off-by: Stefan Roese Cc: Heiko Schocher --- fs/ubifs/super.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index 9603163..9939b44 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -2461,7 +2461,7 @@ static struct dentry *ubifs_mount(struct file_system_type *fs_type, int flags, */ ubi = open_ubi(name, UBI_READONLY); if (IS_ERR(ubi)) { - pr_err("UBIFS error (pid: %d): cannot open \"%s\", error %d", + pr_err("UBIFS error (pid: %d): cannot open \"%s\", error %d\n", current->pid, name, (int)PTR_ERR(ubi)); return ERR_CAST(ubi); } @@ -2603,7 +2603,7 @@ int ubifs_init(void) * UBIFS_BLOCK_SIZE. It is assumed that both are powers of 2. */ if (PAGE_CACHE_SIZE < UBIFS_BLOCK_SIZE) { - pr_err("UBIFS error (pid %d): VFS page cache size is %u bytes, but UBIFS requires at least 4096 bytes", + pr_err("UBIFS error (pid %d): VFS page cache size is %u bytes, but UBIFS requires at least 4096 bytes\n", current->pid, (unsigned int)PAGE_CACHE_SIZE); return -EINVAL; } @@ -2632,7 +2632,7 @@ int ubifs_init(void) err = register_filesystem(&ubifs_fs_type); if (err) { - pr_err("UBIFS error (pid %d): cannot register file system, error %d", + pr_err("UBIFS error (pid %d): cannot register file system, error %d\n", current->pid, err); goto out_dbg; } From 3a8f6778227987e3f4fa7418ecfd6d024341b714 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 14 Sep 2018 13:41:31 -0400 Subject: [PATCH 27/56] am3517_evm: Drop inadvertently added line I added in the CONFIG_MISC_INIT_R line by mistake when applying the previous patch, fix. Signed-off-by: Tom Rini --- include/configs/am3517_evm.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index a3d261b..0463e42 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -25,7 +25,6 @@ #include #undef CONFIG_DM_I2C_COMPAT -#define CONFIG_MISC_INIT_R #define CONFIG_REVISION_TAG /* Hardware drivers */ From ecb10a41c9adf2c499c3d19fff96a08bb9ad2aef Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 14 Sep 2018 13:52:08 -0400 Subject: [PATCH 28/56] Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL" This commit is breaking several variants of da850, so: This reverts commit 5f389201dece76b484443773dce2525dc205f5a1. Signed-off-by: Tom Rini --- arch/arm/mach-davinci/da850_lowlevel.c | 4 ++-- configs/da850evm_direct_nor_defconfig | 3 --- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c index 8ceb177..95dc93a 100644 --- a/arch/arm/mach-davinci/da850_lowlevel.c +++ b/arch/arm/mach-davinci/da850_lowlevel.c @@ -288,10 +288,10 @@ int arch_cpu_init(void) /* GPIO setup */ board_gpio_init(); -#if !defined(CONFIG_DM_SERIAL) + NS16550_init((NS16550_t)(CONFIG_SYS_NS16550_COM1), CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); -#endif + /* * Fix Power and Emulation Management Register * see sprufw3a.pdf page 37 Table 24 diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 1423a17..4039d0e 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -6,7 +6,6 @@ CONFIG_DA850_LOWLEVEL=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_F is not set -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -51,8 +50,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y -CONFIG_SPECIFY_CONSOLE_INDEX=y -CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y From 71f2700b92ab6e419741dc81c27d77cddfaab45f Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Thu, 16 Aug 2018 13:46:30 +0800 Subject: [PATCH 29/56] gpio: dwapb_gpio: Enable get_function support Enabled get_function support for dwapb where the function will return the state of GPIO port. Signed-off-by: Chin Liang See Signed-off-by: Ley Foon Tan --- drivers/gpio/dwapb_gpio.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c index a118f58..e7e9b1e 100644 --- a/drivers/gpio/dwapb_gpio.c +++ b/drivers/gpio/dwapb_gpio.c @@ -78,11 +78,25 @@ static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val) return 0; } +static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset) +{ + struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); + u32 gpio; + + gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank)); + + if (gpio & BIT(offset)) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + static const struct dm_gpio_ops gpio_dwapb_ops = { .direction_input = dwapb_gpio_direction_input, .direction_output = dwapb_gpio_direction_output, .get_value = dwapb_gpio_get_value, .set_value = dwapb_gpio_set_value, + .get_function = dwapb_gpio_get_function, }; static int gpio_dwapb_probe(struct udevice *dev) From db6a158bc3fbf44fa71d18bf92f48961a500b4cc Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Tue, 4 Sep 2018 14:04:58 +0800 Subject: [PATCH 30/56] gpio: dwapb_gpio: Add reset ctrl to driver Add code to reset all reset signals as in gpio DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: Ley Foon Tan --- drivers/gpio/dwapb_gpio.c | 51 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c index e7e9b1e..3f6f2e8 100644 --- a/drivers/gpio/dwapb_gpio.c +++ b/drivers/gpio/dwapb_gpio.c @@ -15,6 +15,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -29,6 +30,10 @@ DECLARE_GLOBAL_DATA_PTR; #define GPIO_PORTA_EOI 0x4c #define GPIO_EXT_PORT(p) (0x50 + (p) * 4) +struct gpio_dwapb_priv { + struct reset_ctl_bulk resets; +}; + struct gpio_dwapb_platdata { const char *name; int bank; @@ -99,13 +104,42 @@ static const struct dm_gpio_ops gpio_dwapb_ops = { .get_function = dwapb_gpio_get_function, }; +static int gpio_dwapb_reset(struct udevice *dev) +{ + int ret; + struct gpio_dwapb_priv *priv = dev_get_priv(dev); + + ret = reset_get_bulk(dev, &priv->resets); + if (ret) { + /* Return 0 if error due to !CONFIG_DM_RESET and reset + * DT property is not present. + */ + if (ret == -ENOENT || ret == -ENOTSUPP) + return 0; + + dev_warn(dev, "Can't get reset: %d\n", ret); + return ret; + } + + ret = reset_deassert_bulk(&priv->resets); + if (ret) { + reset_release_bulk(&priv->resets); + dev_err(dev, "Failed to reset: %d\n", ret); + return ret; + } + + return 0; +} + static int gpio_dwapb_probe(struct udevice *dev) { struct gpio_dev_priv *priv = dev_get_uclass_priv(dev); struct gpio_dwapb_platdata *plat = dev->platdata; - if (!plat) - return 0; + if (!plat) { + /* Reset on parent device only */ + return gpio_dwapb_reset(dev); + } priv->gpio_count = plat->pins; priv->bank_name = plat->name; @@ -166,6 +200,17 @@ err: return ret; } +static int gpio_dwapb_remove(struct udevice *dev) +{ + struct gpio_dwapb_platdata *plat = dev_get_platdata(dev); + struct gpio_dwapb_priv *priv = dev_get_priv(dev); + + if (!plat && priv) + return reset_release_bulk(&priv->resets); + + return 0; +} + static const struct udevice_id gpio_dwapb_ids[] = { { .compatible = "snps,dw-apb-gpio" }, { } @@ -178,4 +223,6 @@ U_BOOT_DRIVER(gpio_dwapb) = { .ops = &gpio_dwapb_ops, .bind = gpio_dwapb_bind, .probe = gpio_dwapb_probe, + .remove = gpio_dwapb_remove, + .priv_auto_alloc_size = sizeof(struct gpio_dwapb_priv), }; From 9ea354444d156b1f7c1d1990a32215c257b38e16 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Thu, 16 Aug 2018 02:05:54 +0800 Subject: [PATCH 31/56] gpio: dwapb_gpio: Change to use dev_read_addr() This changes the driver to use dev_read_addr() which is safe both for flat trees and live trees. Signed-off-by: Ley Foon Tan --- drivers/gpio/dwapb_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c index 3f6f2e8..0f6574d 100644 --- a/drivers/gpio/dwapb_gpio.c +++ b/drivers/gpio/dwapb_gpio.c @@ -159,7 +159,7 @@ static int gpio_dwapb_bind(struct udevice *dev) if (plat) return 0; - base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg"); + base = dev_read_addr(dev); if (base == FDT_ADDR_T_NONE) { debug("Can't get the GPIO register base address\n"); return -ENXIO; From 2ff60af605d64218374dbaf71cf47be865f84192 Mon Sep 17 00:00:00 2001 From: Dalon Westergreen Date: Mon, 10 Sep 2018 10:28:47 -0700 Subject: [PATCH 32/56] common: add spl/u-boot-spl.hex target Some devices, namely Intel's stratix10 SoC, require u-boot-spl in a hex format. This patch adds spl/u-boot-spl.hex as a possible target. Signed-off-by: Dalon Westergreen --- Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Makefile b/Makefile index 1891c3a..e38966e 100644 --- a/Makefile +++ b/Makefile @@ -985,6 +985,11 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \ $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) +OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex) + +spl/u-boot-spl.hex: spl/u-boot-spl FORCE + $(call if_changed,objcopy) + binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ map_size=$(shell cat u-boot.map | \ From 3570469742aec30fed0b423708df346176fa9438 Mon Sep 17 00:00:00 2001 From: Dalon Westergreen Date: Mon, 10 Sep 2018 10:28:48 -0700 Subject: [PATCH 33/56] arm: socfpga: stratix10: add CONFIG_SPL_TARGET Stratix10 combines the u-boot-spl image into the fpga configuration bitstream so that the SDM can load the processors memory. This process requires a hex format of the u-boot-spl image. CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex" Signed-off-by: Dalon Westergreen --- include/configs/socfpga_stratix10_socdk.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index b58f478..91315a0 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -202,6 +202,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB) * */ +#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex" #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR From 02d8d3259133ea7af6031e4a780bdac1462ae057 Mon Sep 17 00:00:00 2001 From: Dalon Westergreen Date: Tue, 11 Sep 2018 10:06:14 -0700 Subject: [PATCH 34/56] socfpga: stratix10: fix sdram_calculate_size Incorrect type of size variable results in 0 being returned for sdram sizes greater than or equal to 4GB. Signed-off-by: Dalon Westergreen --- arch/arm/mach-socfpga/include/mach/sdram_s10.h | 2 +- drivers/ddr/altera/sdram_s10.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-socfpga/include/mach/sdram_s10.h b/arch/arm/mach-socfpga/include/mach/sdram_s10.h index 91bfc0e..ca68594 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_s10.h +++ b/arch/arm/mach-socfpga/include/mach/sdram_s10.h @@ -7,7 +7,7 @@ #ifndef _SDRAM_S10_H_ #define _SDRAM_S10_H_ -unsigned long sdram_calculate_size(void); +phys_size_t sdram_calculate_size(void); int sdram_mmr_init_full(unsigned int sdr_phy_reg); int sdram_calibration_full(void); diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index 48f4f47..a48567c 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -371,11 +371,11 @@ int sdram_mmr_init_full(unsigned int unused) * Calculate SDRAM device size based on SDRAM controller parameters. * Size is specified in bytes. */ -unsigned long sdram_calculate_size(void) +phys_size_t sdram_calculate_size(void) { u32 dramaddrw = hmc_readl(DRAMADDRW); - u32 size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + + phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) + From f6d600b39bfc9a9402bcb393e706407b109d00e7 Mon Sep 17 00:00:00 2001 From: Dalon Westergreen Date: Tue, 11 Sep 2018 17:25:00 -0700 Subject: [PATCH 35/56] arm: socfpga: stratix10: Add CONFIG_OF_EMBED The dtb should be embedded in the u-boot-spl image so that the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it. This also affects the main u-boot image, so adjust CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now also includes the dtb. Signed-off-by: Dalon Westergreen --- configs/socfpga_stratix10_defconfig | 1 + include/configs/socfpga_stratix10_socdk.h | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index c27985a..5f3d733 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index 91315a0..e190b3d 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -216,6 +216,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); /* SPL SDMMC boot support */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif /* __CONFIG_H */ From 5c349e179db794eff99dd5d3bbac6845d173709e Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Tue, 4 Sep 2018 11:37:25 +0200 Subject: [PATCH 36/56] usb: ehci-generic: Add vbus-supply regulator support Add vbus-supply regulator support. On some board vbus is not controlled by the phy but by an external regulator. Signed-off-by: Patrice Chotard --- drivers/usb/host/ehci-generic.c | 62 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index cc2f338..0270f3b 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -11,6 +11,7 @@ #include #include #include "ehci.h" +#include /* * Even though here we don't explicitly use "struct ehci_ctrl" @@ -22,10 +23,56 @@ struct generic_ehci { struct clk *clocks; struct reset_ctl *resets; struct phy phy; +#ifdef CONFIG_DM_REGULATOR + struct udevice *vbus_supply; +#endif int clock_count; int reset_count; }; +#ifdef CONFIG_DM_REGULATOR +static int ehci_enable_vbus_supply(struct udevice *dev) +{ + struct generic_ehci *priv = dev_get_priv(dev); + int ret; + + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret && ret != -ENOENT) + return ret; + + if (priv->vbus_supply) { + ret = regulator_set_enable(priv->vbus_supply, true); + if (ret) { + dev_err(dev, "Error enabling VBUS supply\n"); + return ret; + } + } else { + dev_dbg(dev, "No vbus supply\n"); + } + + return 0; +} + +static int ehci_disable_vbus_supply(struct generic_ehci *priv) +{ + if (priv->vbus_supply) + return regulator_set_enable(priv->vbus_supply, false); + else + return 0; +} +#else +static int ehci_enable_vbus_supply(struct udevice *dev) +{ + return 0; +} + +static int ehci_disable_vbus_supply(struct generic_ehci *priv) +{ + return 0; +} +#endif + static int ehci_usb_probe(struct udevice *dev) { struct generic_ehci *priv = dev_get_priv(dev); @@ -95,10 +142,14 @@ static int ehci_usb_probe(struct udevice *dev) } } - err = ehci_setup_phy(dev, &priv->phy, 0); + err = ehci_enable_vbus_supply(dev); if (err) goto reset_err; + err = ehci_setup_phy(dev, &priv->phy, 0); + if (err) + goto regulator_err; + hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE); hcor = (struct ehci_hcor *)((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); @@ -114,6 +165,11 @@ phy_err: if (ret) dev_err(dev, "failed to shutdown usb phy\n"); +regulator_err: + ret = ehci_disable_vbus_supply(priv); + if (ret) + dev_err(dev, "failed to disable VBUS supply\n"); + reset_err: ret = reset_release_all(priv->resets, priv->reset_count); if (ret) @@ -139,6 +195,10 @@ static int ehci_usb_remove(struct udevice *dev) if (ret) return ret; + ret = ehci_disable_vbus_supply(priv); + if (ret) + return ret; + ret = reset_release_all(priv->resets, priv->reset_count); if (ret) return ret; From c5fcd9e5839cf0a2bf16133c092510ff103f4aa3 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 29 Aug 2018 03:18:30 +0200 Subject: [PATCH 37/56] sh: sh7723: ap325rxa: Drop duplicate HIZCRB macro Drop the macro as it is defined in sh7723.h already. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- board/renesas/ap325rxa/cpld-ap325rxa.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/board/renesas/ap325rxa/cpld-ap325rxa.c b/board/renesas/ap325rxa/cpld-ap325rxa.c index 16fadcb..5d9dc93 100644 --- a/board/renesas/ap325rxa/cpld-ap325rxa.c +++ b/board/renesas/ap325rxa/cpld-ap325rxa.c @@ -61,8 +61,6 @@ #define CPLD_DONE_ADR ((vu_char *)0xA4050132) #define CPLD_DONE_DAT 0x20 -#define HIZCRB ((vu_short *)0xA405015A) - /* data */ #define CPLD_NOMAL_START 0xA0A80000 #define CPLD_SAFE_START 0xA0AC0000 @@ -191,7 +189,7 @@ void init_cpld(void) if (*CPLD_DONE_ADR & CPLD_DONE_DAT) /* Already DONE */ return; - *HIZCRB = 0x0000; + *((vu_short *)HIZCRB) = 0x0000; *CPLD_PFC_ADR = 0x7c00; /* FPGA PROG = OUTPUT */ /* write CPLD data from NOR flash to device */ From 2606deb22b58c8b55426a34dd7d93c703de65974 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Aug 2018 11:44:44 +0200 Subject: [PATCH 38/56] sh: sh7724: Drop EDMR macro Drop the macro as it is never used and it collides with sh_eth.h macros. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/sh/include/asm/cpu_sh7724.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/sh/include/asm/cpu_sh7724.h b/arch/sh/include/asm/cpu_sh7724.h index 7a81e16..7b21795 100644 --- a/arch/sh/include/asm/cpu_sh7724.h +++ b/arch/sh/include/asm/cpu_sh7724.h @@ -203,9 +203,6 @@ #define PYDR 0xA405016A #define PZDR 0xA405016C -/* Ether */ -#define EDMR 0xA4600000 - /* UBC */ /* H-UDI */ From d1da5d6cd8d33f777cf8374bf070970c4cca32e1 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:19:15 +0200 Subject: [PATCH 39/56] sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIV This constant is always 4 , for all boards that exist. Define it once in arch/sh/lib/time.c and remove it from the configs. Signed-off-by: Marek Vasut --- arch/sh/lib/time.c | 1 + include/configs/MigoR.h | 1 - include/configs/alt.h | 1 - include/configs/ap325rxa.h | 1 - include/configs/ap_sh4a_4a.h | 1 - include/configs/armadillo-800eva.h | 1 - include/configs/blanche.h | 1 - include/configs/ecovec.h | 1 - include/configs/espt.h | 1 - include/configs/gose.h | 1 - include/configs/koelsch.h | 1 - include/configs/lager.h | 1 - include/configs/mpr2.h | 1 - include/configs/ms7720se.h | 1 - include/configs/ms7722se.h | 1 - include/configs/ms7750se.h | 1 - include/configs/porter.h | 1 - include/configs/r0p7734.h | 1 - include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - include/configs/sh7752evb.h | 1 - include/configs/sh7753evb.h | 1 - include/configs/sh7757lcr.h | 1 - include/configs/sh7763rdp.h | 1 - include/configs/sh7785lcr.h | 1 - include/configs/shmin.h | 1 - include/configs/silk.h | 1 - include/configs/stout.h | 1 - scripts/config_whitelist.txt | 1 - 29 files changed, 1 insertion(+), 28 deletions(-) diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index eb64296..aac7988 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -16,6 +16,7 @@ #include #define TCR_TPSC 0x07 +#define CONFIG_SYS_TMU_CLK_DIV 4 static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 5cb2348..57e36e8 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -93,6 +93,5 @@ #define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ #endif /* __MIGO_R_H */ diff --git a/include/configs/alt.h b/include/configs/alt.h index d44a0b3..d884831 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 8680eb6..a6e6a43 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -114,6 +114,5 @@ #define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ #endif /* __AP325RXA_H */ diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index a4bdd44..c8e22de 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -102,6 +102,5 @@ #endif #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __AP_SH4A_4A_H */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index c0e1740..f14ea9a 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -93,6 +93,5 @@ #define CONFIG_SYS_CLK_FREQ 50000000 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __ARMADILLO_800EVA_H */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 6df0e9b..7a5abf9 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -53,7 +53,6 @@ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ -#define CONFIG_SYS_TMU_CLK_DIV 4 /* ENV setting */ #if !defined(CONFIG_MTD_NOR_FLASH) diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index e99564d..9084d2e 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -133,6 +133,5 @@ #define CONFIG_SYS_CLK_FREQ 41666666 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __ECOVEC_H */ diff --git a/include/configs/espt.h b/include/configs/espt.h index 978a9e0..fe8b84c 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -71,7 +71,6 @@ #define CONFIG_SYS_CLK_FREQ 66666666 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 /* Ether */ #define CONFIG_SH_ETHER_USE_PORT (1) diff --git a/include/configs/gose.h b/include/configs/gose.h index 00523d2..53d9322 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -35,7 +35,6 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index e5e667c..2479b7c 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -35,7 +35,6 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/lager.h b/include/configs/lager.h index ebcd179..4bff60f 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -36,7 +36,6 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index c6023a1..762d83c 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -51,7 +51,6 @@ #define CONFIG_SYS_CLK_FREQ 24000000 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */ /* UART */ #define CONFIG_CONS_SCIF0 1 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index e717970..60cc3ef 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -62,7 +62,6 @@ #define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */ /* PCMCIA */ #define CONFIG_IDE_PCMCIA 1 diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 1232764..8a5fa97 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -84,6 +84,5 @@ #define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ #endif /* __MS7722SE_H */ diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index b2cb6ba..4cad167 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -64,6 +64,5 @@ #define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __MS7750SE_H */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 42b9073..be1b5ff 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -40,7 +40,6 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 523764d..9c4468c 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -100,6 +100,5 @@ #endif #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __R0P7734_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 129dcf3..33a4420 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -48,7 +48,6 @@ #define CONFIG_SYS_CLK_FREQ 60000000 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ /* diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 8068ca7..a89e621 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -73,7 +73,6 @@ #define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 /* PCI Controller */ #if defined(CONFIG_CMD_PCI) diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 9b40e0f..289630a 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -77,5 +77,4 @@ #define CONFIG_SYS_CLK_FREQ 48000000 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __SH7752EVB_H */ diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 080b405..b58673a 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -77,5 +77,4 @@ #define CONFIG_SYS_CLK_FREQ 48000000 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __SH7753EVB_H */ diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 95d70bc..78606f3 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -89,5 +89,4 @@ #define CONFIG_SYS_CLK_FREQ 48000000 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __SH7757LCR_H */ diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 4015fb2..53fe450 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -71,7 +71,6 @@ #define CONFIG_SYS_CLK_FREQ 66666666 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ /* Ether */ #define CONFIG_SH_ETHER_USE_PORT (1) diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 38ae66b..6585298 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -128,6 +128,5 @@ #define CONFIG_SYS_CLK_FREQ 50000000 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __SH7785LCR_H */ diff --git a/include/configs/shmin.h b/include/configs/shmin.h index aada22d..df98f55 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -80,7 +80,6 @@ #endif /* CONFIG_T_SH7706LSR */ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 /* Network device */ #define CONFIG_DRIVER_NE2000 diff --git a/include/configs/silk.h b/include/configs/silk.h index 549aa79..ad14c5c 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -40,7 +40,6 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/stout.h b/include/configs/stout.h index eab0ef2..cc1cc84 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 30c79a6..94953d8 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -4277,7 +4277,6 @@ CONFIG_SYS_TMRINTR_PEND CONFIG_SYS_TMRINTR_PRI CONFIG_SYS_TMRPND_REG CONFIG_SYS_TMR_BASE -CONFIG_SYS_TMU_CLK_DIV CONFIG_SYS_TSEC1 CONFIG_SYS_TSEC1_OFFSET CONFIG_SYS_TSEC2 From eb05dcfea29bbafbc9f8ce3b7894e3e53f35d743 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:20:31 +0200 Subject: [PATCH 40/56] sh: tmu: Simplify the tmu_bit math The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0. Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV. Signed-off-by: Marek Vasut --- arch/sh/lib/time.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index aac7988..302f6be 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -16,14 +16,12 @@ #include #define TCR_TPSC 0x07 -#define CONFIG_SYS_TMU_CLK_DIV 4 static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; unsigned long get_tbclk(void) { - u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; - return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2); + return get_tmu0_clk_rate() >> 2; } unsigned long timer_read_counter(void) @@ -47,8 +45,7 @@ static void tmu_timer_stop(unsigned int timer) int timer_init(void) { - u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; - writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0); + writew(readw(&tmu->tcr0) & ~TCR_TPSC, &tmu->tcr0); tmu_timer_stop(0); tmu_timer_start(0); From 15f11fc6d72175ff5b7763f03d7b0d502efd24af Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:23:04 +0200 Subject: [PATCH 41/56] sh: tmu: Inline tmu_timer_{start,stop}() These functions are always called for timer = 0, so drop the timer check. Since these functions are called from one place only and they are reduced to one line of code, just inline them. Signed-off-by: Marek Vasut --- arch/sh/lib/time.c | 20 +++----------------- 1 file changed, 3 insertions(+), 17 deletions(-) diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index 302f6be..6273f39 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -16,6 +16,7 @@ #include #define TCR_TPSC 0x07 +#define TSTR_STR0 BIT(0) static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; @@ -29,26 +30,11 @@ unsigned long timer_read_counter(void) return ~readl(&tmu->tcnt0); } -static void tmu_timer_start(unsigned int timer) -{ - if (timer > 2) - return; - writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr); -} - -static void tmu_timer_stop(unsigned int timer) -{ - if (timer > 2) - return; - writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr); -} - int timer_init(void) { writew(readw(&tmu->tcr0) & ~TCR_TPSC, &tmu->tcr0); - - tmu_timer_stop(0); - tmu_timer_start(0); + writeb(readb(&tmu->tstr) & ~TSTR_STR0, &tmu->tstr); + writeb(readb(&tmu->tstr) | TSTR_STR0, &tmu->tstr); return 0; } From ae59a9f8f7785d86277149eb37314d2f21392f6f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:29:04 +0200 Subject: [PATCH 42/56] sh: tmu: Inline get_tmu0_clk_rate() This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant directly instead. Signed-off-by: Marek Vasut --- arch/sh/lib/time.c | 2 +- include/sh_tmu.h | 5 ----- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index 6273f39..0f31271 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -22,7 +22,7 @@ static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; unsigned long get_tbclk(void) { - return get_tmu0_clk_rate() >> 2; + return CONFIG_SH_TMU_CLK_FREQ / 4; } unsigned long timer_read_counter(void) diff --git a/include/sh_tmu.h b/include/sh_tmu.h index aa60c98..70aca21 100644 --- a/include/sh_tmu.h +++ b/include/sh_tmu.h @@ -67,9 +67,4 @@ struct tmu_regs { }; #endif /* CONFIG_CPU_SH4 */ -static inline unsigned long get_tmu0_clk_rate(void) -{ - return CONFIG_SH_TMU_CLK_FREQ; -} - #endif /* __SH_TMU_H */ From ccce3acfe70bdfb4fa8529dc853294f82859b08b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:34:07 +0200 Subject: [PATCH 43/56] sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2, while the old SH parts use CONFIG_SYS_CLK_FREQ directly. Just put this into the TMU implementation and drop the CONFIG_SH_TMU_CLK_FREQ config option. Signed-off-by: Marek Vasut --- arch/sh/lib/time.c | 6 +++++- include/configs/MigoR.h | 1 - include/configs/alt.h | 2 -- include/configs/ap325rxa.h | 1 - include/configs/ap_sh4a_4a.h | 1 - include/configs/armadillo-800eva.h | 1 - include/configs/blanche.h | 1 - include/configs/ecovec.h | 1 - include/configs/espt.h | 1 - include/configs/gose.h | 2 -- include/configs/koelsch.h | 2 -- include/configs/lager.h | 2 -- include/configs/mpr2.h | 1 - include/configs/ms7720se.h | 1 - include/configs/ms7722se.h | 1 - include/configs/ms7750se.h | 1 - include/configs/porter.h | 2 -- include/configs/r0p7734.h | 1 - include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - include/configs/rsk7203.h | 1 - include/configs/rsk7264.h | 1 - include/configs/rsk7269.h | 1 - include/configs/sh7752evb.h | 1 - include/configs/sh7753evb.h | 1 - include/configs/sh7757lcr.h | 1 - include/configs/sh7763rdp.h | 1 - include/configs/sh7785lcr.h | 1 - include/configs/shmin.h | 1 - include/configs/silk.h | 2 -- include/configs/stout.h | 2 -- 31 files changed, 5 insertions(+), 38 deletions(-) diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index 0f31271..9a1d3fb 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -22,7 +22,11 @@ static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; unsigned long get_tbclk(void) { - return CONFIG_SH_TMU_CLK_FREQ / 4; +#ifdef CONFIG_RCAR_GEN2 + return CONFIG_SYS_CLK_FREQ / 8; +#else + return CONFIG_SYS_CLK_FREQ / 4; +#endif } unsigned long timer_read_counter(void) diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 57e36e8..1ff04c3 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -91,7 +91,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __MIGO_R_H */ diff --git a/include/configs/alt.h b/include/configs/alt.h index d884831..cc6a7bf 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -37,8 +37,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) - #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index a6e6a43..40a843a 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -112,7 +112,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __AP325RXA_H */ diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index c8e22de..b9ff965 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -100,7 +100,6 @@ #else #define CONFIG_SYS_CLK_FREQ 44444444 #endif -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __AP_SH4A_4A_H */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index f14ea9a..b17d597 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -91,7 +91,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __ARMADILLO_800EVA_H */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 7a5abf9..e0acde3 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -52,7 +52,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ /* ENV setting */ #if !defined(CONFIG_MTD_NOR_FLASH) diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 9084d2e..1e358ec 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -131,7 +131,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 41666666 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __ECOVEC_H */ diff --git a/include/configs/espt.h b/include/configs/espt.h index fe8b84c..6bb23c6 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -69,7 +69,6 @@ /* Clock */ #define CONFIG_SYS_CLK_FREQ 66666666 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ /* Ether */ diff --git a/include/configs/gose.h b/include/configs/gose.h index 53d9322..36ac88a 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -33,8 +33,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) - #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 2479b7c..ef26a14 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -33,8 +33,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) - #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/lager.h b/include/configs/lager.h index 4bff60f..08498c6 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -34,8 +34,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) - #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index 762d83c..901a302 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -49,7 +49,6 @@ /* Clocks */ #define CONFIG_SYS_CLK_FREQ 24000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ /* UART */ diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index 60cc3ef..b159c10 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -60,7 +60,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ /* PCMCIA */ diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 8a5fa97..230b86b 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -82,7 +82,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __MS7722SE_H */ diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 4cad167..3584906 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -62,7 +62,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __MS7750SE_H */ diff --git a/include/configs/porter.h b/include/configs/porter.h index be1b5ff..e56dc3f 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -38,8 +38,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) - #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 9c4468c..8847685 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -98,7 +98,6 @@ #else #define CONFIG_SYS_CLK_FREQ 44444444 #endif -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __R0P7734_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 33a4420..b39b13b 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -46,7 +46,6 @@ * SuperH Clock setting */ #define CONFIG_SYS_CLK_FREQ 60000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index a89e621..a819e1b 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -71,7 +71,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ /* PCI Controller */ diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index a40b7ba..ef2b79e 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -58,7 +58,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index b936b13..54ca879 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -47,7 +47,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 36000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 0c0b773..f8e66e6 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -46,7 +46,6 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 66125000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 289630a..1f29e3d 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -75,6 +75,5 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 48000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __SH7752EVB_H */ diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index b58673a..0693fb5 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -75,6 +75,5 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 48000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __SH7753EVB_H */ diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 78606f3..05b2f01 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -87,6 +87,5 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 48000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __SH7757LCR_H */ diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 53fe450..2aefc69 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -69,7 +69,6 @@ /* Clock */ #define CONFIG_SYS_CLK_FREQ 66666666 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ /* Ether */ diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 6585298..6cb0ef3 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -126,7 +126,6 @@ /* Board Clock */ /* The SCIF used external clock. system clock only used timer. */ #define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #endif /* __SH7785LCR_H */ diff --git a/include/configs/shmin.h b/include/configs/shmin.h index df98f55..5eabdf5 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -78,7 +78,6 @@ #else #define CONFIG_SYS_CLK_FREQ 33333333 #endif /* CONFIG_T_SH7706LSR */ -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ /* Network device */ diff --git a/include/configs/silk.h b/include/configs/silk.h index ad14c5c..a94928b 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -38,8 +38,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) - #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/stout.h b/include/configs/stout.h index cc1cc84..b72b565 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -42,8 +42,6 @@ /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) - #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ From 8b39df9e78759c3af07466224c03d9a90d2453ca Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:37:14 +0200 Subject: [PATCH 44/56] sh: tmu: Inline sh_tmu.h The header contains only the TMU register layout, just inline it into the TMU timer implementation and drop the header completely. Signed-off-by: Marek Vasut --- arch/sh/lib/time.c | 43 ++++++++++++++++++++++++++++++++- include/sh_tmu.h | 70 ------------------------------------------------------ 2 files changed, 42 insertions(+), 71 deletions(-) delete mode 100644 include/sh_tmu.h diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index 9a1d3fb..a650c94 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -13,7 +13,48 @@ #include #include #include -#include + +#if defined(CONFIG_CPU_SH3) +struct tmu_regs { + u8 tocr; + u8 reserved0; + u8 tstr; + u8 reserved1; + u32 tcor0; + u32 tcnt0; + u16 tcr0; + u16 reserved2; + u32 tcor1; + u32 tcnt1; + u16 tcr1; + u16 reserved3; + u32 tcor2; + u32 tcnt2; + u16 tcr2; + u16 reserved4; + u32 tcpr2; +}; +#endif /* CONFIG_CPU_SH3 */ + +#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE) +struct tmu_regs { + u32 reserved; + u8 tstr; + u8 reserved2[3]; + u32 tcor0; + u32 tcnt0; + u16 tcr0; + u16 reserved3; + u32 tcor1; + u32 tcnt1; + u16 tcr1; + u16 reserved4; + u32 tcor2; + u32 tcnt2; + u16 tcr2; + u16 reserved5; +}; +#endif /* CONFIG_CPU_SH4 */ #define TCR_TPSC 0x07 #define TSTR_STR0 BIT(0) diff --git a/include/sh_tmu.h b/include/sh_tmu.h deleted file mode 100644 index 70aca21..0000000 --- a/include/sh_tmu.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (C) 2012 Renesas Solutions Corp. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __SH_TMU_H -#define __SH_TMU_H - -#include - -#if defined(CONFIG_CPU_SH3) -struct tmu_regs { - u8 tocr; - u8 reserved0; - u8 tstr; - u8 reserved1; - u32 tcor0; - u32 tcnt0; - u16 tcr0; - u16 reserved2; - u32 tcor1; - u32 tcnt1; - u16 tcr1; - u16 reserved3; - u32 tcor2; - u32 tcnt2; - u16 tcr2; - u16 reserved4; - u32 tcpr2; -}; -#endif /* CONFIG_CPU_SH3 */ - -#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE) -struct tmu_regs { - u32 reserved; - u8 tstr; - u8 reserved2[3]; - u32 tcor0; - u32 tcnt0; - u16 tcr0; - u16 reserved3; - u32 tcor1; - u32 tcnt1; - u16 tcr1; - u16 reserved4; - u32 tcor2; - u32 tcnt2; - u16 tcr2; - u16 reserved5; -}; -#endif /* CONFIG_CPU_SH4 */ - -#endif /* __SH_TMU_H */ From f02c1f695e13ee0ce01f111952ceaac094700de1 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:43:17 +0200 Subject: [PATCH 45/56] sh: tmu: Clean up register usage The code uses all in all three TMU registers, drop the massive register layout structures and just define the required timer registers and use them throughout the code. Signed-off-by: Marek Vasut --- arch/sh/lib/time.c | 54 +++++++++++------------------------------------------- 1 file changed, 11 insertions(+), 43 deletions(-) diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index a650c94..d531a49 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -15,52 +15,20 @@ #include #if defined(CONFIG_CPU_SH3) -struct tmu_regs { - u8 tocr; - u8 reserved0; - u8 tstr; - u8 reserved1; - u32 tcor0; - u32 tcnt0; - u16 tcr0; - u16 reserved2; - u32 tcor1; - u32 tcnt1; - u16 tcr1; - u16 reserved3; - u32 tcor2; - u32 tcnt2; - u16 tcr2; - u16 reserved4; - u32 tcpr2; -}; +#define TSTR 0x2 +#define TCNT0 0x8 +#define TCR0 0xc #endif /* CONFIG_CPU_SH3 */ #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE) -struct tmu_regs { - u32 reserved; - u8 tstr; - u8 reserved2[3]; - u32 tcor0; - u32 tcnt0; - u16 tcr0; - u16 reserved3; - u32 tcor1; - u32 tcnt1; - u16 tcr1; - u16 reserved4; - u32 tcor2; - u32 tcnt2; - u16 tcr2; - u16 reserved5; -}; +#define TSTR 0x4 +#define TCNT0 0xc +#define TCR0 0x10 #endif /* CONFIG_CPU_SH4 */ -#define TCR_TPSC 0x07 +#define TCR_TPSC 0x07 #define TSTR_STR0 BIT(0) -static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; - unsigned long get_tbclk(void) { #ifdef CONFIG_RCAR_GEN2 @@ -72,14 +40,14 @@ unsigned long get_tbclk(void) unsigned long timer_read_counter(void) { - return ~readl(&tmu->tcnt0); + return ~readl(TMU_BASE + TCNT0); } int timer_init(void) { - writew(readw(&tmu->tcr0) & ~TCR_TPSC, &tmu->tcr0); - writeb(readb(&tmu->tstr) & ~TSTR_STR0, &tmu->tstr); - writeb(readb(&tmu->tstr) | TSTR_STR0, &tmu->tstr); + writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0); + writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR); + writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR); return 0; } From 0e286c529f395947dbb96da93081883aca40a57f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 21:52:53 +0200 Subject: [PATCH 46/56] sh: tmu: Zap get_tbclk and timer_read_counter Replace those two functions with generic ones by defining the timer macros in include/config/*.h . Signed-off-by: Marek Vasut --- arch/sh/include/asm/config.h | 9 +++++++++ arch/sh/lib/time.c | 16 ---------------- include/configs/armadillo-800eva.h | 3 +++ include/configs/rcar-gen2-common.h | 7 ++++++- 4 files changed, 18 insertions(+), 17 deletions(-) diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h index bad0026..d2862df 100644 --- a/arch/sh/include/asm/config.h +++ b/arch/sh/include/asm/config.h @@ -6,4 +6,13 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ +#if !defined(CONFIG_CPU_SH2) +#include + +/* Timer */ +#define CONFIG_SYS_TIMER_COUNTS_DOWN +#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0x8) /* TCNT0 */ +#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) +#endif + #endif diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index d531a49..fb317f9 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -16,33 +16,17 @@ #if defined(CONFIG_CPU_SH3) #define TSTR 0x2 -#define TCNT0 0x8 #define TCR0 0xc #endif /* CONFIG_CPU_SH3 */ #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE) #define TSTR 0x4 -#define TCNT0 0xc #define TCR0 0x10 #endif /* CONFIG_CPU_SH4 */ #define TCR_TPSC 0x07 #define TSTR_STR0 BIT(0) -unsigned long get_tbclk(void) -{ -#ifdef CONFIG_RCAR_GEN2 - return CONFIG_SYS_CLK_FREQ / 8; -#else - return CONFIG_SYS_CLK_FREQ / 4; -#endif -} - -unsigned long timer_read_counter(void) -{ - return ~readl(TMU_BASE + TCNT0); -} - int timer_init(void) { writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0); diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index b17d597..3c6b2c3 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -18,6 +18,9 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_TMU_TIMER +#define CONFIG_SYS_TIMER_COUNTS_DOWN +#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ +#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) #define CONFIG_SYS_DCACHE_OFF /* STACK */ diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 2a5cd6b..d606da8 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -22,7 +22,6 @@ #define CONFIG_ARCH_CPU_INIT -#define CONFIG_TMU_TIMER #ifndef CONFIG_PINCTRL_PFC #define CONFIG_SH_GPIO_PFC #endif @@ -57,4 +56,10 @@ #undef CONFIG_SPI_FLASH_MTD #endif +/* Timer */ +#define CONFIG_TMU_TIMER +#define CONFIG_SYS_TIMER_COUNTS_DOWN +#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ +#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 8) + #endif /* __RCAR_GEN2_COMMON_H */ From e83da8e8809ccd3872270f4247fe76c1f75c1a92 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Aug 2018 22:36:18 +0200 Subject: [PATCH 47/56] ARM: rmobile: Repair TMU clock on Gen2 The Gen2 TMU is fed with fixed 32.5 MHz signal from CP . This is then divided by 4 in TMU. Fix the timer clock setting in Gen2. Signed-off-by: Marek Vasut --- include/configs/rcar-gen2-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index d606da8..01583f8 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -60,6 +60,6 @@ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 8) +#define CONFIG_SYS_TIMER_RATE (32500000 / 4) /* CP/4 */ #endif /* __RCAR_GEN2_COMMON_H */ From a1ed3a83be63bfc6e817854b29c9c0572a86bea7 Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Sun, 4 Feb 2018 21:13:12 +0100 Subject: [PATCH 48/56] m68k: fix mcf5441x total interrupt number Signed-off-by: Angelo Dureghello --- arch/m68k/include/asm/immap.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 06bc2a0..80fa257 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -362,7 +362,7 @@ #endif #define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CONFIG_SYS_NUM_IRQS (192) #endif /* CONFIG_M54418 */ From faae49543a0b366087cb733c26f8c581b17abe82 Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Sat, 4 Aug 2018 23:02:56 +0200 Subject: [PATCH 49/56] m68k: fix multiple memory accesses on swap operations On a u32 val = __sw32(*addr); multiple memory accesses are not welcome, since "addr" may be an IO peripheral register address. This patch changes __sw16/32 to perform a single memory access for the source value. Signed-off-by: Angelo Dureghello --- arch/m68k/include/asm/byteorder.h | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/arch/m68k/include/asm/byteorder.h b/arch/m68k/include/asm/byteorder.h index eb03b6a..9179622 100644 --- a/arch/m68k/include/asm/byteorder.h +++ b/arch/m68k/include/asm/byteorder.h @@ -10,21 +10,28 @@ #include #ifdef __GNUC__ -#define __sw16(x) \ - ((__u16)( \ - (((__u16)(x) & (__u16)0x00ffU) << 8) | \ - (((__u16)(x) & (__u16)0xff00U) >> 8) )) -#define __sw32(x) \ - ((__u32)( \ - (((__u32)(x)) << 24) | \ - (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ - (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ - (((__u32)(x)) >> 24) )) + +static inline __u32 __sw32(__u32 x) +{ + __u32 v = x; + + return v << 24 | + (v & (__u32)0x0000ff00UL) << 8 | + (v & (__u32)0x00ff0000UL) >> 8 | + v >> 24; +} + +static inline __u16 __sw16(__u16 x) +{ + __u16 v = x; + + return (v & (__u16)0x00ffU) << 8 | + (v & (__u16)0xff00U) >> 8; +} static __inline__ unsigned ld_le16(const volatile unsigned short *addr) { - unsigned result = *addr; - return __sw16(result); + return __sw16(*addr); } static __inline__ void st_le16(volatile unsigned short *addr, @@ -35,8 +42,7 @@ static __inline__ void st_le16(volatile unsigned short *addr, static __inline__ unsigned ld_le32(const volatile unsigned *addr) { - unsigned result = *addr; - return __sw32(result); + return __sw32(*addr); } static __inline__ void st_le32(volatile unsigned *addr, const unsigned val) From 2c92e4fbc69841170939a48e887c8fbbcb23d05c Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Thu, 25 Jan 2018 22:42:52 +0100 Subject: [PATCH 50/56] m68k: ColdFire mcf5441x, add eSDHC support This patch adds mcf5441x eSDHC support for the mcf5441x family. Signed-off-by: Angelo Dureghello --- arch/m68k/cpu/mcf5445x/cpu_init.c | 10 ++++++++++ arch/m68k/cpu/mcf5445x/speed.c | 2 ++ arch/m68k/include/asm/global_data.h | 3 +++ 3 files changed, 15 insertions(+) diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 0b86020..7632d92 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -173,6 +173,15 @@ void cpu_init_f(void) /* Lowest slew rate for UART0,1,2 */ out_8(&gpio->srcr_uart, 0x00); + +#ifdef CONFIG_FSL_ESDHC + /* eSDHC pin as faster speed */ + out_8(&gpio->srcr_sdhc, 0x03); + + /* All esdhc pins as SD */ + out_8(&gpio->par_sdhch, 0xff); + out_8(&gpio->par_sdhcl, 0xff); +#endif #endif /* CONFIG_MCF5441x */ #ifdef CONFIG_MCF5445x @@ -534,4 +543,5 @@ void cfspi_release_bus(uint bus, uint cs) clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); #endif } + #endif diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c index 5214730..e15e32e 100644 --- a/arch/m68k/cpu/mcf5445x/speed.c +++ b/arch/m68k/cpu/mcf5445x/speed.c @@ -120,6 +120,8 @@ void setup_5441x_clocks(void) temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1; gd->bus_clk = vco / temp; /* bus clock */ + temp = ((pdr & PLL_DR_OUTDIV3_BITS) >> 10) + 1; + gd->arch.sdhc_clk = vco / temp; } #endif diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index aa0be81..188055e 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -18,6 +18,9 @@ struct arch_global_data { unsigned long vco_clk; unsigned long flb_clk; #endif +#ifdef CONFIG_MCF5441x + unsigned long sdhc_clk; +#endif }; #include From 41f4e4302fbaa426f0ca34720f438f74d3304e79 Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Fri, 7 Sep 2018 09:30:00 +0200 Subject: [PATCH 51/56] x86: drop custom CONFIG_SYS_BAUDRATE_TABLE define This will add support for a baud rate of 57600. Signed-off-by: Christian Gmeiner Reviewed-by: Bin Meng --- include/configs/x86-common.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index f0b027e..78c382d 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -47,8 +47,6 @@ /*----------------------------------------------------------------------- * Serial Configuration */ -#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \ - 9600, 19200, 38400, 115200} #define CONFIG_SYS_NS16550_PORT_MAPPED /*----------------------------------------------------------------------- From 224742a390f48c64aac75095c7ac251077f07bdb Mon Sep 17 00:00:00 2001 From: Georgii Staroselskii Date: Tue, 11 Sep 2018 13:31:06 +0300 Subject: [PATCH 52/56] x86: cpu: introduce scu_ipc_raw_command() This interface will be used to configure properly some pins on Merrifield that are shared with SCU. scu_ipc_raw_command() writes SPTR and DPTR registers before sending a command to SCU. This code has been ported from Linux work done by Andy Shevchenko. Signed-off-by: Georgii Staroselskii Reviewed-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/include/asm/scu.h | 4 ++++ arch/x86/lib/scu.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+) diff --git a/arch/x86/include/asm/scu.h b/arch/x86/include/asm/scu.h index 7ce5824..f5ec5a1 100644 --- a/arch/x86/include/asm/scu.h +++ b/arch/x86/include/asm/scu.h @@ -6,6 +6,8 @@ #define _X86_ASM_SCU_IPC_H_ /* IPC defines the following message types */ +#define IPCMSG_INDIRECT_READ 0x02 +#define IPCMSG_INDIRECT_WRITE 0x05 #define IPCMSG_WARM_RESET 0xf0 #define IPCMSG_COLD_RESET 0xf1 #define IPCMSG_SOFT_RESET 0xf2 @@ -23,5 +25,7 @@ struct ipc_ifwi_version { /* Issue commands to the SCU with or without data */ int scu_ipc_simple_command(u32 cmd, u32 sub); int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen); +int scu_ipc_raw_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, + int outlen, u32 dptr, u32 sptr); #endif /* _X86_ASM_SCU_IPC_H_ */ diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c index caa04c6..af241ef 100644 --- a/arch/x86/lib/scu.c +++ b/arch/x86/lib/scu.c @@ -102,6 +102,57 @@ static int scu_ipc_cmd(struct ipc_regs *regs, u32 cmd, u32 sub, } /** + * scu_ipc_raw_command() - IPC command with data and pointers + * @cmd: IPC command code + * @sub: IPC command sub type + * @in: input data of this IPC command + * @inlen: input data length in dwords + * @out: output data of this IPC command + * @outlen: output data length in dwords + * @dptr: data writing to SPTR register + * @sptr: data writing to DPTR register + * + * Send an IPC command to SCU with input/output data and source/dest pointers. + * + * Return: an IPC error code or 0 on success. + */ +int scu_ipc_raw_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, + int outlen, u32 dptr, u32 sptr) +{ + int inbuflen = DIV_ROUND_UP(inlen, 4); + struct udevice *dev; + struct scu *scu; + int ret; + + ret = syscon_get_by_driver_data(X86_SYSCON_SCU, &dev); + if (ret) + return ret; + + scu = dev_get_priv(dev); + + /* Up to 16 bytes */ + if (inbuflen > 4) + return -EINVAL; + + writel(dptr, &scu->regs->dptr); + writel(sptr, &scu->regs->sptr); + + /* + * SRAM controller doesn't support 8-bit writes, it only + * supports 32-bit writes, so we have to copy input data into + * the temporary buffer, and SCU FW will use the inlen to + * determine the actual input data length in the temporary + * buffer. + */ + + u32 inbuf[4] = {0}; + + memcpy(inbuf, in, inlen); + + return scu_ipc_cmd(scu->regs, cmd, sub, inbuf, inlen, out, outlen); +} + +/** * scu_ipc_simple_command() - send a simple command * @cmd: command * @sub: sub type From 355c9b757e1110151c78ea82fd834e6cb09bdb96 Mon Sep 17 00:00:00 2001 From: Georgii Staroselskii Date: Tue, 11 Sep 2018 13:31:07 +0300 Subject: [PATCH 53/56] x86: tangier: pinmux: add API to configure protected pins This API is going to be used to configure some pins that are protected for simple modification. It's not a comprehensive pinctrl driver but can be turned into one when we need this in the future. Now it is planned to be used only in one place. So that's why I decided not to pollute the codebase with a full-blown pinctrl-merrifield nobody will use. This driver reads corresponding fields in DT and configures pins accordingly. The "protected" flag is used to distinguish configuration of SCU-owned pins from the ordinary ones. The code has been adapted from Linux work done by Andy Shevchenko in pinctrl-merrfifield.c Signed-off-by: Georgii Staroselskii Reviewed-by: Andy Shevchenko Reviewed-by: Bin Meng [bmeng: fix build warning] Signed-off-by: Bin Meng --- arch/x86/cpu/tangier/Makefile | 2 +- arch/x86/cpu/tangier/pinmux.c | 194 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 195 insertions(+), 1 deletion(-) create mode 100644 arch/x86/cpu/tangier/pinmux.c diff --git a/arch/x86/cpu/tangier/Makefile b/arch/x86/cpu/tangier/Makefile index 8274482..68f4a32 100644 --- a/arch/x86/cpu/tangier/Makefile +++ b/arch/x86/cpu/tangier/Makefile @@ -2,5 +2,5 @@ # # Copyright (c) 2017 Intel Corporation -obj-y += car.o tangier.o sdram.o sysreset.o +obj-y += car.o tangier.o sdram.o sysreset.o pinmux.o obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c new file mode 100644 index 0000000..fdd6530 --- /dev/null +++ b/arch/x86/cpu/tangier/pinmux.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2018 Emlid Limited + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BUFCFG_OFFSET 0x100 + +#define MRFLD_FAMILY_LEN 0x400 + +/* These are taken from Linux kernel */ +#define MRFLD_PINMODE_MASK 0x07 + +#define pin_to_bufno(f, p) ((p) - (f)->pin_base) + +struct mrfld_family { + unsigned int family_number; + unsigned int pin_base; + size_t npins; + void __iomem *regs; +}; + +#define MRFLD_FAMILY(b, s, e) \ + { \ + .family_number = (b), \ + .pin_base = (s), \ + .npins = (e) - (s) + 1, \ + } + +/* Now we only support I2C family of pins */ +static struct mrfld_family mrfld_families[] = { + MRFLD_FAMILY(7, 101, 114), +}; + +struct mrfld_pinctrl { + const struct mrfld_family *families; + size_t nfamilies; +}; + +static const struct mrfld_family * +mrfld_get_family(struct mrfld_pinctrl *mp, unsigned int pin) +{ + const struct mrfld_family *family; + unsigned int i; + + for (i = 0; i < mp->nfamilies; i++) { + family = &mp->families[i]; + if (pin >= family->pin_base && + pin < family->pin_base + family->npins) + return family; + } + + pr_err("failed to find family for pin %u\n", pin); + return NULL; +} + +static void __iomem * +mrfld_get_bufcfg(struct mrfld_pinctrl *pinctrl, unsigned int pin) +{ + const struct mrfld_family *family; + unsigned int bufno; + + family = mrfld_get_family(pinctrl, pin); + if (!family) + return NULL; + + bufno = pin_to_bufno(family, pin); + + return family->regs + BUFCFG_OFFSET + bufno * 4; +} + +static void +mrfld_setup_families(void *base_addr, + struct mrfld_family *families, unsigned int nfam) +{ + for (int i = 0; i < nfam; i++) { + struct mrfld_family *family = &families[i]; + + family->regs = base_addr + + family->family_number * MRFLD_FAMILY_LEN; + } +} + +static int mrfld_pinconfig_protected(unsigned int pin, u32 mask, u32 bits) +{ + struct mrfld_pinctrl *pinctrl; + struct udevice *dev; + void __iomem *bufcfg; + u32 v, value; + int ret; + + ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev); + if (ret) + return ret; + + pinctrl = dev_get_priv(dev); + + bufcfg = mrfld_get_bufcfg(pinctrl, pin); + if (!bufcfg) + return -EINVAL; + + value = readl(bufcfg); + + v = (value & ~mask) | (bits & mask); + + debug("scu: v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n", + v, (u32)bufcfg, bits, mask, bufcfg); + + ret = scu_ipc_raw_command(IPCMSG_INDIRECT_WRITE, 0, &v, 4, + NULL, 0, (u32)bufcfg, 0); + if (ret) + pr_err("Failed to set mode via SCU for pin %u (%d)\n", + pin, ret); + + return ret; +} + +static int mrfld_pinctrl_cfg_pin(ofnode pin_node) +{ + bool is_protected; + int pad_offset; + int mode; + u32 mask; + int ret; + + /* For now we only support just protected Family of pins */ + is_protected = ofnode_read_bool(pin_node, "protected"); + if (!is_protected) + return -ENOTSUPP; + + pad_offset = ofnode_read_s32_default(pin_node, "pad-offset", -1); + if (pad_offset == -1) + return -EINVAL; + + mode = ofnode_read_s32_default(pin_node, "mode-func", -1); + if (mode == -1) + return -EINVAL; + + mask = MRFLD_PINMODE_MASK; + + /* We don't support modes not in range 0..7 */ + if (mode & ~mask) + return -ENOTSUPP; + + ret = mrfld_pinconfig_protected(pad_offset, mask, mode); + + return ret; +} + +static int tangier_pinctrl_probe(struct udevice *dev) +{ + void *base_addr = syscon_get_first_range(X86_SYSCON_PINCONF); + struct mrfld_pinctrl *pinctrl = dev_get_priv(dev); + ofnode pin_node; + int ret; + + mrfld_setup_families(base_addr, mrfld_families, + ARRAY_SIZE(mrfld_families)); + + pinctrl->families = mrfld_families; + pinctrl->nfamilies = ARRAY_SIZE(mrfld_families); + + ofnode_for_each_subnode(pin_node, dev_ofnode(dev)) { + ret = mrfld_pinctrl_cfg_pin(pin_node); + if (ret) { + pr_err("%s: invalid configuration for the pin %ld\n", + __func__, pin_node.of_offset); + } + } + + return 0; +} + +static const struct udevice_id tangier_pinctrl_match[] = { + { .compatible = "intel,pinctrl-tangier", .data = X86_SYSCON_PINCONF }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(tangier_pinctrl) = { + .name = "tangier_pinctrl", + .id = UCLASS_SYSCON, + .of_match = tangier_pinctrl_match, + .probe = tangier_pinctrl_probe, + .priv_auto_alloc_size = sizeof(struct mrfld_pinctrl), +}; From f26b260c69f1d92940f82b3d6674a7b70a967dfc Mon Sep 17 00:00:00 2001 From: Georgii Staroselskii Date: Tue, 11 Sep 2018 13:31:08 +0300 Subject: [PATCH 54/56] x86: dts: edison: configure I2C#6 pins Now that we have the pinctrl driver for Merrifield in place we can make use of it and set I2C#6 pins appropriately. Initial configuration came from the firmware. Which quite likely has been used in the phones, where that is not part of Atom peripheral, is in use. Thus we need to override the leftover. Signed-off-by: Georgii Staroselskii Reviewed-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/dts/edison.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index 5c80f5c..ca8dfb4 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -90,4 +90,26 @@ compatible = "intel,reset-tangier"; u-boot,dm-pre-reloc; }; + + pinctrl { + compatible = "intel,pinctrl-tangier"; + reg = <0xff0c0000 0x8000>; + + /* + * Initial configuration came from the firmware. + * Which quite likely has been used in the phones, where I2C #8, + * that is not part of Atom peripheral, is in use. + * Thus we need to override the leftover. + */ + i2c6_scl@0 { + pad-offset = <111>; + mode-func = <1>; + protected; + }; + i2c6_sda@0 { + pad-offset = <112>; + mode-func = <1>; + protected; + }; + }; }; From f7ce2d6e65e6319e780a65244b881ec7f7f4c6c1 Mon Sep 17 00:00:00 2001 From: Georgii Staroselskii Date: Tue, 11 Sep 2018 13:31:09 +0300 Subject: [PATCH 55/56] x86: tangier: acpi: add I2C6 node Now that we have I2C#6 working, it's time to add a corresponsing ACPI binding. Signed-off-by: Georgii Staroselskii Reviewed-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/include/asm/arch-tangier/acpi/southcluster.asl | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl index 3c35089..48193ba 100644 --- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl @@ -221,6 +221,16 @@ Device (PCI0) } } + Device (I2C6) + { + Name (_ADR, 0x00090001) + + Method (_STA, 0, NotSerialized) + { + Return (STA_VISIBLE) + } + } + Device (GPIO) { Name (_ADR, 0x000c0000) From 6321da5263b513f1d6959fb721c33970405e6d1d Mon Sep 17 00:00:00 2001 From: Georgii Staroselskii Date: Tue, 11 Sep 2018 13:31:10 +0300 Subject: [PATCH 56/56] x86: cpu: add docstring to scu_ipc_command() These comments were copied from the Linux kernel driver in drivers/platform/x86/intel_scu_ipc.c Signed-off-by: Georgii Staroselskii Reviewed-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/lib/scu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c index af241ef..a6f8297 100644 --- a/arch/x86/lib/scu.c +++ b/arch/x86/lib/scu.c @@ -180,6 +180,17 @@ int scu_ipc_simple_command(u32 cmd, u32 sub) return scu_ipc_check_status(scu->regs); } +/** + * scu_ipc_command - command with data + * @cmd: command + * @sub: sub type + * @in: input data + * @inlen: input length in dwords + * @out: output data + * @outlen: output length in dwords + * + * Issue a command to the SCU which involves data transfers. + */ int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen) { struct scu *scu;