rk_pwm: use clock framework API to get module clock

This patch use clock API instead of hardcode for get pwm clock.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix printf() to debug() nit:
Signed-off-by: Simon Glass <sjg@chromium.org>

drivers/pwm/rk_pwm.c

@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <div64.h>
 #include <dm.h>
 #include <pwm.h>
@@ -13,9 +14,9 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/pwm.h>
+#include <asm/arch/hardware.h>
 #include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -23,6 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct rk_pwm_priv {
 	struct rk3288_pwm *regs;
 	struct rk3288_grf *grf;
+	ulong freq;
 };
 
 static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
@@ -38,8 +40,8 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 		RK_PWM_DISABLE,
 		&regs->ctrl);
 
-	period = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * period_ns, 1000000);
-	duty = lldiv((uint64_t)(PD_BUS_PCLK_HZ / 1000) * duty_ns, 1000000);
+	period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000);
+	duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000);
 
 	writel(period, &regs->period_hpr);
 	writel(duty, &regs->duty_lpr);
@@ -76,9 +78,18 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
 static int rk_pwm_probe(struct udevice *dev)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
+	struct clk clk;
+	int ret = 0;
 
 	rk_setreg(&priv->grf->soc_con2, 1 << 0);
 
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret < 0) {
+		debug("%s get clock fail!\n", __func__);
+		return -EINVAL;
+	}
+	priv->freq = clk_get_rate(&clk);
+
 	return 0;
 }