Add initial support for i.MX6DL BTicino Mamoj board. Mamoh board added: - SPL - SPL_DM - SPL_OF_CONTROL - DM for U-Boot proper - OF_CONTROL for U-Boot proper - eMMC - FEC - Boot from eMMC - Boot from USB SDP Signed-off-by: Simone CIANNI <simone.cianni@bticino.it> Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>lime2-spi
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0f93f55c86
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/* |
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* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include "imx6qdl-u-boot.dtsi" |
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&usdhc3 { |
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u-boot,dm-spl; |
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}; |
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&pinctrl_usdhc3 { |
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u-boot,dm-spl; |
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}; |
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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/* |
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* Copyright (C) 2018 BTicino |
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* Copyright (C) 2018 Amarula Solutions B.V. |
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*/ |
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/dts-v1/; |
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#include <dt-bindings/gpio/gpio.h> |
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#include "imx6dl.dtsi" |
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/ { |
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model = "BTicino i.MX6DL Mamoj board"; |
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compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl"; |
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}; |
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&fec { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_enet>; |
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phy-mode = "mii"; |
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status = "okay"; |
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}; |
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&uart3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart3>; |
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status = "okay"; |
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}; |
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&usdhc3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_usdhc3>; |
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bus-width = <8>; |
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non-removable; |
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keep-power-in-suspend; |
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status = "okay"; |
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}; |
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&iomuxc { |
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pinctrl_enet: enetgrp { |
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fsl,pins = < |
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1 |
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MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 |
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MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 |
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MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 |
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MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 |
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MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 |
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MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 |
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MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1 |
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MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 |
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MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 |
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MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 |
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MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 |
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MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 |
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MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 |
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MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 |
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MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 |
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>; |
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}; |
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pinctrl_uart3: uart3grp { |
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fsl,pins = < |
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 |
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>; |
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}; |
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pinctrl_usdhc3: usdhc3grp { |
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fsl,pins = < |
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
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MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 |
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MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 |
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MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 |
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MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 |
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>; |
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}; |
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}; |
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if TARGET_MX6DL_MAMOJ |
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config SYS_BOARD |
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default "mamoj" |
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config SYS_VENDOR |
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default "bticino" |
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config SYS_CONFIG_NAME |
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default "imx6dl-mamoj" |
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endif |
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MX6DL_MAMOJ BOARD |
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M: Jagan Teki <jagan@amarulasolutions.com> |
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M: Raffaele RECALCATI <raffaele.recalcati@bticino.it> |
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M: Simone CIANNI <simone.cianni@bticino.it> |
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S: Maintained |
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F: board/bticino/mamoj |
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F: include/configs/imx6dl-mamoj.h |
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F: configs/imx6dl_mamoj_defconfig |
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F: arch/arm/dts/imx6dl-mamoj.dts |
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F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi |
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# Copyright (C) 2018 BTicino
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# Copyright (C) 2017 Amarula Solutions B.V.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := mamoj.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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BTicino Mamoj board: |
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=================== |
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Build: |
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$ make mrproper |
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$ make imx6dl_mamoj_defconfig |
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$ make |
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This will generate the SPL image called SPL and the u-boot-dtb.img. |
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The following methods can be used for booting Mamoj boards: |
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1. USB SDP boot |
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1. USB SDP boot: |
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--------------- |
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- Build imx_usb_loader |
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$ git clone git://github.com/boundarydevices/imx_usb_loader.git |
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$ cd imx_usb_loader |
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$ make |
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- Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory |
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- Put the board in "Serial Download Mode" |
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- Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host |
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- Turn-on board |
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- Identify VID/PID using lsusb |
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Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode |
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- Update the conf files |
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imx_usb.conf |
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0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf |
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mx6_usb_rom.conf |
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mx6_usb |
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hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000 |
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SPL:jump header2 |
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mx6_usb_sdp_spl.conf |
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mx6_spl_sdp |
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hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000 |
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u-boot-dtb.img:jump header2 |
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- Launch the loader |
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$ ./imx_usb |
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We can see U-Boot boot from USB SDP on minicom |
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-- |
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Jagan Teki <jagan@amarulasolutions.com> |
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03/12/18 |
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/*
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* Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> |
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* Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> |
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* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/arch/sys_proto.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int board_init(void) |
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{ |
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/* Address of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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gd->ram_size = imx_ddr_size(); |
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return 0; |
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} |
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/*
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* Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> |
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* Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> |
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* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <spl.h> |
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#include <asm/io.h> |
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#include <linux/sizes.h> |
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#include <asm/arch/clock.h> |
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#include <asm/arch/crm_regs.h> |
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#include <asm/arch/iomux.h> |
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#include <asm/arch/mx6-ddr.h> |
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#include <asm/arch/mx6-pins.h> |
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#include <asm/arch/sys_proto.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define IMX6SDL_DRIVE_STRENGTH 0x28 |
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#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
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static iomux_v3_cfg_t const uart3_pads[] = { |
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IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), |
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IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), |
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}; |
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struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { |
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.dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdclk_1 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_cas = IMX6SDL_DRIVE_STRENGTH, |
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.dram_ras = IMX6SDL_DRIVE_STRENGTH, |
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.dram_reset = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdcke0 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdcke1 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdba2 = 0x00000000, |
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.dram_sdodt0 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdodt1 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs0 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs1 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs2 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs3 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs4 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs5 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs6 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_sdqs7 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm0 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm1 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm2 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm3 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm4 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm5 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm6 = IMX6SDL_DRIVE_STRENGTH, |
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.dram_dqm7 = IMX6SDL_DRIVE_STRENGTH, |
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}; |
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struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { |
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.grp_ddr_type = 0x000c0000, |
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.grp_ddrmode_ctl = 0x00020000, |
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.grp_ddrpke = 0x00000000, |
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.grp_addds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_ctlds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_ddrmode = 0x00020000, |
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.grp_b0ds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_b1ds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_b2ds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_b3ds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_b4ds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_b5ds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_b6ds = IMX6SDL_DRIVE_STRENGTH, |
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.grp_b7ds = IMX6SDL_DRIVE_STRENGTH, |
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}; |
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static struct mx6_ddr3_cfg mt41k128m16jt_125 = { |
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.mem_speed = 1600, |
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.density = 4, |
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.width = 32, |
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.banks = 8, |
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.rowaddr = 14, |
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.coladdr = 10, |
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.pagesz = 2, |
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.trcd = 1375, |
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.trcmin = 4875, |
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.trasmin = 3500, |
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.SRT = 0, |
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}; |
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static struct mx6_mmdc_calibration mx6dl_mmdc_calib = { |
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.p0_mpwldectrl0 = 0x0042004b, |
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.p0_mpwldectrl1 = 0x0038003c, |
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.p0_mpdgctrl0 = 0x42340230, |
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.p0_mpdgctrl1 = 0x0228022c, |
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.p0_mprddlctl = 0x42444646, |
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.p0_mpwrdlctl = 0x38382e2e, |
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}; |
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static struct mx6_ddr_sysinfo mem_dl = { |
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.dsize = 1, |
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.cs1_mirror = 0, |
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/* config for full 4GB range so that get_mem_size() works */ |
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.cs_density = 32, |
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.ncs = 1, |
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.bi_on = 1, |
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.rtt_nom = 1, |
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.rtt_wr = 1, |
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.ralat = 5, |
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.walat = 0, |
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.mif3_mode = 3, |
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.rst_to_cke = 0x23, |
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.sde_to_rst = 0x10, |
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.refsel = 1, |
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.refr = 7, |
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}; |
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static void spl_dram_init(void) |
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{ |
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mx6sdl_dram_iocfg(64, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs); |
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mx6_dram_cfg(&mem_dl, &mx6dl_mmdc_calib, &mt41k128m16jt_125); |
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udelay(100); |
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} |
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static void ccgr_init(void) |
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{ |
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struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; |
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writel(0x00003f3f, &ccm->CCGR0); |
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writel(0x0030fc00, &ccm->CCGR1); |
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writel(0x000fc000, &ccm->CCGR2); |
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writel(0x3f300000, &ccm->CCGR3); |
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writel(0xff00f300, &ccm->CCGR4); |
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writel(0x0f0000c3, &ccm->CCGR5); |
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writel(0x000003cc, &ccm->CCGR6); |
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} |
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void board_init_f(ulong dummy) |
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{ |
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ccgr_init(); |
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/* setup AIPS and disable watchdog */ |
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arch_cpu_init(); |
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gpr_init(); |
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/* iomux */ |
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SETUP_IOMUX_PADS(uart3_pads); |
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/* setup GP timer */ |
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timer_init(); |
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/* UART clocks enabled and gd valid - init serial console */ |
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preloader_console_init(); |
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/* DDR initialization */ |
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spl_dram_init(); |
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} |
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CONFIG_ARM=y |
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CONFIG_ARCH_MX6=y |
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CONFIG_SYS_TEXT_BASE=0x17800000 |
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CONFIG_SYS_MALLOC_F_LEN=0x2000 |
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CONFIG_TARGET_MX6DL_MAMOJ=y |
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# CONFIG_CMD_BMODE is not set |
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CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" |
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" |
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CONFIG_BOOTDELAY=3 |
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CONFIG_HUSH_PARSER=y |
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CONFIG_SYS_PROMPT="=> " |
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CONFIG_CRC32_VERIFY=y |
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CONFIG_CMD_MEMTEST=y |
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CONFIG_CMD_GPIO=y |
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CONFIG_CMD_MMC=y |
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CONFIG_CMD_MII=y |
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CONFIG_CMD_PING=y |
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CONFIG_CMD_CACHE=y |
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CONFIG_CMD_EXT2=y |
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CONFIG_CMD_EXT4=y |
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CONFIG_CMD_EXT4_WRITE=y |
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CONFIG_CMD_FAT=y |
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CONFIG_CMD_FS_GENERIC=y |
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CONFIG_CMD_USB=y |
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CONFIG_DISTRO_DEFAULTS=y |
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CONFIG_ENV_IS_IN_MMC=y |
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CONFIG_PHYLIB=y |
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CONFIG_PHY_MICREL=y |
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CONFIG_FEC_MXC=y |
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CONFIG_FSL_ESDHC=y |
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CONFIG_PINCTRL_IMX6=y |
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CONFIG_MXC_UART=y |
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CONFIG_USB=y |
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CONFIG_USB_GADGET=y |
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CONFIG_USB_GADGET_MANUFACTURER="FSL" |
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CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
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CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
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CONFIG_CI_UDC=y |
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CONFIG_IMX_THERMAL=y |
@ -0,0 +1,88 @@ |
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/*
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* Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> |
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* Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> |
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* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> |
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* |
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* Configuration settings for the BTicion i.MX6DL Mamoj board. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __IMX6DL_MAMOJ_CONFIG_H |
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#define __IMX6DL_MAMOJ_CONFIG_H |
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#include <linux/sizes.h> |
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#include "mx6_common.h" |
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/* Size of malloc() pool */ |
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#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) |
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/* Total Size of Environment Sector */ |
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#define CONFIG_ENV_SIZE SZ_128K |
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/* Allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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/* Environment */ |
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#ifndef CONFIG_ENV_IS_NOWHERE |
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/* Environment in MMC */ |
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# if defined(CONFIG_ENV_IS_IN_MMC) |
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# define CONFIG_ENV_OFFSET 0x100000 |
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# endif |
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#endif |
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#ifndef CONFIG_SPL_BUILD |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"scriptaddr=0x14000000\0" \
|
||||
"fdt_addr_r=0x13000000\0" \
|
||||
"kernel_addr_r=0x10008000\0" \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
BOOTENV |
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \ |
||||
func(MMC, mmc, 2) |
||||
|
||||
#include <config_distro_bootcmd.h> |
||||
#endif |
||||
|
||||
/* UART */ |
||||
#define CONFIG_MXC_UART_BASE UART3_BASE |
||||
|
||||
/* MMC */ |
||||
#define CONFIG_SYS_MMC_ENV_DEV 2 |
||||
#define CONFIG_SUPPORT_EMMC_BOOT |
||||
|
||||
/* Ethernet */ |
||||
#define CONFIG_FEC_MXC_PHYADDR 1 |
||||
#define CONFIG_MII |
||||
|
||||
/* USB */ |
||||
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
||||
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
||||
#define CONFIG_MXC_USB_FLAGS 0 |
||||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
||||
|
||||
/* Miscellaneous configurable options */ |
||||
#define CONFIG_SYS_MEMTEST_START 0x80000000 |
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/* Physical Memory Map */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
||||
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ |
||||
GENERATED_GBL_DATA_SIZE) |
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
||||
CONFIG_SYS_INIT_SP_OFFSET) |
||||
|
||||
/* SPL */ |
||||
#include "imx6_spl.h" |
||||
|
||||
#endif /* __IMX6DL_MAMOJ_CONFIG_H */ |
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Reference in new issue