ARM: dts: k2e: Enable OF_CONTROL and DM

Import k2e specific DT files from Linux Kernel and enable
OF_CONTROL, DM, DM_SERIAL.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
master
Lokesh Vutla 9 years ago committed by Tom Rini
parent cec6a6bf1d
commit 16d7f5b51a
  1. 3
      arch/arm/dts/Makefile
  2. 77
      arch/arm/dts/k2e-clocks.dtsi
  3. 154
      arch/arm/dts/k2e-evm.dts
  4. 206
      arch/arm/dts/k2e-netcp.dtsi
  5. 147
      arch/arm/dts/k2e.dtsi
  6. 4
      configs/k2e_evm_defconfig

@ -170,7 +170,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
vf610-colibri.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb
k2l-evm.dtb \
k2e-evm.dtb
targets += $(dtb-y)

@ -0,0 +1,77 @@
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Edison SoC specific device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
clocks {
mainpllclk: mainpllclk@2310110 {
#clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
reg-names = "control", "multiplier", "post-divider";
};
papllclk: papllclk@2620358 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkpass>;
clock-output-names = "papllclk";
reg = <0x02620358 4>;
reg-names = "control";
};
ddr3apllclk: ddr3apllclk@2620360 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkddr3a>;
clock-output-names = "ddr-3a-pll-clk";
reg = <0x02620360 4>;
reg-names = "control";
};
clkusb1: clkusb1 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
clock-output-names = "usb1";
reg = <0x02350004 0xb00>, <0x02350000 0x400>;
reg-names = "control", "domain";
domain-id = <0>;
};
clkhyperlink0: clkhyperlink0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
clock-output-names = "hyperlink-0";
reg = <0x02350030 0xb00>, <0x02350014 0x400>;
reg-names = "control", "domain";
domain-id = <5>;
};
clkpcie1: clkpcie1 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
clock-output-names = "pcie1";
reg = <0x0235006c 0xb00>, <0x02350048 0x400>;
reg-names = "control", "domain";
domain-id = <18>;
};
clkxge: clkxge {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
clock-output-names = "xge";
reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
reg-names = "control", "domain";
domain-id = <29>;
};
};

@ -0,0 +1,154 @@
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 Edison EVM device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "keystone.dtsi"
#include "k2e.dtsi"
/ {
compatible = "ti,k2e-evm","ti,keystone";
model = "Texas Instruments Keystone 2 Edison EVM";
soc {
clocks {
refclksys: refclksys {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "refclk-sys";
};
refclkpass: refclkpass {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "refclk-pass";
};
refclkddr3a: refclkddr3a {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "refclk-ddr3a";
};
};
};
};
&usb_phy {
status = "okay";
};
&usb {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb1 {
status = "okay";
};
&i2c0 {
dtt@50 {
compatible = "at,24c1024";
reg = <0x50>;
};
};
&aemif {
cs0 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;
ti,cs-chipselect = <0>;
/* all timings in nanoseconds */
ti,cs-min-turnaround-ns = <12>;
ti,cs-read-hold-ns = <6>;
ti,cs-read-strobe-ns = <23>;
ti,cs-read-setup-ns = <9>;
ti,cs-write-hold-ns = <8>;
ti,cs-write-strobe-ns = <23>;
ti,cs-write-setup-ns = <8>;
nand@0,0 {
compatible = "ti,keystone-nand","ti,davinci-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0 0x4000000
1 0 0x0000100>;
ti,davinci-chipselect = <0>;
ti,davinci-mask-ale = <0x2000>;
ti,davinci-mask-cle = <0x4000>;
ti,davinci-mask-chipsel = <0>;
nand-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
nand-on-flash-bbt;
partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "params";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "ubifs";
reg = <0x180000 0x1FE80000>;
};
};
};
};
&spi0 {
nor_flash: n25q128a11@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "Micron,n25q128a11";
spi-max-frequency = <54000000>;
m25p,fast-read;
reg = <0>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x80000>;
read-only;
};
partition@1 {
label = "misc";
reg = <0x80000 0xf80000>;
};
};
};
&mdio {
status = "ok";
ethphy0: ethernet-phy@0 {
compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
ethphy1: ethernet-phy@1 {
compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

@ -0,0 +1,206 @@
/*
* Device Tree Source for Keystone 2 Edison Netcp driver
*
* Copyright 2015 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
qmss: qmss@2a40000 {
compatible = "ti,keystone-navigator-qmss";
dma-coherent;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&chipclk13>;
ranges;
queue-range = <0 0x2000>;
linkram0 = <0x100000 0x4000>;
linkram1 = <0 0x10000>;
qmgrs {
#address-cells = <1>;
#size-cells = <1>;
ranges;
qmgr0 {
managed-queues = <0 0x2000>;
reg = <0x2a40000 0x20000>,
<0x2a06000 0x400>,
<0x2a02000 0x1000>,
<0x2a03000 0x1000>,
<0x23a80000 0x20000>,
<0x2a80000 0x20000>;
reg-names = "peek", "status", "config",
"region", "push", "pop";
};
};
queue-pools {
qpend {
qpend-0 {
qrange = <658 8>;
interrupts =<0 40 0xf04 0 41 0xf04 0 42 0xf04
0 43 0xf04 0 44 0xf04 0 45 0xf04
0 46 0xf04 0 47 0xf04>;
};
qpend-1 {
qrange = <528 16>;
interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04
0 51 0xf04 0 52 0xf04 0 53 0xf04
0 54 0xf04 0 55 0xf04 0 56 0xf04
0 57 0xf04 0 58 0xf04 0 59 0xf04
0 60 0xf04 0 61 0xf04 0 62 0xf04
0 63 0xf04>;
qalloc-by-id;
};
qpend-2 {
qrange = <544 16>;
interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04
0 59 0xf04 0 68 0xf04 0 69 0xf04
0 70 0xf04 0 71 0xf04 0 72 0xf04
0 73 0xf04 0 74 0xf04 0 75 0xf04
0 76 0xf04 0 77 0xf04 0 78 0xf04
0 79 0xf04>;
};
};
general-purpose {
gp-0 {
qrange = <4000 64>;
};
netcp-tx {
qrange = <896 128>;
qalloc-by-id;
};
};
};
descriptor-regions {
#address-cells = <1>;
#size-cells = <1>;
ranges;
region-12 {
id = <12>;
region-spec = <8192 128>; /* num_desc desc_size */
link-index = <0x4000>;
};
};
}; /* qmss */
knav_dmas: knav_dmas@0 {
compatible = "ti,keystone-navigator-dma";
clocks = <&papllclk>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,navigator-cloud-address = <0x23a80000 0x23a90000
0x23a80000 0x23a90000>;
dma_gbe: dma_gbe@0 {
reg = <0x24186000 0x100>,
<0x24187000 0x2a0>,
<0x24188000 0xb60>,
<0x24186100 0x80>,
<0x24189000 0x1000>;
reg-names = "global", "txchan", "rxchan",
"txsched", "rxflow";
};
};
netcp: netcp@24000000 {
reg = <0x2620110 0x8>;
reg-names = "efuse";
compatible = "ti,netcp-1.0";
#address-cells = <1>;
#size-cells = <1>;
/* NetCP address range */
ranges = <0 0x24000000 0x1000000>;
clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
dma-coherent;
ti,navigator-dmas = <&dma_gbe 0>,
<&dma_gbe 8>,
<&dma_gbe 0>;
ti,navigator-dma-names = "netrx0", "netrx1", "nettx";
netcp-devices {
#address-cells = <1>;
#size-cells = <1>;
ranges;
gbe@200000 { /* ETHSS */
label = "netcp-gbe";
compatible = "ti,netcp-gbe-9";
reg = <0x200000 0x900>, <0x220000 0x20000>;
/* enable-ale; */
tx-queue = <896>;
tx-channel = "nettx";
interfaces {
gbe0: interface-0 {
slave-port = <0>;
link-interface = <1>;
phy-handle = <&ethphy0>;
};
gbe1: interface-1 {
slave-port = <1>;
link-interface = <1>;
phy-handle = <&ethphy1>;
};
};
secondary-slave-ports {
port-2 {
slave-port = <2>;
link-interface = <2>;
};
port-3 {
slave-port = <3>;
link-interface = <2>;
};
port-4 {
slave-port = <4>;
link-interface = <2>;
};
port-5 {
slave-port = <5>;
link-interface = <2>;
};
port-6 {
slave-port = <6>;
link-interface = <2>;
};
port-7 {
slave-port = <7>;
link-interface = <2>;
};
};
};
};
netcp-interfaces {
interface-0 {
rx-channel = "netrx0";
rx-pool = <1024 12>;
tx-pool = <1024 12>;
rx-queue-depth = <128 128 0 0>;
rx-buffer-size = <1518 4096 0 0>;
rx-queue = <528>;
tx-completion-queue = <530>;
efuse-mac = <1>;
netcp-gbe = <&gbe0>;
};
interface-1 {
rx-channel = "netrx1";
rx-pool = <1024 12>;
tx-pool = <1024 12>;
rx-queue-depth = <128 128 0 0>;
rx-buffer-size = <1518 4096 0 0>;
rx-queue = <529>;
tx-completion-queue = <531>;
efuse-mac = <0>;
local-mac-address = [02 18 31 7e 3e 00];
netcp-gbe = <&gbe1>;
};
};
};

@ -0,0 +1,147 @@
/*
* Copyright 2013-2014 Texas Instruments, Inc.
*
* Keystone 2 Edison soc device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&gic>;
cpu@0 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <0>;
};
cpu@1 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <1>;
};
cpu@2 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <2>;
};
cpu@3 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <3>;
};
};
soc {
/include/ "k2e-clocks.dtsi"
usb: usb@2680000 {
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
dwc3@2690000 {
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
};
};
usb1_phy: usb_phy@2620750 {
compatible = "ti,keystone-usbphy";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2620750 24>;
status = "disabled";
};
usb1: usb@25000000 {
compatible = "ti,keystone-dwc3";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x25000000 0x10000>;
clocks = <&clkusb1>;
clock-names = "usb";
interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
ranges;
dma-coherent;
dma-ranges;
status = "disabled";
dwc3@25010000 {
compatible = "synopsys,dwc3";
reg = <0x25010000 0x70000>;
interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
usb-phy = <&usb1_phy>, <&usb1_phy>;
};
};
dspgpio0: keystone_dsp_gpio@02620240 {
compatible = "ti,keystone-dsp-gpio";
gpio-controller;
#gpio-cells = <2>;
gpio,syscon-dev = <&devctrl 0x240>;
};
pcie1: pcie@21020000 {
compatible = "ti,keystone-pcie","snps,dw-pcie";
clocks = <&clkpcie1>;
clock-names = "pcie";
#address-cells = <3>;
#size-cells = <2>;
reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
ranges = <0x81000000 0 0 0x23260000 0x4000 0x4000
0x82000000 0 0x60000000 0x60000000 0 0x10000000>;
status = "disabled";
device_type = "pci";
num-lanes = <2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
<0 0 0 2 &pcie_intc1 1>, /* INT B */
<0 0 0 3 &pcie_intc1 2>, /* INT C */
<0 0 0 4 &pcie_intc1 3>; /* INT D */
pcie_msi_intc1: msi-interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 384 IRQ_TYPE_EDGE_RISING>;
};
pcie_intc1: legacy-interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 374 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
};
};
mdio: mdio@24200f00 {
compatible = "ti,keystone_mdio", "ti,davinci_mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x24200f00 0x100>;
status = "disabled";
clocks = <&clkcpgmac>;
clock-names = "fck";
bus_freq = <2500000>;
};
/include/ "k2e-netcp.dtsi"
};
};

@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TARGET_K2E_EVM=y
CONFIG_DM_SERIAL=y
CONFIG_DEFAULT_DEVICE_TREE="k2e-evm"
CONFIG_SPL=y
CONFIG_SYS_PROMPT="K2E EVM # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y

Loading…
Cancel
Save