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@ -9,14 +9,11 @@ |
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#include <common.h> |
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#include <netdev.h> |
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#include <asm/cache.h> |
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#include <u-boot/md5.h> |
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#include <asm/io.h> |
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#include <asm/arch/cpu.h> |
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#include <asm/arch/soc.h> |
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#include <mvebu_mmc.h> |
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#define BUFLEN 16 |
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void reset_cpu(unsigned long ignored) |
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{ |
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struct kwcpu_registers *cpureg = |
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@ -30,31 +27,6 @@ void reset_cpu(unsigned long ignored) |
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} |
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/*
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* Generates Ramdom hex number reading some time varient system registers |
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* and using md5 algorithm |
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*/ |
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unsigned char get_random_hex(void) |
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{ |
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int i; |
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u32 inbuf[BUFLEN]; |
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u8 outbuf[BUFLEN]; |
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/*
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* in case of 88F6281/88F6282/88F6192 A0, |
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* Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470 |
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* Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are |
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* reserved regs and does not have names at this moment |
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* (no errata available) |
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*/ |
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writel(readl(KW_REG_UNDOC_0x1478) & ~(1 << 7), KW_REG_UNDOC_0x1478); |
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for (i = 0; i < BUFLEN; i++) { |
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inbuf[i] = readl(KW_REG_UNDOC_0x1470); |
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} |
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md5((u8 *) inbuf, (BUFLEN * sizeof(u32)), outbuf); |
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return outbuf[outbuf[7] % 0x0f]; |
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} |
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/*
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* Window Size |
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* Used with the Base register to set the address window size and location. |
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* Must be programmed from LSB to MSB as sequence of ones followed by |
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@ -140,33 +112,6 @@ int kw_config_adr_windows(void) |
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} |
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/*
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* kw_config_mpp - Multi-Purpose Pins Functionality configuration |
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* |
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* Each MPP can be configured to different functionality through |
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* MPP control register, ref (sec 6.1 of kirkwood h/w specification) |
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* |
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* There are maximum 64 Multi-Pourpose Pins on Kirkwood |
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* Each MPP functionality can be configuration by a 4bit value |
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* of MPP control reg, the value and associated functionality depends |
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* upon used SoC varient |
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*/ |
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int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31, |
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u32 mpp32_39, u32 mpp40_47, u32 mpp48_55) |
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{ |
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u32 *mppreg = (u32 *) KW_MPP_BASE; |
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/* program mpp registers */ |
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writel(mpp0_7, &mppreg[0]); |
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writel(mpp8_15, &mppreg[1]); |
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writel(mpp16_23, &mppreg[2]); |
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writel(mpp24_31, &mppreg[3]); |
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writel(mpp32_39, &mppreg[4]); |
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writel(mpp40_47, &mppreg[5]); |
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writel(mpp48_55, &mppreg[6]); |
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return 0; |
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} |
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/*
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* SYSRSTn Duration Counter Support |
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* |
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* Kirkwood SoC implements a hardware-based SYSRSTn duration counter. |
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