Wolfgang Denk
16 years ago
commit
189eec7779
@ -0,0 +1,51 @@ |
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#
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# (C) Copyright 2009
|
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# Marvell Semiconductor <www.marvell.com>
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# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
|
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#
|
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# See file CREDITS for list of people who contributed to this
|
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# project.
|
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#
|
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
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# MA 02110-1301 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS := mv88f6281gtw_ge.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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|
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#########################################################################
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|
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,25 @@ |
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#
|
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# (C) Copyright 2009
|
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# Marvell Semiconductor <www.marvell.com>
|
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# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
|
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#
|
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# See file CREDITS for list of people who contributed to this
|
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# project.
|
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#
|
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# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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# MA 02110-1301 USA
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#
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TEXT_BASE = 0x00600000
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@ -0,0 +1,141 @@ |
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/*
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* Maintainer : Prafulla Wadaskar <prafulla@marvell.com> |
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* |
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* (C) Copyright 2009 |
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* Marvell Semiconductor <www.marvell.com> |
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
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* MA 02110-1301 USA |
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*/ |
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#include <common.h> |
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#include <netdev.h> |
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#include <asm/arch/kirkwood.h> |
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#include <asm/arch/mpp.h> |
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#include "mv88f6281gtw_ge.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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int board_init(void) |
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{ |
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/*
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* default gpio configuration |
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* There are maximum 64 gpios controlled through 2 sets of registers |
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* the below configuration configures mainly initial LED status |
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*/ |
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kw_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW, |
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MV88F6281GTW_GE_OE_VAL_HIGH, |
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MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH); |
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|
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/* Multi-Purpose Pins Functionality configuration */ |
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u32 kwmpp_config[] = { |
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MPP0_SPI_SCn, |
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MPP1_SPI_MOSI, |
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MPP2_SPI_SCK, |
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MPP3_SPI_MISO, |
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MPP4_GPIO, |
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MPP5_GPO, |
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MPP6_SYSRST_OUTn, |
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MPP7_SPI_SCn, |
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MPP8_TW_SDA, |
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MPP9_TW_SCK, |
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MPP10_UART0_TXD, |
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MPP11_UART0_RXD, |
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MPP12_GPO, |
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MPP13_GPIO, |
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MPP14_GPIO, |
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MPP15_GPIO, |
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MPP16_GPIO, |
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MPP17_GPIO, |
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MPP18_GPO, |
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MPP19_GPO, |
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MPP20_GPIO, |
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MPP21_GPIO, |
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MPP22_GPIO, |
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MPP23_GPIO, |
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MPP24_GPIO, |
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MPP25_GPIO, |
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MPP26_GPIO, |
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MPP27_GPIO, |
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MPP28_GPIO, |
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MPP29_GPIO, |
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MPP30_GPIO, |
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MPP31_GPIO, |
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MPP32_GPIO, |
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MPP33_GPIO, |
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MPP34_GPIO, |
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MPP35_GPIO, |
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MPP36_GPIO, |
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MPP37_GPIO, |
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MPP38_GPIO, |
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MPP39_GPIO, |
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MPP40_GPIO, |
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MPP41_GPIO, |
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MPP42_GPIO, |
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MPP43_GPIO, |
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MPP44_GPIO, |
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MPP45_GPIO, |
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MPP46_GPIO, |
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MPP47_GPIO, |
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MPP48_GPIO, |
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MPP49_GPIO, |
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0 |
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}; |
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kirkwood_mpp_conf(kwmpp_config); |
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/*
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* arch number of board |
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*/ |
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gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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int i; |
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { |
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gd->bd->bi_dram[i].start = kw_sdram_bar(i); |
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gd->bd->bi_dram[i].size = kw_sdram_bs(i); |
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} |
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return 0; |
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} |
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|
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#ifdef CONFIG_MV88E61XX_SWITCH |
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void reset_phy(void) |
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{ |
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/* configure and initialize switch */ |
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struct mv88e61xx_config swcfg = { |
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.name = "egiga0", |
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.vlancfg = MV88E61XX_VLANCFG_ROUTER, |
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.rgmii_delay = MV88E61XX_RGMII_DELAY_EN, |
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.led_init = MV88E61XX_LED_INIT_EN, |
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.mdip = MV88E61XX_MDIP_REVERSE, |
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.portstate = MV88E61XX_PORTSTT_FORWARDING, |
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.cpuport = (1 << 5), |
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.ports_enabled = 0x3f |
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}; |
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mv88e61xx_switch_initialize(&swcfg); |
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} |
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#endif /* CONFIG_MV88E61XX_SWITCH */ |
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@ -0,0 +1,36 @@ |
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/*
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* (C) Copyright 2009 |
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* Marvell Semiconductor <www.marvell.com> |
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
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* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
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* MA 02110-1301 USA |
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*/ |
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#ifndef __MV88F6281GTW_GE_H |
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#define __MV88F6281GTW_GE_H |
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#define MV88F6281GTW_GE_OE_LOW (~((1 << 7) | (1 << 12) \ |
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|(1 << 20) | (1 << 21))) /*enable GLED,RLED */ |
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#define MV88F6281GTW_GE_OE_HIGH (~((1 << 4)|(1 << 6)|(1 << 7)|(1 << 12) \ |
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|(1 << 13)|(1 << 16)|(1 << 17))) |
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#define MV88F6281GTW_GE_OE_VAL_LOW (1 << 20) /*make GLED on */ |
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#define MV88F6281GTW_GE_OE_VAL_HIGH ((1 << 6)|(1 << 13)|(1 << 16)|(1 << 17)) |
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#endif /* __MV88F6281GTW_GE_H */ |
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@ -0,0 +1,51 @@ |
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#
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# (C) Copyright 2009
|
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# Marvell Semiconductor <www.marvell.com>
|
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# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
|
||||
#
|
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# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
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# MA 02110-1301 USA
|
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#
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|
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS := rd6281a.o
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|
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
|
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SOBJS := $(addprefix $(obj),$(SOBJS))
|
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|
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
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|
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clean: |
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rm -f $(SOBJS) $(OBJS)
|
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|
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
|
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|
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#########################################################################
|
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|
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# defines $(obj).depend target
|
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include $(SRCTREE)/rules.mk |
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|
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sinclude $(obj).depend |
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|
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#########################################################################
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@ -0,0 +1,25 @@ |
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#
|
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# (C) Copyright 2009
|
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# Marvell Semiconductor <www.marvell.com>
|
||||
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
# MA 02110-1301 USA
|
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#
|
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|
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TEXT_BASE = 0x00600000
|
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@ -0,0 +1,179 @@ |
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/*
|
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* (C) Copyright 2009 |
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* Marvell Semiconductor <www.marvell.com> |
||||
* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
||||
* MA 02110-1301 USA |
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*/ |
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|
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#include <common.h> |
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#include <miiphy.h> |
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#include <netdev.h> |
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#include <asm/arch/kirkwood.h> |
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#include <asm/arch/mpp.h> |
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#include "rd6281a.h" |
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|
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DECLARE_GLOBAL_DATA_PTR; |
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|
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int board_init(void) |
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{ |
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/*
|
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* default gpio configuration |
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* There are maximum 64 gpios controlled through 2 sets of registers |
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* the below configuration configures mainly initial LED status |
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*/ |
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kw_config_gpio(RD6281A_OE_VAL_LOW, |
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RD6281A_OE_VAL_HIGH, |
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RD6281A_OE_LOW, RD6281A_OE_HIGH); |
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|
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/* Multi-Purpose Pins Functionality configuration */ |
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u32 kwmpp_config[] = { |
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MPP0_NF_IO2, |
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MPP1_NF_IO3, |
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MPP2_NF_IO4, |
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MPP3_NF_IO5, |
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MPP4_NF_IO6, |
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MPP5_NF_IO7, |
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MPP6_SYSRST_OUTn, |
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MPP7_GPO, |
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MPP8_TW_SDA, |
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MPP9_TW_SCK, |
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MPP10_UART0_TXD, |
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MPP11_UART0_RXD, |
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MPP12_SD_CLK, |
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MPP13_SD_CMD, |
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MPP14_SD_D0, |
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MPP15_SD_D1, |
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MPP16_SD_D2, |
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MPP17_SD_D3, |
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MPP18_NF_IO0, |
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MPP19_NF_IO1, |
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MPP20_GE1_0, |
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MPP21_GE1_1, |
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MPP22_GE1_2, |
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MPP23_GE1_3, |
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MPP24_GE1_4, |
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MPP25_GE1_5, |
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MPP26_GE1_6, |
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MPP27_GE1_7, |
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MPP28_GPIO, |
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MPP29_GPIO, |
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MPP30_GE1_10, |
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MPP31_GE1_11, |
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MPP32_GE1_12, |
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MPP33_GE1_13, |
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MPP34_GE1_14, |
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MPP35_GPIO, |
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MPP36_AUDIO_SPDIFI, |
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MPP37_AUDIO_SPDIFO, |
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MPP38_GPIO, |
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MPP39_TDM_SPI_CS0, |
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MPP40_TDM_SPI_SCK, |
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MPP41_TDM_SPI_MISO, |
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MPP42_TDM_SPI_MOSI, |
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MPP43_TDM_CODEC_INTn, |
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MPP44_GPIO, |
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MPP45_TDM_PCLK, |
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MPP46_TDM_FS, |
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MPP47_TDM_DRX, |
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MPP48_TDM_DTX, |
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MPP49_GPIO, |
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0 |
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}; |
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kirkwood_mpp_conf(kwmpp_config); |
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|
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/*
|
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* arch number of board |
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*/ |
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gd->bd->bi_arch_number = MACH_TYPE_RD88F6281; |
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|
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; |
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|
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return 0; |
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} |
||||
|
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int dram_init(void) |
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{ |
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int i; |
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|
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { |
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gd->bd->bi_dram[i].start = kw_sdram_bar(i); |
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gd->bd->bi_dram[i].size = kw_sdram_bs(i); |
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} |
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return 0; |
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} |
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|
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void mv_phy_88e1116_init(char *name) |
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{ |
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u16 reg; |
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u16 devadr; |
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|
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if (miiphy_set_current_dev(name)) |
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return; |
||||
|
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/* command to read PHY dev address */ |
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if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { |
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printf("Err..%s could not read PHY dev address\n", |
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__FUNCTION__); |
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return; |
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} |
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|
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/*
|
||||
* Enable RGMII delay on Tx and Rx for CPU port |
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* Ref: sec 4.7.2 of chip datasheet |
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*/ |
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); |
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miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); |
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reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); |
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miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); |
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miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); |
||||
|
||||
/* reset the phy */ |
||||
if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) { |
||||
printf("Err..(%s) PHY status read failed\n", __FUNCTION__); |
||||
return; |
||||
} |
||||
if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) { |
||||
printf("Err..(%s) PHY reset failed\n", __FUNCTION__); |
||||
return; |
||||
} |
||||
|
||||
printf("88E1116 Initialized on %s\n", name); |
||||
} |
||||
|
||||
/* Configure and enable Switch and PHY */ |
||||
void reset_phy(void) |
||||
{ |
||||
/* configure and initialize switch */ |
||||
struct mv88e61xx_config swcfg = { |
||||
.name = "egiga0", |
||||
.vlancfg = MV88E61XX_VLANCFG_ROUTER, |
||||
.rgmii_delay = MV88E61XX_RGMII_DELAY_EN, |
||||
.led_init = MV88E61XX_LED_INIT_EN, |
||||
.portstate = MV88E61XX_PORTSTT_FORWARDING, |
||||
.cpuport = (1 << 5), |
||||
.ports_enabled = 0x3f, |
||||
}; |
||||
|
||||
mv88e61xx_switch_initialize(&swcfg); |
||||
|
||||
/* configure and initialize PHY */ |
||||
mv_phy_88e1116_init("egiga1"); |
||||
} |
||||
@ -0,0 +1,41 @@ |
||||
/*
|
||||
* (C) Copyright 2009 |
||||
* Marvell Semiconductor <www.marvell.com> |
||||
* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
||||
* MA 02110-1301 USA |
||||
*/ |
||||
|
||||
#ifndef __RD6281A_H |
||||
#define __RD6281A_H |
||||
|
||||
#define RD6281A_OE_LOW (~(1 << 7)) |
||||
#define RD6281A_OE_HIGH (~(1 << 2 | 1 << 12)) |
||||
#define RD6281A_OE_VAL_LOW (0) |
||||
#define RD6281A_OE_VAL_HIGH (1 << 12) |
||||
|
||||
/* PHY related */ |
||||
#define MV88E1116_LED_FCTRL_REG 10 |
||||
#define MV88E1116_CPRSP_CR3_REG 21 |
||||
#define MV88E1116_MAC_CTRL_REG 21 |
||||
#define MV88E1116_PGADR_REG 22 |
||||
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) |
||||
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) |
||||
|
||||
#endif /* __RD6281A_H */ |
||||
@ -0,0 +1,51 @@ |
||||
#
|
||||
# (C) Copyright 2009
|
||||
# Marvell Semiconductor <www.marvell.com>
|
||||
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
# MA 02110-1301 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS := sheevaplug.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
||||
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,25 @@ |
||||
#
|
||||
# (C) Copyright 2009
|
||||
# Marvell Semiconductor <www.marvell.com>
|
||||
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
# MA 02110-1301 USA
|
||||
#
|
||||
|
||||
TEXT_BASE = 0x00600000
|
||||
@ -0,0 +1,155 @@ |
||||
/*
|
||||
* (C) Copyright 2009 |
||||
* Marvell Semiconductor <www.marvell.com> |
||||
* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
||||
* MA 02110-1301 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <miiphy.h> |
||||
#include <asm/arch/kirkwood.h> |
||||
#include <asm/arch/mpp.h> |
||||
#include "sheevaplug.h" |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
int board_init(void) |
||||
{ |
||||
/*
|
||||
* default gpio configuration |
||||
* There are maximum 64 gpios controlled through 2 sets of registers |
||||
* the below configuration configures mainly initial LED status |
||||
*/ |
||||
kw_config_gpio(SHEEVAPLUG_OE_VAL_LOW, |
||||
SHEEVAPLUG_OE_VAL_HIGH, |
||||
SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH); |
||||
|
||||
/* Multi-Purpose Pins Functionality configuration */ |
||||
u32 kwmpp_config[] = { |
||||
MPP0_NF_IO2, |
||||
MPP1_NF_IO3, |
||||
MPP2_NF_IO4, |
||||
MPP3_NF_IO5, |
||||
MPP4_NF_IO6, |
||||
MPP5_NF_IO7, |
||||
MPP6_SYSRST_OUTn, |
||||
MPP7_GPO, |
||||
MPP8_UART0_RTS, |
||||
MPP9_UART0_CTS, |
||||
MPP10_UART0_TXD, |
||||
MPP11_UART0_RXD, |
||||
MPP12_SD_CLK, |
||||
MPP13_SD_CMD, |
||||
MPP14_SD_D0, |
||||
MPP15_SD_D1, |
||||
MPP16_SD_D2, |
||||
MPP17_SD_D3, |
||||
MPP18_NF_IO0, |
||||
MPP19_NF_IO1, |
||||
MPP20_GPIO, |
||||
MPP21_GPIO, |
||||
MPP22_GPIO, |
||||
MPP23_GPIO, |
||||
MPP24_GPIO, |
||||
MPP25_GPIO, |
||||
MPP26_GPIO, |
||||
MPP27_GPIO, |
||||
MPP28_GPIO, |
||||
MPP29_TSMP9, |
||||
MPP30_GPIO, |
||||
MPP31_GPIO, |
||||
MPP32_GPIO, |
||||
MPP33_GPIO, |
||||
MPP34_GPIO, |
||||
MPP35_GPIO, |
||||
MPP36_GPIO, |
||||
MPP37_GPIO, |
||||
MPP38_GPIO, |
||||
MPP39_GPIO, |
||||
MPP40_GPIO, |
||||
MPP41_GPIO, |
||||
MPP42_GPIO, |
||||
MPP43_GPIO, |
||||
MPP44_GPIO, |
||||
MPP45_GPIO, |
||||
MPP46_GPIO, |
||||
MPP47_GPIO, |
||||
MPP48_GPIO, |
||||
MPP49_GPIO, |
||||
0 |
||||
}; |
||||
kirkwood_mpp_conf(kwmpp_config); |
||||
|
||||
/*
|
||||
* arch number of board |
||||
*/ |
||||
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG; |
||||
|
||||
/* adress of boot parameters */ |
||||
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int dram_init(void) |
||||
{ |
||||
int i; |
||||
|
||||
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { |
||||
gd->bd->bi_dram[i].start = kw_sdram_bar(i); |
||||
gd->bd->bi_dram[i].size = kw_sdram_bs(i); |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
#ifdef CONFIG_RESET_PHY_R |
||||
/* Configure and enable MV88E1116 PHY */ |
||||
void reset_phy(void) |
||||
{ |
||||
u16 reg; |
||||
u16 devadr; |
||||
char *name = "egiga0"; |
||||
|
||||
if (miiphy_set_current_dev(name)) |
||||
return; |
||||
|
||||
/* command to read PHY dev address */ |
||||
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { |
||||
printf("Err..%s could not read PHY dev address\n", |
||||
__FUNCTION__); |
||||
return; |
||||
} |
||||
|
||||
/*
|
||||
* Enable RGMII delay on Tx and Rx for CPU port |
||||
* Ref: sec 4.7.2 of chip datasheet |
||||
*/ |
||||
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); |
||||
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); |
||||
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); |
||||
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); |
||||
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); |
||||
|
||||
/* reset the phy */ |
||||
miiphy_reset(name, devadr); |
||||
|
||||
printf("88E1116 Initialized on %s\n", name); |
||||
} |
||||
#endif /* CONFIG_RESET_PHY_R */ |
||||
@ -0,0 +1,41 @@ |
||||
/*
|
||||
* (C) Copyright 2009 |
||||
* Marvell Semiconductor <www.marvell.com> |
||||
* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
||||
* MA 02110-1301 USA |
||||
*/ |
||||
|
||||
#ifndef __SHEEVAPLUG_H |
||||
#define __SHEEVAPLUG_H |
||||
|
||||
#define SHEEVAPLUG_OE_LOW (~(0)) |
||||
#define SHEEVAPLUG_OE_HIGH (~(0)) |
||||
#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ |
||||
#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */ |
||||
|
||||
/* PHY related */ |
||||
#define MV88E1116_LED_FCTRL_REG 10 |
||||
#define MV88E1116_CPRSP_CR3_REG 21 |
||||
#define MV88E1116_MAC_CTRL_REG 21 |
||||
#define MV88E1116_PGADR_REG 22 |
||||
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) |
||||
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) |
||||
|
||||
#endif /* __SHEEVAPLUG_H */ |
||||
@ -0,0 +1,36 @@ |
||||
/* |
||||
* Copyright (c) 2009 Samsung Electronics. |
||||
* Minkyu Kang <mk7.kang@samsung.com>
|
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <config.h> |
||||
|
||||
.global reset_cpu
|
||||
reset_cpu: |
||||
ldr r1, rstctl @ get addr for global reset
|
||||
@ reg
|
||||
mov r3, #0x2 @ full reset pll + mpu
|
||||
str r3, [r1] @ force reset
|
||||
mov r0, r0 |
||||
_loop_forever: |
||||
b _loop_forever |
||||
rstctl: |
||||
.word PRM_RSTCTRL
|
||||
@ -0,0 +1,151 @@ |
||||
/*
|
||||
* arch/arm/plat-orion/gpio.c |
||||
* |
||||
* Marvell Orion SoC GPIO handling. |
||||
* |
||||
* This file is licensed under the terms of the GNU General Public |
||||
* License version 2. This program is licensed "as is" without any |
||||
* warranty of any kind, whether express or implied. |
||||
*/ |
||||
|
||||
/*
|
||||
* Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver. |
||||
* Removed orion_gpiochip struct and kernel level irq handling. |
||||
* |
||||
* Dieter Kiermaier dk-arm-linux@gmx.de |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/bitops.h> |
||||
#include <asm/arch/kirkwood.h> |
||||
#include <asm/arch/gpio.h> |
||||
|
||||
static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)]; |
||||
static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)]; |
||||
|
||||
void __set_direction(unsigned pin, int input) |
||||
{ |
||||
u32 u; |
||||
|
||||
u = readl(GPIO_IO_CONF(pin)); |
||||
if (input) |
||||
u |= 1 << (pin & 31); |
||||
else |
||||
u &= ~(1 << (pin & 31)); |
||||
writel(u, GPIO_IO_CONF(pin)); |
||||
|
||||
u = readl(GPIO_IO_CONF(pin)); |
||||
} |
||||
|
||||
void __set_level(unsigned pin, int high) |
||||
{ |
||||
u32 u; |
||||
|
||||
u = readl(GPIO_OUT(pin)); |
||||
if (high) |
||||
u |= 1 << (pin & 31); |
||||
else |
||||
u &= ~(1 << (pin & 31)); |
||||
writel(u, GPIO_OUT(pin)); |
||||
} |
||||
|
||||
void __set_blinking(unsigned pin, int blink) |
||||
{ |
||||
u32 u; |
||||
|
||||
u = readl(GPIO_BLINK_EN(pin)); |
||||
if (blink) |
||||
u |= 1 << (pin & 31); |
||||
else |
||||
u &= ~(1 << (pin & 31)); |
||||
writel(u, GPIO_BLINK_EN(pin)); |
||||
} |
||||
|
||||
int kw_gpio_is_valid(unsigned pin, int mode) |
||||
{ |
||||
if (pin < GPIO_MAX) { |
||||
if ((mode & GPIO_INPUT_OK) && !test_bit(pin, gpio_valid_input)) |
||||
goto err_out; |
||||
|
||||
if ((mode & GPIO_OUTPUT_OK) && !test_bit(pin, gpio_valid_output)) |
||||
goto err_out; |
||||
return 0; |
||||
} |
||||
|
||||
err_out: |
||||
printf("%s: invalid GPIO %d\n", __func__, pin); |
||||
return 1; |
||||
} |
||||
|
||||
void kw_gpio_set_valid(unsigned pin, int mode) |
||||
{ |
||||
if (mode == 1) |
||||
mode = GPIO_INPUT_OK | GPIO_OUTPUT_OK; |
||||
if (mode & GPIO_INPUT_OK) |
||||
__set_bit(pin, gpio_valid_input); |
||||
else |
||||
__clear_bit(pin, gpio_valid_input); |
||||
if (mode & GPIO_OUTPUT_OK) |
||||
__set_bit(pin, gpio_valid_output); |
||||
else |
||||
__clear_bit(pin, gpio_valid_output); |
||||
} |
||||
/*
|
||||
* GENERIC_GPIO primitives. |
||||
*/ |
||||
int kw_gpio_direction_input(unsigned pin) |
||||
{ |
||||
if (!kw_gpio_is_valid(pin, GPIO_INPUT_OK)) |
||||
return 1; |
||||
|
||||
/* Configure GPIO direction. */ |
||||
__set_direction(pin, 1); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int kw_gpio_direction_output(unsigned pin, int value) |
||||
{ |
||||
if (kw_gpio_is_valid(pin, GPIO_OUTPUT_OK) != 0) |
||||
{ |
||||
printf("%s: invalid GPIO %d\n", __func__, pin); |
||||
return 1; |
||||
} |
||||
|
||||
__set_blinking(pin, 0); |
||||
|
||||
/* Configure GPIO output value. */ |
||||
__set_level(pin, value); |
||||
|
||||
/* Configure GPIO direction. */ |
||||
__set_direction(pin, 0); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int kw_gpio_get_value(unsigned pin) |
||||
{ |
||||
int val; |
||||
|
||||
if (readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31))) |
||||
val = readl(GPIO_DATA_IN(pin)) ^ readl(GPIO_IN_POL(pin)); |
||||
else |
||||
val = readl(GPIO_OUT(pin)); |
||||
|
||||
return (val >> (pin & 31)) & 1; |
||||
} |
||||
|
||||
void kw_gpio_set_value(unsigned pin, int value) |
||||
{ |
||||
/* Configure GPIO output value. */ |
||||
__set_level(pin, value); |
||||
} |
||||
|
||||
void kw_gpio_set_blink(unsigned pin, int blink) |
||||
{ |
||||
/* Set output value to zero. */ |
||||
__set_level(pin, 0); |
||||
|
||||
/* Set blinking. */ |
||||
__set_blinking(pin, blink); |
||||
} |
||||
@ -0,0 +1,53 @@ |
||||
/*
|
||||
* arch/asm-arm/mach-kirkwood/include/mach/gpio.h |
||||
* |
||||
* This file is licensed under the terms of the GNU General Public |
||||
* License version 2. This program is licensed "as is" without any |
||||
* warranty of any kind, whether express or implied. |
||||
*/ |
||||
|
||||
/*
|
||||
* Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver. |
||||
* Removed kernel level irq handling. Took some macros from kernel to |
||||
* allow build. |
||||
* |
||||
* Dieter Kiermaier dk-arm-linux@gmx.de |
||||
*/ |
||||
|
||||
#ifndef __KIRKWOOD_GPIO_H |
||||
#define __KIRKWOOD_GPIO_H |
||||
|
||||
/* got from kernel include/linux/kernel.h */ |
||||
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) |
||||
/* got from kernel include/linux/bitops.h */ |
||||
#define BITS_PER_BYTE 8 |
||||
#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) |
||||
|
||||
#define GPIO_MAX 50 |
||||
#define GPIO_OFF(pin) (((pin) >> 5) ? 0x0040 : 0x0000) |
||||
#define GPIO_OUT(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x00) |
||||
#define GPIO_IO_CONF(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x04) |
||||
#define GPIO_BLINK_EN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x08) |
||||
#define GPIO_IN_POL(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x0c) |
||||
#define GPIO_DATA_IN(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x10) |
||||
#define GPIO_EDGE_CAUSE(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x14) |
||||
#define GPIO_EDGE_MASK(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x18) |
||||
#define GPIO_LEVEL_MASK(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x1c) |
||||
|
||||
/*
|
||||
* Kirkwood-specific GPIO API |
||||
*/ |
||||
|
||||
void kw_gpio_set_valid(unsigned pin, int mode); |
||||
int kw_gpio_is_valid(unsigned pin, int mode); |
||||
int kw_gpio_direction_input(unsigned pin); |
||||
int kw_gpio_direction_output(unsigned pin, int value); |
||||
int kw_gpio_get_value(unsigned pin); |
||||
void kw_gpio_set_value(unsigned pin, int value); |
||||
void kw_gpio_set_blink(unsigned pin, int blink); |
||||
void kw_gpio_set_unused(unsigned pin); |
||||
|
||||
#define GPIO_INPUT_OK (1 << 0) |
||||
#define GPIO_OUTPUT_OK (1 << 1) |
||||
|
||||
#endif |
||||
@ -0,0 +1,200 @@ |
||||
/*
|
||||
* (C) Copyright 2009 |
||||
* Marvell Semiconductor <www.marvell.com> |
||||
* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
||||
* MA 02110-1301 USA |
||||
*/ |
||||
|
||||
#ifndef _CONFIG_MV88F6281GTW_GE_H |
||||
#define _CONFIG_MV88F6281GTW_GE_H |
||||
|
||||
/*
|
||||
* Version number information |
||||
*/ |
||||
#define CONFIG_IDENT_STRING "\nMarvell-MV88F6281GTW_GE" |
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change) |
||||
*/ |
||||
#define CONFIG_MARVELL 1 |
||||
#define CONFIG_ARM926EJS 1 /* Basic Architecture */ |
||||
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ |
||||
#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ |
||||
#define CONFIG_KW88F6281 1 /* SOC Name */ |
||||
#define CONFIG_MACH_MV88F6281GTW_GE /* Machine type */ |
||||
|
||||
#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ |
||||
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ |
||||
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ |
||||
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ |
||||
|
||||
/*
|
||||
* CLKs configurations |
||||
*/ |
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/*
|
||||
* NS16550 Configuration |
||||
*/ |
||||
#define CONFIG_SYS_NS16550 |
||||
#define CONFIG_SYS_NS16550_SERIAL |
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4) |
||||
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK |
||||
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE |
||||
|
||||
/*
|
||||
* Serial Port configuration |
||||
* The following definitions let you select what serial you want to use |
||||
* for your console driver. |
||||
*/ |
||||
|
||||
#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
||||
115200,230400, 460800, 921600 } |
||||
/* auto boot */ |
||||
#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
||||
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ |
||||
|
||||
#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ |
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ |
||||
+sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ |
||||
/*
|
||||
* Commands configuration |
||||
*/ |
||||
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ |
||||
#include <config_cmd_default.h> |
||||
#define CONFIG_CMD_AUTOSCRIPT |
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_ENV |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_CMD_SF |
||||
#define CONFIG_CMD_USB |
||||
|
||||
/*
|
||||
* Flash configuration |
||||
*/ |
||||
#ifdef CONFIG_CMD_SF |
||||
#define CONFIG_SPI_FLASH 1 |
||||
#define CONFIG_HARD_SPI 1 |
||||
#define CONFIG_KIRKWOOD_SPI 1 |
||||
#define CONFIG_SPI_FLASH_MACRONIX 1 |
||||
#define CONFIG_ENV_SPI_BUS 0 |
||||
#define CONFIG_ENV_SPI_CS 0 |
||||
#define CONFIG_ENV_SPI_MAX_HZ 50000000 /*50Mhz */ |
||||
#endif |
||||
|
||||
/*
|
||||
* Environment variables configurations |
||||
*/ |
||||
#ifdef CONFIG_SPI_FLASH |
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH 1 |
||||
#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K */ |
||||
#else |
||||
#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ |
||||
#endif |
||||
#define CONFIG_ENV_SIZE 0x1000 /* 4k */ |
||||
#define CONFIG_ENV_ADDR 0x30000 |
||||
#define CONFIG_ENV_OFFSET 0x30000 /* env starts here */ |
||||
|
||||
/*
|
||||
* Default environment variables |
||||
*/ |
||||
#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ |
||||
"setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
|
||||
"${x_bootcmd_usb}; bootm 0x6400000;" |
||||
|
||||
#define CONFIG_MTDPARTS "spi0.0:512k(uboot)," \ |
||||
"512k@512k(psm),2m@1m(kernel),13m@3m(rootfs)\0" |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ |
||||
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \
|
||||
"x_bootcmd_kernel=cp.b 0xE8100000 0x6400000 0x200000\0" \
|
||||
"x_bootcmd_usb=usb start\0" \
|
||||
"x_bootargs_root=root=/dev/mtdblock3 ro rootfstype=squashfs\0" |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ |
||||
/* size in bytes reserved for initial data */ |
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 |
||||
|
||||
/*
|
||||
* Other required minimal configurations |
||||
*/ |
||||
#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ |
||||
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
||||
#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ |
||||
#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ |
||||
#define CONFIG_NR_DRAM_BANKS 4 |
||||
#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ |
||||
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
||||
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
|
||||
/*
|
||||
* Ethernet Driver configuration |
||||
*/ |
||||
#ifdef CONFIG_CMD_NET |
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_NETCONSOLE /* include NetConsole support */ |
||||
#define CONFIG_NET_MULTI /* specify more that one ports available */ |
||||
#define CONFIG_MII /* expose smi ove miiphy interface */ |
||||
#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ |
||||
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ |
||||
#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */ |
||||
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ |
||||
#endif /* CONFIG_CMD_NET */ |
||||
|
||||
/*
|
||||
* Marvell 88Exxxx Switch configurations |
||||
*/ |
||||
#define CONFIG_RESET_PHY_R /* use reset_phy() to init phy/swtich */ |
||||
#define CONFIG_MV88E61XX_SWITCH /* Enable mv88e61xx switch driver */ |
||||
|
||||
/*
|
||||
* USB/EHCI |
||||
*/ |
||||
#ifdef CONFIG_CMD_USB |
||||
#define CONFIG_USB_EHCI /* Enable EHCI USB support */ |
||||
#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ |
||||
#define CONFIG_EHCI_IS_TDI |
||||
#define CONFIG_USB_STORAGE |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_ISO_PARTITION |
||||
#define CONFIG_SUPPORT_VFAT |
||||
#endif /* CONFIG_CMD_USB */ |
||||
|
||||
#endif /* _CONFIG_MV88F6281GTW_GE_H */ |
||||
@ -0,0 +1,198 @@ |
||||
/*
|
||||
* (C) Copyright 2009 |
||||
* Marvell Semiconductor <www.marvell.com> |
||||
* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
||||
* MA 02110-1301 USA |
||||
*/ |
||||
|
||||
#ifndef _CONFIG_RD6281A_H |
||||
#define _CONFIG_RD6281A_H |
||||
|
||||
/*
|
||||
* Version number information |
||||
*/ |
||||
#define CONFIG_IDENT_STRING "\nMarvell-RD6281A" |
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change) |
||||
*/ |
||||
#define CONFIG_MARVELL 1 |
||||
#define CONFIG_ARM926EJS 1 /* Basic Architecture */ |
||||
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ |
||||
#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ |
||||
#define CONFIG_KW88F6281 1 /* SOC Name */ |
||||
#define CONFIG_MACH_RD6281A /* Machine type */ |
||||
|
||||
#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ |
||||
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ |
||||
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ |
||||
|
||||
/*
|
||||
* CLKs configurations |
||||
*/ |
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/*
|
||||
* NS16550 Configuration |
||||
*/ |
||||
#define CONFIG_SYS_NS16550 |
||||
#define CONFIG_SYS_NS16550_SERIAL |
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4) |
||||
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK |
||||
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE |
||||
|
||||
/*
|
||||
* Serial Port configuration |
||||
* The following definitions let you select what serial you want to use |
||||
* for your console driver. |
||||
*/ |
||||
|
||||
#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
||||
115200,230400, 460800, 921600 } |
||||
/* auto boot */ |
||||
#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
||||
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ |
||||
|
||||
#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ |
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ |
||||
+sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ |
||||
/*
|
||||
* Commands configuration |
||||
*/ |
||||
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ |
||||
#include <config_cmd_default.h> |
||||
#define CONFIG_CMD_AUTOSCRIPT |
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_ENV |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_CMD_NAND |
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_CMD_USB |
||||
|
||||
/*
|
||||
* NAND configuration |
||||
*/ |
||||
#ifdef CONFIG_CMD_NAND |
||||
#define CONFIG_NAND_KIRKWOOD |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define NAND_MAX_CHIPS 1 |
||||
#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */ |
||||
#define NAND_ALLOW_ERASE_ALL 1 |
||||
#endif |
||||
|
||||
/*
|
||||
* Environment variables configurations |
||||
*/ |
||||
#ifdef CONFIG_CMD_NAND |
||||
#define CONFIG_ENV_IS_IN_NAND 1 |
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ |
||||
#else |
||||
#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ |
||||
#endif |
||||
/*
|
||||
* max 4k env size is enough, but in case of nand |
||||
* it has to be rounded to sector size |
||||
*/ |
||||
#define CONFIG_ENV_SIZE 0x20000 /* 128k */ |
||||
#define CONFIG_ENV_ADDR 0x40000 |
||||
#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */ |
||||
|
||||
/*
|
||||
* Default environment variables |
||||
*/ |
||||
#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ |
||||
"setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
|
||||
"${x_bootcmd_usb}; bootm 0x6400000;" |
||||
|
||||
#define CONFIG_MTDPARTS "orion_nand:512k(uboot)," \ |
||||
"3m@1m(kernel),1m@4m(psm),13m@5m(rootfs) rw\0" |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ |
||||
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \
|
||||
"x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \
|
||||
"x_bootcmd_usb=usb start\0" \
|
||||
"x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ |
||||
/* size in bytes reserved for initial data */ |
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 |
||||
|
||||
/*
|
||||
* Other required minimal configurations |
||||
*/ |
||||
#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ |
||||
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
||||
#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ |
||||
#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ |
||||
#define CONFIG_NR_DRAM_BANKS 4 |
||||
#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ |
||||
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
||||
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
|
||||
/*
|
||||
* Ethernet Driver configuration |
||||
*/ |
||||
#ifdef CONFIG_CMD_NET |
||||
#define CONFIG_NETCONSOLE /* include NetConsole support */ |
||||
#define CONFIG_NET_MULTI /* specify more that one ports available */ |
||||
#define CONFIG_MII /* expose smi ove miiphy interface */ |
||||
#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ |
||||
#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1} /* enable both ports */ |
||||
#define CONFIG_MV88E61XX_MULTICHIP_ADRMODE |
||||
#define CONFIG_DIS_AUTO_NEG_SPEED_GMII /*Disable Auto speed negociation */ |
||||
#define CONFIG_PHY_SPEED _1000BASET /*Force PHYspeed to 1GBPs */ |
||||
#define CONFIG_PHY_BASE_ADR 0x0A |
||||
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ |
||||
#define CONFIG_RESET_PHY_R /* use reset_phy() to init switch and PHY */ |
||||
#define CONFIG_MV88E61XX_SWITCH /* Enable MV88E61XX switch driver */ |
||||
#endif /* CONFIG_CMD_NET */ |
||||
|
||||
/*
|
||||
* USB/EHCI |
||||
*/ |
||||
#ifdef CONFIG_CMD_USB |
||||
#define CONFIG_USB_EHCI /* Enable EHCI USB support */ |
||||
#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ |
||||
#define CONFIG_EHCI_IS_TDI |
||||
#define CONFIG_USB_STORAGE |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_ISO_PARTITION |
||||
#define CONFIG_SUPPORT_VFAT |
||||
#endif /* CONFIG_CMD_USB */ |
||||
|
||||
#endif /* _CONFIG_RD6281A_H */ |
||||
@ -0,0 +1,195 @@ |
||||
/*
|
||||
* (C) Copyright 2009 |
||||
* Marvell Semiconductor <www.marvell.com> |
||||
* Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
||||
* MA 02110-1301 USA |
||||
*/ |
||||
|
||||
#ifndef _CONFIG_SHEEVAPLUG_H |
||||
#define _CONFIG_SHEEVAPLUG_H |
||||
|
||||
/*
|
||||
* Version number information |
||||
*/ |
||||
#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug" |
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change) |
||||
*/ |
||||
#define CONFIG_MARVELL 1 |
||||
#define CONFIG_ARM926EJS 1 /* Basic Architecture */ |
||||
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ |
||||
#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ |
||||
#define CONFIG_KW88F6281 1 /* SOC Name */ |
||||
#define CONFIG_MACH_SHEEVAPLUG /* Machine type */ |
||||
|
||||
#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ |
||||
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ |
||||
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ |
||||
|
||||
/*
|
||||
* CLKs configurations |
||||
*/ |
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/*
|
||||
* NS16550 Configuration |
||||
*/ |
||||
#define CONFIG_SYS_NS16550 |
||||
#define CONFIG_SYS_NS16550_SERIAL |
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4) |
||||
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK |
||||
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE |
||||
|
||||
/*
|
||||
* Serial Port configuration |
||||
* The following definitions let you select what serial you want to use |
||||
* for your console driver. |
||||
*/ |
||||
|
||||
#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
||||
115200,230400, 460800, 921600 } |
||||
/* auto boot */ |
||||
#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
||||
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ |
||||
|
||||
#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ |
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ |
||||
+sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ |
||||
/*
|
||||
* Commands configuration |
||||
*/ |
||||
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ |
||||
#include <config_cmd_default.h> |
||||
#define CONFIG_CMD_AUTOSCRIPT |
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_ENV |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_CMD_NAND |
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_CMD_USB |
||||
|
||||
/*
|
||||
* NAND configuration |
||||
*/ |
||||
#ifdef CONFIG_CMD_NAND |
||||
#define CONFIG_NAND_KIRKWOOD |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define NAND_MAX_CHIPS 1 |
||||
#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */ |
||||
#define NAND_ALLOW_ERASE_ALL 1 |
||||
#endif |
||||
|
||||
/*
|
||||
* Environment variables configurations |
||||
*/ |
||||
#ifdef CONFIG_CMD_NAND |
||||
#define CONFIG_ENV_IS_IN_NAND 1 |
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ |
||||
#else |
||||
#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ |
||||
#endif |
||||
/*
|
||||
* max 4k env size is enough, but in case of nand |
||||
* it has to be rounded to sector size |
||||
*/ |
||||
#define CONFIG_ENV_SIZE 0x20000 /* 128k */ |
||||
#define CONFIG_ENV_ADDR 0x40000 |
||||
#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */ |
||||
|
||||
/*
|
||||
* Default environment variables |
||||
*/ |
||||
#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ |
||||
"setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
|
||||
"${x_bootcmd_usb}; bootm 0x6400000;" |
||||
|
||||
#define CONFIG_MTDPARTS "orion_nand:512k(uboot)," \ |
||||
"3m@1m(kernel),1m@4m(psm),13m@5m(rootfs) rw\0" |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ |
||||
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \
|
||||
"x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \
|
||||
"x_bootcmd_usb=usb start\0" \
|
||||
"x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ |
||||
/* size in bytes reserved for initial data */ |
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 |
||||
|
||||
/*
|
||||
* Other required minimal configurations |
||||
*/ |
||||
#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ |
||||
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
||||
#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ |
||||
#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ |
||||
#define CONFIG_NR_DRAM_BANKS 4 |
||||
#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ |
||||
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
||||
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ |
||||
#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ |
||||
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
|
||||
/*
|
||||
* Ethernet Driver configuration |
||||
*/ |
||||
#ifdef CONFIG_CMD_NET |
||||
#define CONFIG_NETCONSOLE /* include NetConsole support */ |
||||
#define CONFIG_NET_MULTI /* specify more that one ports available */ |
||||
#define CONFIG_MII /* expose smi ove miiphy interface */ |
||||
#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ |
||||
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ |
||||
#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */ |
||||
#define CONFIG_PHY_BASE_ADR 0 |
||||
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ |
||||
#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ |
||||
#endif /* CONFIG_CMD_NET */ |
||||
|
||||
/*
|
||||
* USB/EHCI |
||||
*/ |
||||
#ifdef CONFIG_CMD_USB |
||||
#define CONFIG_USB_EHCI /* Enable EHCI USB support */ |
||||
#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ |
||||
#define CONFIG_EHCI_IS_TDI |
||||
#define CONFIG_USB_STORAGE |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_ISO_PARTITION |
||||
#define CONFIG_SUPPORT_VFAT |
||||
#endif /* CONFIG_CMD_USB */ |
||||
|
||||
#endif /* _CONFIG_SHEEVAPLUG_H */ |
||||
Loading…
Reference in new issue