driver: net: fsl-mc: Add support of multiple phys for dpmac

Till now we have had cases where we had one phy device per dpmac.
Now, with the upcoming products (LX2160AQDS), we have cases, where there
are sometimes two phy devices for one dpmac. One phy for TX lanes and
one phy for RX lanes. to handle such cases, add the support for multiple
phys in ethernet driver. The ethernet link is up if all the phy devices
connected to one dpmac report link up. also the link capabilities are
limited by the weakest phy device.

i.e. say if there are two phys for one dpmac. one operates at 10G without
autoneg and other operate at 1G with autoneg. Then the ethernet interface
will operate at 1G without autoneg.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
lime2-spi
Pankaj Bansal 6 years ago committed by Joe Hershberger
parent 1ed19a1421
commit 1a048cd656
  1. 18
      board/freescale/ls1088a/eth_ls1088aqds.c
  2. 21
      board/freescale/ls1088a/eth_ls1088ardb.c
  3. 26
      board/freescale/ls2080aqds/eth.c
  4. 24
      board/freescale/ls2080ardb/eth_ls2080rdb.c
  5. 66
      drivers/net/ldpaa_eth/ldpaa_eth.c
  6. 71
      drivers/net/ldpaa_eth/ldpaa_wriop.c
  7. 45
      include/fsl-mc/ldpaa_wriop.h

@ -487,16 +487,16 @@ void ls1088a_handle_phy_interface_sgmii(int dpmac_id)
case 0x3A:
switch (dpmac_id) {
case 1:
wriop_set_phy_address(dpmac_id, riser_phy_addr[1]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[1]);
break;
case 2:
wriop_set_phy_address(dpmac_id, riser_phy_addr[0]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[0]);
break;
case 3:
wriop_set_phy_address(dpmac_id, riser_phy_addr[3]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[3]);
break;
case 7:
wriop_set_phy_address(dpmac_id, riser_phy_addr[2]);
wriop_set_phy_address(dpmac_id, 0, riser_phy_addr[2]);
break;
default:
printf("WRIOP: Wrong DPMAC%d set to SGMII", dpmac_id);
@ -532,13 +532,13 @@ void ls1088a_handle_phy_interface_qsgmii(int dpmac_id)
case 4:
case 5:
case 6:
wriop_set_phy_address(dpmac_id, dpmac_id + 9);
wriop_set_phy_address(dpmac_id, 0, dpmac_id + 9);
break;
case 7:
case 8:
case 9:
case 10:
wriop_set_phy_address(dpmac_id, dpmac_id + 1);
wriop_set_phy_address(dpmac_id, 0, dpmac_id + 1);
break;
}
@ -567,7 +567,7 @@ void ls1088a_handle_phy_interface_xsgmii(int i)
case 0x15:
case 0x1D:
case 0x1E:
wriop_set_phy_address(i, i + 26);
wriop_set_phy_address(i, 0, i + 26);
ls1088a_qds_enable_SFP_TX(SFP_TX);
break;
default:
@ -590,13 +590,13 @@ static void ls1088a_handle_phy_interface_rgmii(int dpmac_id)
switch (dpmac_id) {
case 4:
wriop_set_phy_address(dpmac_id, RGMII_PHY1_ADDR);
wriop_set_phy_address(dpmac_id, 0, RGMII_PHY1_ADDR);
dpmac_info[dpmac_id].board_mux = EMI1_RGMII1;
bus = mii_dev_for_muxval(EMI1_RGMII1);
wriop_set_mdio(dpmac_id, bus);
break;
case 5:
wriop_set_phy_address(dpmac_id, RGMII_PHY2_ADDR);
wriop_set_phy_address(dpmac_id, 0, RGMII_PHY2_ADDR);
dpmac_info[dpmac_id].board_mux = EMI1_RGMII2;
bus = mii_dev_for_muxval(EMI1_RGMII2);
wriop_set_mdio(dpmac_id, bus);

@ -55,16 +55,17 @@ int board_eth_init(bd_t *bis)
* a MAC has no PHY address, we give a PHY address to XFI
* MAC error.
*/
wriop_set_phy_address(WRIOP1_DPMAC1, 0x0a);
wriop_set_phy_address(WRIOP1_DPMAC2, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC3, QSGMII1_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC4, QSGMII1_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC5, QSGMII1_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC6, QSGMII1_PORT4_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC7, QSGMII2_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC8, QSGMII2_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC9, QSGMII2_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC10, QSGMII2_PORT4_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, 0x0a);
wriop_set_phy_address(WRIOP1_DPMAC2, 0, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC3, 0, QSGMII1_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC4, 0, QSGMII1_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC5, 0, QSGMII1_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC6, 0, QSGMII1_PORT4_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC7, 0, QSGMII2_PORT1_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC8, 0, QSGMII2_PORT2_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC9, 0, QSGMII2_PORT3_PHY_ADDR);
wriop_set_phy_address(WRIOP1_DPMAC10, 0,
QSGMII2_PORT4_PHY_ADDR);
break;
default:

@ -623,7 +623,7 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id)
switch (++slot) {
case 1:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 1]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT1;
bus = mii_dev_for_muxval(EMI1_SLOT1);
@ -631,7 +631,7 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id)
break;
case 2:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 1]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT2;
bus = mii_dev_for_muxval(EMI1_SLOT2);
@ -641,18 +641,18 @@ void ls2080a_handle_phy_interface_sgmii(int dpmac_id)
if (slot == EMI_NONE)
return;
if (serdes1_prtcl == 0x39) {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 2]);
if (dpmac_id >= 6 && hwconfig_f("xqsgmii",
env_hwconfig))
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 3]);
} else {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 2]);
if (dpmac_id >= 7 && hwconfig_f("xqsgmii",
env_hwconfig))
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 3]);
}
dpmac_info[dpmac_id].board_mux = EMI1_SLOT3;
@ -691,7 +691,7 @@ serdes2:
break;
case 4:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 9]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT4;
bus = mii_dev_for_muxval(EMI1_SLOT4);
@ -701,14 +701,14 @@ serdes2:
if (slot == EMI_NONE)
return;
if (serdes2_prtcl == 0x47) {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 10]);
if (dpmac_id >= 14 && hwconfig_f("xqsgmii",
env_hwconfig))
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 11]);
} else {
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 11]);
}
dpmac_info[dpmac_id].board_mux = EMI1_SLOT5;
@ -717,7 +717,7 @@ serdes2:
break;
case 6:
/* Slot housing a SGMII riser card? */
wriop_set_phy_address(dpmac_id,
wriop_set_phy_address(dpmac_id, 0,
riser_phy_addr[dpmac_id - 13]);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT6;
bus = mii_dev_for_muxval(EMI1_SLOT6);
@ -775,7 +775,7 @@ void ls2080a_handle_phy_interface_qsgmii(int dpmac_id)
switch (++slot) {
case 1:
/* Slot housing a QSGMII riser card? */
wriop_set_phy_address(dpmac_id, dpmac_id - 1);
wriop_set_phy_address(dpmac_id, 0, dpmac_id - 1);
dpmac_info[dpmac_id].board_mux = EMI1_SLOT1;
bus = mii_dev_for_muxval(EMI1_SLOT1);
wriop_set_mdio(dpmac_id, bus);
@ -819,7 +819,7 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
* the XAUI card is used for the XFI MAC, which will cause
* error.
*/
wriop_set_phy_address(i, i + 4);
wriop_set_phy_address(i, 0, i + 4);
ls2080a_qds_enable_SFP_TX(SFP_TX);
break;

@ -50,21 +50,21 @@ int board_eth_init(bd_t *bis)
switch (srds_s1) {
case 0x2A:
wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC5, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC6, AQ_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC7, AQ_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC8, AQ_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC5, 0, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC6, 0, AQ_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC7, 0, AQ_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC8, 0, AQ_PHY_ADDR4);
break;
case 0x4B:
wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
break;
default:

@ -23,26 +23,40 @@ static int init_phy(struct eth_device *dev)
struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)dev->priv;
struct phy_device *phydev = NULL;
struct mii_dev *bus;
int ret;
int phy_addr, phy_num;
int ret = 0;
bus = wriop_get_mdio(priv->dpmac_id);
if (bus == NULL)
return 0;
phydev = phy_connect(bus, wriop_get_phy_address(priv->dpmac_id),
dev, wriop_get_enet_if(priv->dpmac_id));
if (!phydev) {
printf("Failed to connect\n");
return -1;
}
wriop_set_phy_dev(priv->dpmac_id, phydev);
for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
phy_addr = wriop_get_phy_address(priv->dpmac_id, phy_num);
if (phy_addr < 0)
continue;
ret = phy_config(phydev);
phydev = phy_connect(bus, phy_addr, dev,
wriop_get_enet_if(priv->dpmac_id));
if (!phydev) {
printf("Failed to connect\n");
ret = -ENODEV;
break;
}
wriop_set_phy_dev(priv->dpmac_id, phy_num, phydev);
ret = phy_config(phydev);
if (ret)
break;
}
if (ret) {
free(phydev);
wriop_set_phy_dev(priv->dpmac_id, NULL);
for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num);
if (!phydev)
continue;
free(phydev);
wriop_set_phy_dev(priv->dpmac_id, phy_num, NULL);
}
}
return ret;
@ -390,10 +404,10 @@ static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv,
{
struct phy_device *phydev = NULL;
phy_interface_t enet_if;
int phy_num, phys_detected;
int err;
/* let's start off with maximum capabilities
*/
/* let's start off with maximum capabilities */
enet_if = wriop_get_enet_if(priv->dpmac_id);
switch (enet_if) {
case PHY_INTERFACE_MODE_XGMII:
@ -405,15 +419,22 @@ static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv,
}
state->up = 1;
phys_detected = 0;
#ifdef CONFIG_PHYLIB
state->options |= DPMAC_LINK_OPT_AUTONEG;
phydev = wriop_get_phy_dev(priv->dpmac_id);
if (phydev) {
/* start the phy devices one by one and update the dpmac state */
for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num);
if (!phydev)
continue;
phys_detected++;
err = phy_startup(phydev);
if (err) {
printf("%s: Could not initialize\n", phydev->dev->name);
state->up = 0;
break;
}
if (phydev->link) {
state->rate = min(state->rate, (uint32_t)phydev->speed);
@ -422,11 +443,13 @@ static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv,
if (!phydev->autoneg)
state->options &= ~DPMAC_LINK_OPT_AUTONEG;
} else {
/* break out of loop even if one phy is down */
state->up = 0;
break;
}
}
#endif
if (!phydev)
if (!phys_detected)
state->options &= ~DPMAC_LINK_OPT_AUTONEG;
if (!state->up) {
@ -568,6 +591,7 @@ static void ldpaa_eth_stop(struct eth_device *net_dev)
struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
int err = 0;
struct phy_device *phydev = NULL;
int phy_num;
if ((net_dev->state == ETH_STATE_PASSIVE) ||
(net_dev->state == ETH_STATE_INIT))
@ -600,9 +624,11 @@ static void ldpaa_eth_stop(struct eth_device *net_dev)
printf("dpni_disable() failed\n");
#ifdef CONFIG_PHYLIB
phydev = wriop_get_phy_dev(priv->dpmac_id);
if (phydev)
phy_shutdown(phydev);
for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num);
if (phydev)
phy_shutdown(phydev);
}
#endif
/* Free DPBP handle and reset. */

@ -22,11 +22,10 @@ __weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)
void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
{
phy_interface_t enet_if;
int phy_num;
dpmac_info[dpmac_id].enabled = 0;
dpmac_info[dpmac_id].id = 0;
dpmac_info[dpmac_id].phy_addr = -1;
dpmac_info[dpmac_id].phydev = NULL;
dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE;
enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl);
@ -35,15 +34,23 @@ void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
dpmac_info[dpmac_id].id = dpmac_id;
dpmac_info[dpmac_id].enet_if = enet_if;
}
for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
dpmac_info[dpmac_id].phydev[phy_num] = NULL;
dpmac_info[dpmac_id].phy_addr[phy_num] = -1;
}
}
void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if)
{
int phy_num;
dpmac_info[dpmac_id].enabled = 1;
dpmac_info[dpmac_id].id = dpmac_id;
dpmac_info[dpmac_id].phy_addr = -1;
dpmac_info[dpmac_id].enet_if = enet_if;
dpmac_info[dpmac_id].phydev = NULL;
for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
dpmac_info[dpmac_id].phydev[phy_num] = NULL;
dpmac_info[dpmac_id].phy_addr[phy_num] = -1;
}
}
@ -60,47 +67,53 @@ static int wriop_dpmac_to_index(int dpmac_id)
return -1;
}
void wriop_disable_dpmac(int dpmac_id)
int wriop_disable_dpmac(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
return -ENODEV;
dpmac_info[i].enabled = 0;
wriop_dpmac_disable(dpmac_id);
return 0;
}
void wriop_enable_dpmac(int dpmac_id)
int wriop_enable_dpmac(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
return -ENODEV;
dpmac_info[i].enabled = 1;
wriop_dpmac_enable(dpmac_id);
return 0;
}
u8 wriop_is_enabled_dpmac(int dpmac_id)
int wriop_is_enabled_dpmac(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return -1;
return -ENODEV;
return dpmac_info[i].enabled;
}
void wriop_set_mdio(int dpmac_id, struct mii_dev *bus)
int wriop_set_mdio(int dpmac_id, struct mii_dev *bus)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
return -ENODEV;
dpmac_info[i].bus = bus;
return 0;
}
struct mii_dev *wriop_get_mdio(int dpmac_id)
@ -113,44 +126,56 @@ struct mii_dev *wriop_get_mdio(int dpmac_id)
return dpmac_info[i].bus;
}
void wriop_set_phy_address(int dpmac_id, int address)
int wriop_set_phy_address(int dpmac_id, int phy_num, int address)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
return -ENODEV;
if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
return -EINVAL;
dpmac_info[i].phy_addr[phy_num] = address;
dpmac_info[i].phy_addr = address;
return 0;
}
int wriop_get_phy_address(int dpmac_id)
int wriop_get_phy_address(int dpmac_id, int phy_num)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return -1;
return -ENODEV;
if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
return -EINVAL;
return dpmac_info[i].phy_addr;
return dpmac_info[i].phy_addr[phy_num];
}
void wriop_set_phy_dev(int dpmac_id, struct phy_device *phydev)
int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
return -ENODEV;
if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
return -EINVAL;
dpmac_info[i].phydev = phydev;
dpmac_info[i].phydev[phy_num] = phydev;
return 0;
}
struct phy_device *wriop_get_phy_dev(int dpmac_id)
struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return NULL;
if (phy_num < 0 || phy_num >= WRIOP_MAX_PHY_NUM)
return NULL;
return dpmac_info[i].phydev;
return dpmac_info[i].phydev[phy_num];
}
phy_interface_t wriop_get_enet_if(int dpmac_id)

@ -6,7 +6,11 @@
#ifndef __LDPAA_WRIOP_H
#define __LDPAA_WRIOP_H
#include <phy.h>
#include <phy.h>
#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0"
#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1"
#define WRIOP_MAX_PHY_NUM 2
enum wriop_port {
WRIOP1_DPMAC1 = 1,
@ -40,33 +44,30 @@ struct wriop_dpmac_info {
u8 enabled;
u8 id;
u8 board_mux;
int phy_addr;
int phy_addr[WRIOP_MAX_PHY_NUM];
phy_interface_t enet_if;
struct phy_device *phydev;
struct phy_device *phydev[WRIOP_MAX_PHY_NUM];
struct mii_dev *bus;
};
extern struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0"
#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1"
void wriop_init_dpmac(int, int, int);
void wriop_disable_dpmac(int);
void wriop_enable_dpmac(int);
u8 wriop_is_enabled_dpmac(int dpmac_id);
void wriop_set_mdio(int, struct mii_dev *);
struct mii_dev *wriop_get_mdio(int);
void wriop_set_phy_address(int, int);
int wriop_get_phy_address(int);
void wriop_set_phy_dev(int, struct phy_device *);
struct phy_device *wriop_get_phy_dev(int);
phy_interface_t wriop_get_enet_if(int);
void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl);
void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if);
int wriop_disable_dpmac(int dpmac_id);
int wriop_enable_dpmac(int dpmac_id);
int wriop_is_enabled_dpmac(int dpmac_id);
int wriop_set_mdio(int dpmac_id, struct mii_dev *bus);
struct mii_dev *wriop_get_mdio(int dpmac_id);
int wriop_set_phy_address(int dpmac_id, int phy_num, int address);
int wriop_get_phy_address(int dpmac_id, int phy_num);
int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev);
struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num);
phy_interface_t wriop_get_enet_if(int dpmac_id);
void wriop_dpmac_disable(int);
void wriop_dpmac_enable(int);
phy_interface_t wriop_dpmac_enet_if(int, int);
void wriop_init_dpmac_qsgmii(int, int);
void wriop_dpmac_disable(int dpmac_id);
void wriop_dpmac_enable(int dpmac_id);
phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl);
void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl);
void wriop_init_rgmii(void);
void wriop_init_dpmac_enet_if(int , phy_interface_t);
#endif /* __LDPAA_WRIOP_H */

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