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@ -327,8 +327,6 @@ int ddr3_tip_print_log(u32 dev_num, u32 mem_addr) |
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u32 if_id = 0; |
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struct hws_topology_map *tm = ddr3_get_topology_map(); |
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mem_addr = mem_addr; |
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#ifndef EXCLUDE_SWITCH_DEBUG |
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if ((is_validate_window_per_if != 0) || |
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(is_validate_window_per_pup != 0)) { |
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@ -820,7 +818,6 @@ static int ddr3_tip_access_atr(u32 dev_num, u32 flag_id, u32 value, u32 **ptr) |
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u32 tmp_val = 0, if_id = 0, pup_id = 0; |
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struct hws_topology_map *tm = ddr3_get_topology_map(); |
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dev_num = dev_num; |
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*ptr = NULL; |
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switch (flag_id) { |
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@ -1169,8 +1166,6 @@ int print_adll(u32 dev_num, u32 adll[MAX_INTERFACE_NUM * MAX_BUS_NUM]) |
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u32 i, j; |
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struct hws_topology_map *tm = ddr3_get_topology_map(); |
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dev_num = dev_num; |
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for (j = 0; j < tm->num_of_bus_per_interface; j++) { |
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VALIDATE_ACTIVE(tm->bus_act_mask, j); |
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for (i = 0; i < MAX_INTERFACE_NUM; i++) { |
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@ -1229,8 +1224,6 @@ int ddr3_tip_sweep_test(u32 dev_num, u32 test_type, |
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u32 reg_addr = 0; |
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struct hws_topology_map *tm = ddr3_get_topology_map(); |
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mem_addr = mem_addr; |
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if (test_type == 0) { |
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reg_addr = 1; |
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ui_mask_bit = 0x3f; |
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@ -1301,8 +1294,6 @@ int ddr3_tip_run_sweep_test(int dev_num, u32 repeat_num, u32 direction, |
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u32 max_cs = hws_ddr3_tip_max_cs_get(); |
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struct hws_topology_map *tm = ddr3_get_topology_map(); |
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repeat_num = repeat_num; |
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if (mode == 1) { |
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/* per pup */ |
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start_pup = 0; |
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