Wolfgang Denk
19 years ago
commit
1cfefe8cb6
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
|
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o
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$(LIB): .depend $(OBJS) |
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$(AR) crv $@ $(OBJS)
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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sinclude .depend |
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#########################################################################
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@ -0,0 +1,25 @@ |
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#
|
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# (C) Copyright 2000-2006
|
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
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# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
|
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#
|
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# See file CREDITS for list of people who contributed to this
|
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# project.
|
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#
|
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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# MA 02111-1307 USA
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#
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|
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TEXT_BASE = 0xffe00000
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@ -0,0 +1,125 @@ |
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/*
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* (C) Copyright 2000-2006 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/m5271.h> |
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#include <asm/immap_5271.h> |
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int checkboard (void) { |
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puts ("Board: Freescale M5271EVB\n"); |
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return 0; |
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}; |
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long int initdram (int board_type) { |
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int i; |
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/* Enable Address lines 23-21 and lower 16bits of data path */ |
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mbar_writeByte(MCF_GPIO_PAR_AD, MCF_GPIO_AD_ADDR23 | |
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MCF_GPIO_AD_ADDR22 | MCF_GPIO_AD_ADDR21 | |
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MCF_GPIO_AD_DATAL); |
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/* Set CS2 pin to be SD_CS0 */ |
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mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS) |
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| MCF_GPIO_PAR_CS_PAR_CS2); |
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/* Configure SDRAM Control Pin Assignemnt Register */ |
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mbar_writeByte(MCF_GPIO_PAR_SDRAM, MCF_GPIO_SDRAM_CSSDCS_00 | |
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MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS | |
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MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE | |
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MCF_GPIO_SDRAM_SDCS_11); |
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/*
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* Check to see if the SDRAM has already been initialized |
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* by a run control tool |
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*/ |
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if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) |
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{ |
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/* Initialize DRAM Control Register: DCR */ |
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mbar_writeShort(MCF_SDRAMC_DCR,
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MCF_SDRAMC_DCR_RTIM(0x01) |
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| MCF_SDRAMC_DCR_RC(0x30)); |
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/*
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* Initialize DACR0 |
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* |
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* CASL: 01 |
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* CBM: cmd at A20, bank select bits 21 and up |
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* PS: 32bit port size |
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*/ |
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mbar_writeLong(MCF_SDRAMC_DACR0, |
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MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18) |
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| MCF_SDRAMC_DACRn_CASL(1) |
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| MCF_SDRAMC_DACRn_CBM(3) |
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| MCF_SDRAMC_DACRn_PS(0)); |
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/* Initialize DMR0 */ |
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mbar_writeLong(MCF_SDRAMC_DMR0,
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MCF_SDRAMC_DMRn_BAM_16M |
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| MCF_SDRAMC_DMRn_V); |
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/* Set IP bit in DACR */ |
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mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) |
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| MCF_SDRAMC_DACRn_IP); |
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/* Wait at least 20ns to allow banks to precharge */ |
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for (i = 0; i < 5; i++) |
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asm(" nop"); |
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/* Write to this block to initiate precharge */ |
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*(u32 *)(CFG_SDRAM_BASE) = 0xa5a5a5a5; |
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/* Set RE bit in DACR */ |
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mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) |
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| MCF_SDRAMC_DACRn_RE); |
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/* Wait for at least 8 auto refresh cycles to occur */ |
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for (i = 0; i < 2000; i++) |
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asm(" nop"); |
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/* Finish the configuration by issuing the MRS */ |
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mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) |
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| MCF_SDRAMC_DACRn_MRS); |
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/*
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* Write to the SDRAM Mode Register A0-A11 = 0x400 |
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* |
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* Write Burst Mode = Programmed Burst Length |
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* Op Mode = Standard Op |
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* CAS Latency = 2 |
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* Burst Type = Sequential |
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* Burst Length = 1 |
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*/ |
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*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xa5a5a5a5; |
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} |
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return CFG_SDRAM_SIZE * 1024 * 1024; |
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}; |
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int testdram (void) { |
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/* TODO: XXX XXX XXX */ |
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printf ("DRAM test not implemented!\n"); |
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return (0); |
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} |
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@ -0,0 +1,145 @@ |
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/* |
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
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* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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OUTPUT_ARCH(m68k) |
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SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); |
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/* Do we need any of these for elf? |
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__DYNAMIC = 0; */ |
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GROUP(libgcc.a) |
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SECTIONS |
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{ |
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/* Read-only sections, merged into text segment: */ |
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. = + SIZEOF_HEADERS; |
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.interp : { *(.interp) } |
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.hash : { *(.hash) } |
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.dynsym : { *(.dynsym) } |
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.dynstr : { *(.dynstr) } |
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.rel.text : { *(.rel.text) } |
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.rela.text : { *(.rela.text) } |
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.rel.data : { *(.rel.data) } |
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.rela.data : { *(.rela.data) } |
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.rel.rodata : { *(.rel.rodata) } |
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.rela.rodata : { *(.rela.rodata) } |
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.rel.got : { *(.rel.got) } |
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.rela.got : { *(.rela.got) } |
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.rel.ctors : { *(.rel.ctors) } |
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.rela.ctors : { *(.rela.ctors) } |
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.rel.dtors : { *(.rel.dtors) } |
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.rela.dtors : { *(.rela.dtors) } |
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.rel.bss : { *(.rel.bss) } |
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.rela.bss : { *(.rela.bss) } |
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.rel.plt : { *(.rel.plt) } |
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.rela.plt : { *(.rela.plt) } |
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.init : { *(.init) } |
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.plt : { *(.plt) } |
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.text : |
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{ |
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/* WARNING - the following is hand-optimized to fit within */ |
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/* the sector layout of our flash chips! XXX FIXME XXX */ |
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|
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cpu/mcf52x2/start.o (.text) |
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lib_m68k/traps.o (.text) |
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cpu/mcf52x2/interrupts.o (.text) |
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common/dlmalloc.o (.text) |
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lib_generic/zlib.o (.text) |
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. = DEFINED(env_offset) ? env_offset : .; |
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common/environment.o (.ppcenv) |
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*(.text) |
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*(.fixup) |
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*(.got1) |
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} |
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_etext = .; |
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PROVIDE (etext = .); |
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.rodata : |
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{ |
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*(.rodata) |
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*(.rodata1) |
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} |
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.fini : { *(.fini) } =0 |
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.ctors : { *(.ctors) } |
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.dtors : { *(.dtors) } |
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|
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/* Read-write section, merged into data segment: */ |
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. = (. + 0x00FF) & 0xFFFFFF00; |
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_erotext = .; |
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PROVIDE (erotext = .); |
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|
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.reloc : |
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{ |
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__got_start = .; |
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*(.got) |
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__got_end = .; |
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_GOT2_TABLE_ = .; |
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*(.got2) |
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_FIXUP_TABLE_ = .; |
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*(.fixup) |
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} |
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__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
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__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
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|
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.data : |
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{ |
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*(.data) |
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*(.data1) |
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*(.sdata) |
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*(.sdata2) |
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*(.dynamic) |
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CONSTRUCTORS |
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} |
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_edata = .; |
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PROVIDE (edata = .); |
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|
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. = .; |
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__u_boot_cmd_start = .; |
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.u_boot_cmd : { *(.u_boot_cmd) } |
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__u_boot_cmd_end = .; |
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|
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|
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. = .; |
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__start___ex_table = .; |
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__ex_table : { *(__ex_table) } |
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__stop___ex_table = .; |
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|
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. = ALIGN(256); |
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__init_begin = .; |
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.text.init : { *(.text.init) } |
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.data.init : { *(.data.init) } |
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. = ALIGN(256); |
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__init_end = .; |
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|
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__bss_start = .; |
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.bss : |
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{ |
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_sbss = .; |
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*(.sbss) *(.scommon) |
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*(.dynbss) |
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*(.bss) |
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*(COMMON) |
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. = ALIGN(4); |
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_ebss = .; |
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} |
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_end = . ; |
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PROVIDE (end = .); |
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} |
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@ -0,0 +1,40 @@ |
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#
|
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# (C) Copyright 2000-2003
|
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
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#
|
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# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
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#
|
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|
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include $(TOPDIR)/config.mk |
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|
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LIB = lib$(BOARD).a
|
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|
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OBJS = $(BOARD).o
|
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|
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$(LIB): .depend $(OBJS) |
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$(AR) crv $@ $(OBJS)
|
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|
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#########################################################################
|
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|
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
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|
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sinclude .depend |
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|
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#########################################################################
|
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@ -0,0 +1,25 @@ |
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#
|
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# (C) Copyright 2000-2003
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
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TEXT_BASE = 0x10000000
|
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@ -0,0 +1,125 @@ |
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/*
|
||||
* (C) Copyright 2000-2003 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
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#include <asm/m5271.h> |
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#include <asm/immap_5271.h> |
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|
||||
|
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int checkboard (void) { |
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puts ("Board: R5200 Ethernet Module\n"); |
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return 0; |
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}; |
||||
|
||||
long int initdram (int board_type) { |
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int i; |
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|
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/*
|
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* Set CS2 pin to be SD_CS0 |
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*/ |
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mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS) |
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| MCF_GPIO_PAR_CS_PAR_CS2); |
||||
|
||||
mbar_writeByte(MCF_GPIO_PAR_SDRAM, mbar_readByte(MCF_GPIO_PAR_SDRAM) |
||||
| MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(0x01)); |
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|
||||
/*
|
||||
* Check to see if the SDRAM has already been initialized |
||||
* by a run control tool |
||||
*/ |
||||
if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) |
||||
{ |
||||
/*
|
||||
* Initialize DRAM Control Register: DCR |
||||
*/ |
||||
mbar_writeShort(MCF_SDRAMC_DCR, MCF_SDRAMC_DCR_RTIM(0x01) |
||||
| MCF_SDRAMC_DCR_RC(0x30)); |
||||
|
||||
/*
|
||||
* Initialize DACR0 |
||||
*/ |
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mbar_writeLong(MCF_SDRAMC_DACR0, |
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MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18) |
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| MCF_SDRAMC_DACRn_CASL(0) |
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| MCF_SDRAMC_DACRn_CBM(3) |
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| MCF_SDRAMC_DACRn_PS(2)); |
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|
||||
/*
|
||||
* Initialize DMR0 |
||||
*/ |
||||
mbar_writeLong(MCF_SDRAMC_DMR0,
|
||||
MCF_SDRAMC_DMRn_BAM_8M |
||||
| MCF_SDRAMC_DMRn_V); |
||||
|
||||
/*
|
||||
* Set IP bit in DACR |
||||
*/ |
||||
mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) |
||||
| MCF_SDRAMC_DACRn_IP); |
||||
|
||||
/*
|
||||
* Wait at least 20ns to allow banks to precharge |
||||
*/ |
||||
for (i = 0; i < 5; i++) |
||||
asm(" nop"); |
||||
|
||||
/*
|
||||
* Write to this block to initiate precharge |
||||
*/ |
||||
*(u16 *)(CFG_SDRAM_BASE) = 0x9696; |
||||
|
||||
/*
|
||||
* Set RE bit in DACR |
||||
*/ |
||||
mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) |
||||
| MCF_SDRAMC_DACRn_RE); |
||||
|
||||
|
||||
/*
|
||||
* Wait for at least 8 auto refresh cycles to occur |
||||
*/ |
||||
for (i = 0; i < 2000; i++) |
||||
asm(" nop"); |
||||
|
||||
/*
|
||||
* Finish the configuration by issuing the MRS. |
||||
*/ |
||||
mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) |
||||
| MCF_SDRAMC_DACRn_MRS); |
||||
|
||||
|
||||
/*
|
||||
* Write to the SDRAM Mode Register |
||||
*/ |
||||
*(u16 *)(CFG_SDRAM_BASE + 0x1000) = 0x9696; |
||||
} |
||||
|
||||
return CFG_SDRAM_SIZE * 1024 * 1024; |
||||
}; |
||||
|
||||
int testdram (void) { |
||||
/* TODO: XXX XXX XXX */ |
||||
printf ("DRAM test not implemented!\n"); |
||||
|
||||
return (0); |
||||
} |
||||
@ -0,0 +1,144 @@ |
||||
/* |
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(m68k) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
cpu/mcf52x2/start.o (.text) |
||||
lib_m68k/traps.o (.text) |
||||
cpu/mcf52x2/interrupts.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib_generic/zlib.o (.text) |
||||
|
||||
. = DEFINED(env_offset) ? env_offset : .; |
||||
common/environment.o (.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x00FF) & 0xFFFFFF00; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
|
||||
.reloc : |
||||
{ |
||||
__got_start = .; |
||||
*(.got) |
||||
__got_end = .; |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
. = .; |
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
|
||||
. = .; |
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(256); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(256); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
_sbss = .; |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
. = ALIGN(4); |
||||
_ebss = .; |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
||||
@ -0,0 +1,98 @@ |
||||
/*
|
||||
* MCF5272 Internal Memory Map |
||||
* |
||||
* Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
||||
* 2006 Zachary P. Landau <zachary.landau@labxtechnologies.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __IMMAP_5271__ |
||||
#define __IMMAP_5271__ |
||||
|
||||
/* Interrupt module registers
|
||||
*/ |
||||
typedef struct int_ctrl { |
||||
uint int_icr1; |
||||
uint int_icr2; |
||||
uint int_icr3; |
||||
uint int_icr4; |
||||
uint int_isr; |
||||
uint int_pitr; |
||||
uint int_piwr; |
||||
uchar res1[3]; |
||||
uchar int_pivr; |
||||
} intctrl_t; |
||||
|
||||
/* Timer module registers
|
||||
*/ |
||||
typedef struct timer_ctrl { |
||||
ushort timer_tmr; |
||||
ushort res1; |
||||
ushort timer_trr; |
||||
ushort res2; |
||||
ushort timer_tcap; |
||||
ushort res3; |
||||
ushort timer_tcn; |
||||
ushort res4; |
||||
ushort timer_ter; |
||||
uchar res5[14]; |
||||
} timer_t; |
||||
|
||||
/* Fast ethernet controller registers
|
||||
*/ |
||||
typedef struct fec { |
||||
uint res1; |
||||
uint fec_ievent; |
||||
uint fec_imask; |
||||
uint res2; |
||||
uint fec_r_des_active; |
||||
uint fec_x_des_active; |
||||
uint res3[3]; |
||||
uint fec_ecntrl; |
||||
uint res4[6]; |
||||
uint fec_mii_data; |
||||
uint fec_mii_speed; |
||||
uint res5[7]; |
||||
uint fec_mibc; |
||||
uint res6[7]; |
||||
uint fec_r_cntrl; |
||||
uint res7[15]; |
||||
uint fec_x_cntrl; |
||||
uint res8[7]; |
||||
uint fec_addr_low; |
||||
uint fec_addr_high; |
||||
uint fec_opd; |
||||
uint res9[10]; |
||||
uint fec_ihash_table_high; |
||||
uint fec_ihash_table_low; |
||||
uint fec_ghash_table_high; |
||||
uint fec_ghash_table_low; |
||||
uint res10[7]; |
||||
uint fec_tfwr; |
||||
uint res11; |
||||
uint fec_r_bound; |
||||
uint fec_r_fstart; |
||||
uint res12[11]; |
||||
uint fec_r_des_start; |
||||
uint fec_x_des_start; |
||||
uint fec_r_buff_size; |
||||
} fec_t; |
||||
|
||||
#endif /* __IMMAP_5271__ */ |
||||
@ -0,0 +1,114 @@ |
||||
/*
|
||||
* mcf5271.h -- Definitions for Motorola Coldfire 5271 |
||||
* |
||||
* (C) Copyright 2006, Lab X Technologies <zachary.landau@labxtechnologies.com> |
||||
* Based on mcf5272sim.h of uCLinux distribution: |
||||
* (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com) |
||||
* (C) Copyright 2000, Lineo Inc. (www.lineo.com) |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
|
||||
#ifndef _MCF5271_H_ |
||||
#define _MCF5271_H_ |
||||
|
||||
#define mbar_readLong(x) *((volatile unsigned long *) (CFG_MBAR + x)) |
||||
#define mbar_readShort(x) *((volatile unsigned short *) (CFG_MBAR + x)) |
||||
#define mbar_readByte(x) *((volatile unsigned char *) (CFG_MBAR + x)) |
||||
#define mbar_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR + x)) = y |
||||
#define mbar_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR + x)) = y |
||||
#define mbar_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR + x)) = y |
||||
|
||||
#define MCF_FMPLL_SYNCR 0x120000 |
||||
#define MCF_FMPLL_SYNSR 0x120004 |
||||
#define MCF_FMPLL_SYNCR_MFD(x) ((x&0x7)<<24) |
||||
#define MCF_FMPLL_SYNCR_RFD(x) ((x&0x7)<<19) |
||||
#define MCF_FMPLL_SYNSR_LOCK 0x8 |
||||
|
||||
#define MCF_WTM_WCR 0x140000 |
||||
#define MCF_WTM_WCNTR 0x140004 |
||||
#define MCF_WTM_WSR 0x140006 |
||||
#define MCF_WTM_WCR_EN 0x0001 |
||||
|
||||
#define MCF_RCM_RCR 0x110000 |
||||
#define MCF_RCM_RCR_FRCRSTOUT 0x40 |
||||
#define MCF_RCM_RCR_SOFTRST 0x80 |
||||
|
||||
#define MCF_GPIO_PAR_AD 0x100040 |
||||
#define MCF_GPIO_PAR_CS 0x100045 |
||||
#define MCF_GPIO_PAR_SDRAM 0x100046 |
||||
#define MCF_GPIO_PAR_FECI2C 0x100047 |
||||
#define MCF_GPIO_PAR_UART 0x100048 |
||||
|
||||
#define MCF_GPIO_AD_ADDR23 0x80 |
||||
#define MCF_GPIO_AD_ADDR22 0x40 |
||||
#define MCF_GPIO_AD_ADDR21 0x20 |
||||
#define MCF_GPIO_AD_DATAL 0x01 |
||||
#define MCF_GPIO_AD_MASK 0xe1 |
||||
|
||||
#define MCF_GPIO_PAR_CS_PAR_CS2 0x04 |
||||
|
||||
#define MCF_GPIO_SDRAM_CSSDCS_00 0x00 /* CS[3:2] pins: CS3, CS2 */ |
||||
#define MCF_GPIO_SDRAM_CSSDCS_01 0x40 /* CS[3:2] pins: CS3, SD_CS0 */ |
||||
#define MCF_GPIO_SDRAM_CSSDCS_10 0x80 /* CS[3:2] pins: SD_CS1, SC2 */ |
||||
#define MCF_GPIO_SDRAM_CSSDCS_11 0xc0 /* CS[3:2] pins: SD_CS1, SD_CS0 */ |
||||
#define MCF_GPIO_SDRAM_SDWE 0x20 /* WE pin */ |
||||
#define MCF_GPIO_SDRAM_SCAS 0x10 /* CAS pin */ |
||||
#define MCF_GPIO_SDRAM_SRAS 0x08 /* RAS pin */ |
||||
#define MCF_GPIO_SDRAM_SCKE 0x04 /* CKE pin */ |
||||
#define MCF_GPIO_SDRAM_SDCS_00 0x00 /* SD_CS[0:1] pins: GPIO, GPIO */ |
||||
#define MCF_GPIO_SDRAM_SDCS_01 0x01 /* SD_CS[0:1] pins: GPIO, SD_CS0 */ |
||||
#define MCF_GPIO_SDRAM_SDCS_10 0x02 /* SD_CS[0:1] pins: SD_CS1, GPIO */ |
||||
#define MCF_GPIO_SDRAM_SDCS_11 0x03 /* SD_CS[0:1] pins: SD_CS1, SD_CS0 */ |
||||
|
||||
#define MCF_GPIO_PAR_UART_U0RTS 0x0001 |
||||
#define MCF_GPIO_PAR_UART_U0CTS 0x0002 |
||||
#define MCF_GPIO_PAR_UART_U0TXD 0x0004 |
||||
#define MCF_GPIO_PAR_UART_U0RXD 0x0008 |
||||
#define MCF_GPIO_PAR_UART_U1RXD_UART1 0x0C00 |
||||
#define MCF_GPIO_PAR_UART_U1TXD_UART1 0x0300 |
||||
|
||||
#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6) |
||||
|
||||
#define MCF_SDRAMC_DCR 0x000040 |
||||
#define MCF_SDRAMC_DACR0 0x000048 |
||||
#define MCF_SDRAMC_DMR0 0x00004C |
||||
|
||||
#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0) |
||||
#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9) |
||||
#define MCF_SDRAMC_DCR_IS 0x0800 |
||||
#define MCF_SDRAMC_DCR_COC 0x1000 |
||||
#define MCF_SDRAMC_DCR_NAM 0x2000 |
||||
|
||||
#define MCF_SDRAMC_DACRn_IP 0x00000008 |
||||
#define MCF_SDRAMC_DACRn_PS(x) (((x)&0x00000003)<<4) |
||||
#define MCF_SDRAMC_DACRn_MRS 0x00000040 |
||||
#define MCF_SDRAMC_DACRn_CBM(x) (((x)&0x00000007)<<8) |
||||
#define MCF_SDRAMC_DACRn_CASL(x) (((x)&0x00000003)<<12) |
||||
#define MCF_SDRAMC_DACRn_RE 0x00008000 |
||||
#define MCF_SDRAMC_DACRn_BA(x) (((x)&0x00003FFF)<<18) |
||||
|
||||
#define MCF_SDRAMC_DMRn_BAM_8M 0x007C0000 |
||||
#define MCF_SDRAMC_DMRn_BAM_16M 0x00FC0000 |
||||
#define MCF_SDRAMC_DMRn_V 0x00000001 |
||||
|
||||
#define MCFSIM_ICR1 0x000C41 |
||||
|
||||
#endif /* _MCF5271_H_ */ |
||||
@ -0,0 +1,154 @@ |
||||
/*
|
||||
* Configuation settings for the Freescale M5271EVB |
||||
* |
||||
* Based on MC5272C3 and r5200 board configs |
||||
* (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com> |
||||
* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* board/config.h - configuration options, board specific |
||||
*/ |
||||
|
||||
#ifndef _M5271EVB_H |
||||
#define _M5271EVB_H |
||||
|
||||
#define DEBUG |
||||
#undef DEBUG |
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change) |
||||
*/ |
||||
#define CONFIG_MCF52x2 /* define processor family */ |
||||
#define CONFIG_M5271 /* define processor type */ |
||||
#define CONFIG_M5271EVB /* define board type */ |
||||
|
||||
#define CONFIG_IPADDR 192.168.30.1 |
||||
#define CONFIG_SERVERIP 192.168.1.1 |
||||
#define CONFIG_ETHADDR 00:06:3b:01:41:55 |
||||
|
||||
#define CONFIG_BAUDRATE 19200 |
||||
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } |
||||
|
||||
#undef CONFIG_WATCHDOG /* disable watchdog */ |
||||
|
||||
/* Configuration for environment
|
||||
* Environment is embedded in u-boot in the second sector of the flash |
||||
*/ |
||||
#ifndef CONFIG_MONITOR_IS_IN_RAM |
||||
#define CFG_ENV_OFFSET 0x4000 |
||||
#define CFG_ENV_SECT_SIZE 0x2000 |
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#else |
||||
#define CFG_ENV_ADDR 0xffe04000 |
||||
#define CFG_ENV_SECT_SIZE 0x2000 |
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#endif |
||||
|
||||
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB)) |
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||
#include <cmd_confdefs.h> |
||||
|
||||
#define CFG_PROMPT "=> " |
||||
#define CFG_LONGHELP /* undef to save memory */ |
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||
#else |
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#endif |
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CFG_MAXARGS 16 /* max number of command args */ |
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||
|
||||
#define CFG_LOAD_ADDR 0x00100000 |
||||
|
||||
#define CFG_MEMTEST_START 0x400 |
||||
#define CFG_MEMTEST_END 0x380000 |
||||
|
||||
#define CFG_HZ 1000000 |
||||
#define CFG_CLK 100000000 |
||||
|
||||
/*
|
||||
* Low Level Configuration Settings |
||||
* (address mappings, register initial values, etc.) |
||||
* You should know what you are doing if you make changes here. |
||||
*/ |
||||
|
||||
#define CFG_MBAR 0x40000000 /* Register Base Addrs */ |
||||
|
||||
/* Enable FEC ethernet */ |
||||
#define FEC_ENET |
||||
#define CONFIG_NET_RETRY_COUNT 5 |
||||
#define CFG_ENET_BD_BASE 0x480000 |
||||
|
||||
/*
|
||||
* Definitions for initial stack pointer and data area (in DPRAM) |
||||
*/ |
||||
#define CFG_INIT_RAM_ADDR 0x20000000 |
||||
#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ |
||||
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ |
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||
|
||||
/*
|
||||
* Start addresses for the final memory configuration |
||||
* (Set up by the startup code) |
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0 |
||||
*/ |
||||
#define CFG_SDRAM_BASE 0x00000000 |
||||
#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ |
||||
#define CFG_FLASH_BASE 0xffe00000 |
||||
|
||||
#ifdef CONFIG_MONITOR_IS_IN_RAM |
||||
#define CFG_MONITOR_BASE 0x20000 |
||||
#else |
||||
#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) |
||||
#endif |
||||
|
||||
#define CFG_MONITOR_LEN 0x40000 |
||||
#define CFG_MALLOC_LEN (256 << 10) |
||||
#define CFG_BOOTPARAMS_LEN (64*1024) |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization ?? |
||||
*/ |
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
|
||||
/* FLASH organization */ |
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ |
||||
#define CFG_FLASH_ERASE_TOUT 1000 |
||||
|
||||
#define CFG_FLASH_CFI 1 |
||||
#define CFG_FLASH_CFI_DRIVER 1 |
||||
#define CFG_FLASH_SIZE 0x200000 |
||||
|
||||
/* Cache Configuration */ |
||||
#define CFG_CACHELINE_SIZE 16 |
||||
|
||||
/* Port configuration */ |
||||
#define CFG_FECI2C 0xF0 |
||||
|
||||
#endif /* _M5271EVB_H */ |
||||
@ -0,0 +1,169 @@ |
||||
/*
|
||||
* Configuation settings for the R5200 board |
||||
* |
||||
* (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com> |
||||
* Based on Motorola MC5272C3 board config |
||||
* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* board/config.h - configuration options, board specific |
||||
*/ |
||||
|
||||
#ifndef _R5200_H |
||||
#define _R5200_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
* (easy to change) |
||||
*/ |
||||
#define CONFIG_MCF52x2 /* define processor family */ |
||||
#define CONFIG_M5271 /* define processor type */ |
||||
#define CONFIG_R5200 /* define board type */ |
||||
|
||||
#define FEC_ENET |
||||
#define CONFIG_NET_RETRY_COUNT 5 |
||||
|
||||
#define CONFIG_IPADDR 192.168.0.172 |
||||
#define CONFIG_SERVERIP 192.168.0.148 |
||||
#define CONFIG_ETHADDR 00:06:3b:00:44:55 |
||||
|
||||
#define CONFIG_BAUDRATE 19200 |
||||
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } |
||||
|
||||
#define CONFIG_WATCHDOG |
||||
#define CONFIG_WATCHDOG_TIMEOUT 0xFFFF /* clock modulus */ |
||||
|
||||
/* Configuration for environment
|
||||
* Environment is embedded in u-boot in the second sector of the flash |
||||
*/ |
||||
#ifndef CONFIG_MONITOR_IS_IN_RAM |
||||
#define CFG_ENV_OFFSET 0x20000 |
||||
#define CFG_ENV_SECT_SIZE 0x20000 |
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#define CFG_ENV_IS_EMBEDDED 1 |
||||
#else |
||||
#define CFG_ENV_ADDR 0xf0020000 |
||||
#define CFG_ENV_SECT_SIZE 0x2000 |
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#endif |
||||
|
||||
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB)) |
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||
#include <cmd_confdefs.h> |
||||
|
||||
/* Note: We only copy one sectors worth of application code from location
|
||||
* 10200000 for speed purposes. Increase the size if necessary */
|
||||
#define CONFIG_BOOTCOMMAND "cp.b 10200000 0 20000; go 400" |
||||
#define CONFIG_BOOTDELAY 1 |
||||
|
||||
#define CFG_PROMPT "u-boot> " |
||||
#define CFG_LONGHELP /* undef to save memory */ |
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||
#else |
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#endif |
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CFG_MAXARGS 16 /* max number of command args */ |
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||
|
||||
#define CFG_LOAD_ADDR 0x00002000 |
||||
|
||||
#define CFG_MEMTEST_START 0x400 |
||||
#define CFG_MEMTEST_END 0x380000 |
||||
|
||||
#define CFG_HZ 1000000 |
||||
#define CFG_CLK 100000000 |
||||
|
||||
/*
|
||||
* Low Level Configuration Settings |
||||
* (address mappings, register initial values, etc.) |
||||
* You should know what you are doing if you make changes here. |
||||
*/ |
||||
|
||||
#define CFG_MBAR 0x40000000 /* Register Base Addrs */ |
||||
|
||||
#define CFG_ENET_BD_BASE 0x480000 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area (in DPRAM) |
||||
*/ |
||||
#define CFG_INIT_RAM_ADDR 0x20000000 |
||||
#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ |
||||
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ |
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration |
||||
* (Set up by the startup code) |
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0 |
||||
*/ |
||||
#define CFG_SDRAM_BASE 0x00000000 |
||||
#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ |
||||
#define CFG_FLASH_BASE 0x10000000 |
||||
|
||||
#ifdef CONFIG_MONITOR_IS_IN_RAM |
||||
#define CFG_MONITOR_BASE 0x20000 |
||||
#else |
||||
#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) |
||||
#endif |
||||
|
||||
#define CFG_MONITOR_LEN 0x20001 |
||||
#define CFG_MALLOC_LEN (256 << 10) |
||||
#define CFG_BOOTPARAMS_LEN 64*1024 |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization ?? |
||||
*/ |
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization |
||||
*/ |
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
#define CFG_MAX_FLASH_SECT 1024 /* max number of sectors on one chip */ |
||||
#define CFG_FLASH_ERASE_TOUT 1000 |
||||
|
||||
#define CFG_FLASH_CFI 1 |
||||
#define CFG_FLASH_CFI_DRIVER 1 |
||||
#define CFG_FLASH_SIZE 0x800000 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration |
||||
*/ |
||||
#define CFG_CACHELINE_SIZE 16 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Memory bank definitions |
||||
*/ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Port configuration |
||||
*/ |
||||
#define CFG_FECI2C 0xF0 |
||||
|
||||
#endif /* _R5200_H */ |
||||
Loading…
Reference in new issue