Wolfgang Denk
15 years ago
commit
1d96cfe8f5
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Overview: |
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========= |
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|
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The MPC8536E integrates a PowerPC processor core with system logic |
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required for imaging, networking, and communications applications. |
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|
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Boot from NAND: |
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=============== |
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|
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The MPC8536E is capable of booting from NAND flash which uses the image |
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u-boot-nand.bin. This image contains two parts: a first stage image(also |
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call 4K NAND loader and a second stage image. The former is appended to |
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the latter to produce u-boot-nand.bin. |
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|
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The bootup process can be divided into two stages: the first stage will |
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configure the L2SRAM, then copy the second stage image to L2SRAM and jump |
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to it. The second stage image is to configure all the hardware and boot up |
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to U-Boot command line. |
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|
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The 4K NAND loader's code comes from the corresponding nand_spl directory, |
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along with the code twisted by CONFIG_NAND_SPL. The macro CONFIG_NAND_SPL |
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is mainly used to shrink the code size to the 4K size limitation. |
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|
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The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the |
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second stage image. It's set in the board config file when boot from NAND |
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is selected. |
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|
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Build and boot steps |
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-------------------- |
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|
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1. Building image |
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make MPC8536DS_NAND_config |
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make CROSS_COMPILE=powerpc-none-linux-gnuspe- all |
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2. Change dip-switch |
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SW2[5-8] = 1011 |
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SW9[1-3] = 101 |
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Note: 1 stands for 'on', 0 stands for 'off' |
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|
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3. Flash image |
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tftp 1000000 u-boot-nand.bin |
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nand erase 0 a0000 |
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nand write 1000000 0 a0000 |
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|
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Boot from On-chip ROM: |
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====================== |
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|
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The MPC8536E is capable of booting from the on-chip ROM - boot from eSDHC |
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and boot from eSPI. When power on, the porcessor excutes the ROM code to |
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initialize the eSPI/eSDHC controller, and loads the mian U-Boot image from |
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the memory device that interfaced to the controller, such as the SDCard or |
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SPI EEPROM, to the target memory, e.g. SDRAM or L2SRAM, then boot from it. |
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|
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The memory device should contain a specific data structure with control word |
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and config word at the fixed address. The config word direct the process how |
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to config the memory device, and the control word direct the processor where |
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to find the image on the memory device, or where copy the main image to. The |
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user can use any method to store the data structure to the memory device, only |
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if store it on the assigned address. |
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|
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Build and boot steps |
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-------------------- |
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|
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For boot from eSDHC: |
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1. Build image |
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make MPC8536DS_SDCARD_config |
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make CROSS_COMPILE=powerpc-none-linux-gnuspe- all |
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|
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2. Change dip-switch |
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SW2[5-8] = 0111 |
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SW3[1] = 0 |
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SW8[7] = 0 - The on-board SD/MMC slot is active |
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SW8[7] = 1 - The externel SD/MMC slot is active |
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|
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3. Put image to SDCard |
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Put the follwing info at the assigned address on the SDCard: |
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|
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Offset | Data | Description |
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-------------------------------------------------------- |
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| 0x40-0x43 | 0x424F4F54 | BOOT signature | |
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-------------------------------------------------------- |
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| 0x48-0x4B | 0x00080000 | u-boot.bin's size | |
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-------------------------------------------------------- |
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| 0x50-0x53 | 0x???????? | u-boot.bin's Addr on SDCard | |
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-------------------------------------------------------- |
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| 0x58-0x5B | 0xF8F80000 | Target Address | |
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------------------------------------------------------- |
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| 0x60-0x63 | 0xF8FFF000 | Execution Starting Address | |
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-------------------------------------------------------- |
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| 0x68-0x6B | 0x6 | Number of Config Addr/Data | |
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-------------------------------------------------------- |
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| 0x80-0x83 | 0xFF720100 | Config Addr 1 | |
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| 0x84-0x87 | 0xF8F80000 | Config Data 1 | |
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-------------------------------------------------------- |
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| 0x88-0x8b | 0xFF720e44 | Config Addr 2 | |
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| 0x8c-0x8f | 0x0000000C | Config Data 2 | |
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-------------------------------------------------------- |
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| 0x90-0x93 | 0xFF720000 | Config Addr 3 | |
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| 0x94-0x97 | 0x80010000 | Config Data 3 | |
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-------------------------------------------------------- |
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| 0x98-0x9b | 0xFF72e40e | Config Addr 4 | |
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| 0x9c-0x9f | 0x00000040 | Config Data 4 | |
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-------------------------------------------------------- |
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| 0xa0-0xa3 | 0x40000001 | Config Addr 5 | |
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| 0xa4-0xa7 | 0x00000100 | Config Data 5 | |
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-------------------------------------------------------- |
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| 0xa8-0xab | 0x80000001 | Config Addr 6 | |
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| 0xac-0xaf | 0x80000001 | Config Data 6 | |
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-------------------------------------------------------- |
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| ...... | |
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-------------------------------------------------------- |
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| 0x???????? | u-boot.bin | |
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-------------------------------------------------------- |
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|
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then insert the SDCard to the active slot to boot up. |
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|
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For boot from eSPI: |
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1. Build image |
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make MPC8536DS_SPIFLASH_config |
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make CROSS_COMPILE=powerpc-none-linux-gnuspe- all |
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2. Change dip-switch |
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SW2[5-8] = 0110 |
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3. Put image to SPI flash |
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Put the info in the above table onto the SPI flash, then |
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boot up. |
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File diff suppressed because it is too large
Load Diff
@ -0,0 +1,127 @@ |
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#
|
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# (C) Copyright 2007
|
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# Stefan Roese, DENX Software Engineering, sr@denx.de.
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#
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# Copyright 2009 Freescale Semiconductor, Inc.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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NAND_SPL := y
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TEXT_BASE := 0xfff00000
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PAD_TO := 0xfff01000
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include $(TOPDIR)/config.mk |
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LDSCRIPT= $(TOPDIR)/cpu/$(CPU)/u-boot-nand_spl.lds
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LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
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AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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__OBJS := $(SOBJS) $(COBJS)
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LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
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nandobj := $(OBJTREE)/nand_spl/
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ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
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all: $(obj).depend $(ALL) |
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$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl |
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$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
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$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl |
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$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
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$(nandobj)u-boot-spl: $(OBJS) |
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cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
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-Map $(nandobj)u-boot-spl.map \
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-o $(nandobj)u-boot-spl
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# create symbolic links for common files
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$(obj)cache.c: |
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@rm -f $(obj)cache.c
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ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
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$(obj)cpu_init_early.c: |
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c: |
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)fsl_law.c: |
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@rm -f $(obj)fsl_law.c
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ln -sf $(SRCTREE)/drivers/misc/fsl_law.c $(obj)fsl_law.c
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$(obj)law.c: |
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@rm -f $(obj)law.c
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ln -sf $(SRCTREE)/board/$(BOARDDIR)/law.c $(obj)law.c
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$(obj)nand_boot_fsl_elbc.c: |
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@rm -f $(obj)nand_boot_fsl_elbc.c
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ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
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$(obj)nand_boot_fsl_elbc.c
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$(obj)ns16550.c: |
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@rm -f $(obj)ns16550.c
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ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
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$(obj)resetvec.S: |
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@rm -f $(obj)resetvec.S
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ln -s $(SRCTREE)/cpu/$(CPU)/resetvec.S $(obj)resetvec.S
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$(obj)fixed_ivor.S: |
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@rm -f $(obj)fixed_ivor.S
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ln -sf $(SRCTREE)/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
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$(obj)start.S: $(obj)fixed_ivor.S |
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@rm -f $(obj)start.S
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ln -sf $(SRCTREE)/cpu/mpc85xx/start.S $(obj)start.S
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$(obj)tlb.c: |
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@rm -f $(obj)tlb.c
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ln -sf $(SRCTREE)/cpu/mpc85xx/tlb.c $(obj)tlb.c
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$(obj)tlb_table.c: |
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@rm -f $(obj)tlb_table.c
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ln -sf $(SRCTREE)/board/$(BOARDDIR)/tlb.c $(obj)tlb_table.c
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#########################################################################
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$(obj)%.o: $(obj)%.S |
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$(CC) $(AFLAGS) -c -o $@ $<
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$(obj)%.o: $(obj)%.c |
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$(CC) $(CFLAGS) -c -o $@ $<
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,83 @@ |
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/*
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* Copyright 2009 Freescale Semiconductor, Inc. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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* |
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*/ |
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#include <common.h> |
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#include <ns16550.h> |
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#include <asm/io.h> |
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#include <nand.h> |
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u32 sysclk_tbl[] = { |
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33333000, 39999600, 49999500, 66666000, |
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83332500, 99999000, 133332000, 166665000 |
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}; |
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void board_init_f(ulong bootflag) |
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{ |
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int px_spd; |
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u32 plat_ratio, bus_clk, sys_clk; |
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
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ccsr_lbc_t *lbc = (void *)CONFIG_SYS_MPC85xx_LBC_ADDR; |
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#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) |
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/* for FPGA */ |
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out_be32(&lbc->br3, CONFIG_SYS_BR3_PRELIM); |
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out_be32(&lbc->or3, CONFIG_SYS_OR3_PRELIM); |
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#else |
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#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined |
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#endif |
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/* initialize selected port with appropriate baud rate */ |
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px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); |
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sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK]; |
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plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
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bus_clk = sys_clk * plat_ratio / 2; |
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NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
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bus_clk / 16 / CONFIG_BAUDRATE); |
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puts("\nNAND boot... "); |
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/* copy code to RAM and jump to it - this should not return */ |
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/* NOTE - code has to be copied out of NAND buffer before
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* other blocks can be read. |
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*/ |
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relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, |
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CONFIG_SYS_NAND_U_BOOT_RELOC); |
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} |
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void board_init_r(gd_t *gd, ulong dest_addr) |
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{ |
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nand_boot(); |
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} |
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|
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void putc(char c) |
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{ |
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if (c == '\n') |
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); |
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); |
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} |
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|
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void puts(const char *str) |
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{ |
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while (*str) |
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putc(*str++); |
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} |
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