Tom Rini
7 years ago
commit
1fdafb2e3d
@ -0,0 +1,115 @@ |
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/* |
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* Copyright 2013 CompuLab Ltd. |
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* |
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* Author: Valentin Raevsky <valentin@compulab.co.il> |
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* |
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* The code contained herein is licensed under the GNU General Public |
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* License. You may obtain a copy of the GNU General Public License |
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* Version 2 or later at the following locations: |
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* |
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* http://www.opensource.org/licenses/gpl-license.html |
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* http://www.gnu.org/copyleft/gpl.html |
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*/ |
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|
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/dts-v1/; |
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#include "imx6q.dtsi" |
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|
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/ { |
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model = "CompuLab CM-FX6"; |
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compatible = "compulab,cm-fx6", "fsl,imx6q"; |
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|
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memory { |
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reg = <0x10000000 0x80000000>; |
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}; |
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|
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leds { |
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compatible = "gpio-leds"; |
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|
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heartbeat-led { |
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label = "Heartbeat"; |
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gpios = <&gpio2 31 0>; |
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linux,default-trigger = "heartbeat"; |
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}; |
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}; |
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}; |
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|
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&fec { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_enet>; |
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phy-mode = "rgmii"; |
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status = "okay"; |
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}; |
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|
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&gpmi { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_gpmi_nand>; |
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status = "okay"; |
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}; |
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|
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&iomuxc { |
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imx6q-cm-fx6 { |
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pinctrl_enet: enetgrp { |
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fsl,pins = < |
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 |
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 |
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 |
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 |
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 |
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
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>; |
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}; |
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|
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pinctrl_gpmi_nand: gpminandgrp { |
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fsl,pins = < |
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MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 |
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MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 |
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MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 |
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MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 |
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MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 |
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MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 |
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MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 |
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MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 |
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MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 |
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MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 |
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MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 |
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MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 |
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MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 |
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MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 |
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MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 |
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MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 |
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MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 |
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>; |
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}; |
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|
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pinctrl_uart4: uart4grp { |
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fsl,pins = < |
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MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 |
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MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 |
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>; |
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}; |
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}; |
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}; |
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|
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&uart4 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart4>; |
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status = "okay"; |
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}; |
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|
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&sata { |
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status = "okay"; |
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}; |
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|
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&usdhc3 { |
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status = "okay"; |
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}; |
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@ -0,0 +1,104 @@ |
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/*
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* Handling of common block commands |
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* |
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* Copyright (c) 2017 Google, Inc |
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* |
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* (C) Copyright 2000-2011 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#include <common.h> |
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#include <blk.h> |
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#ifdef HAVE_BLOCK_DEVICE |
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int blk_common_cmd(int argc, char * const argv[], enum if_type if_type, |
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int *cur_devnump) |
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{ |
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const char *if_name = blk_get_if_type_name(if_type); |
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switch (argc) { |
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case 0: |
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case 1: |
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return CMD_RET_USAGE; |
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case 2: |
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if (strncmp(argv[1], "inf", 3) == 0) { |
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blk_list_devices(if_type); |
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return 0; |
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} else if (strncmp(argv[1], "dev", 3) == 0) { |
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if (blk_print_device_num(if_type, *cur_devnump)) { |
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printf("\nno %s devices available\n", if_name); |
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return CMD_RET_FAILURE; |
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} |
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return 0; |
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} else if (strncmp(argv[1], "part", 4) == 0) { |
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if (blk_list_part(if_type)) |
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printf("\nno %s devices available\n", if_name); |
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return 0; |
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} |
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return CMD_RET_USAGE; |
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case 3: |
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if (strncmp(argv[1], "dev", 3) == 0) { |
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int dev = (int)simple_strtoul(argv[2], NULL, 10); |
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if (!blk_show_device(if_type, dev)) { |
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*cur_devnump = dev; |
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printf("... is now current device\n"); |
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} else { |
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return CMD_RET_FAILURE; |
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} |
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return 0; |
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} else if (strncmp(argv[1], "part", 4) == 0) { |
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int dev = (int)simple_strtoul(argv[2], NULL, 10); |
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if (blk_print_part_devnum(if_type, dev)) { |
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printf("\n%s device %d not available\n", |
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if_name, dev); |
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return CMD_RET_FAILURE; |
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} |
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return 0; |
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} |
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return CMD_RET_USAGE; |
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default: /* at least 4 args */ |
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if (strcmp(argv[1], "read") == 0) { |
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ulong addr = simple_strtoul(argv[2], NULL, 16); |
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lbaint_t blk = simple_strtoul(argv[3], NULL, 16); |
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ulong cnt = simple_strtoul(argv[4], NULL, 16); |
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ulong n; |
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printf("\n%s read: device %d block # %lld, count %ld ... ", |
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if_name, *cur_devnump, (unsigned long long)blk, |
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cnt); |
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n = blk_read_devnum(if_type, *cur_devnump, blk, cnt, |
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(ulong *)addr); |
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printf("%ld blocks read: %s\n", n, |
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n == cnt ? "OK" : "ERROR"); |
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return n == cnt ? 0 : 1; |
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} else if (strcmp(argv[1], "write") == 0) { |
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ulong addr = simple_strtoul(argv[2], NULL, 16); |
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lbaint_t blk = simple_strtoul(argv[3], NULL, 16); |
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ulong cnt = simple_strtoul(argv[4], NULL, 16); |
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ulong n; |
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printf("\n%s write: device %d block # %lld, count %ld ... ", |
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if_name, *cur_devnump, (unsigned long long)blk, |
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cnt); |
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n = blk_write_devnum(if_type, *cur_devnump, blk, cnt, |
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(ulong *)addr); |
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printf("%ld blocks written: %s\n", n, |
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n == cnt ? "OK" : "ERROR"); |
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return n == cnt ? 0 : 1; |
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} else { |
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return CMD_RET_USAGE; |
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} |
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return 0; |
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} |
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} |
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#endif |
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File diff suppressed because it is too large
Load Diff
@ -0,0 +1,16 @@ |
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/*
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* Copyright 2017 Google, Inc |
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* Written by Simon Glass <sjg@chromium.org> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#ifndef __DWC_AHSATA_H__ |
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#define __DWC_AHSATA_H__ |
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int dwc_ahsata_bus_reset(struct udevice *dev); |
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int dwc_ahsata_probe(struct udevice *dev); |
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int dwc_ahsata_scan(struct udevice *dev); |
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int dwc_ahsata_port_status(struct udevice *dev, int port); |
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#endif |
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