@ -204,6 +204,18 @@ _start_440:
mfspr r1 ,m c s r
mtspr m c s r ,r1
# endif
/*----------------------------------------------------------------*/
/* CCR0 init */
/*----------------------------------------------------------------*/
/ * Disable s t o r e g a t h e r i n g & b r o a d c a s t , g u a r a n t e e i n s t / d a t a
* cache b l o c k t o u c h , f o r c e l o a d / s t o r e a l i g n m e n t
* ( see e r r a t a 1 . 1 2 : 4 4 0 _ 3 3 )
* /
lis r1 ,0 x00 3 0 / * s t o r e g a t h e r i n g & b r o a d c a s t d i s a b l e * /
ori r1 ,r1 ,0 x60 0 0 / * c a c h e t o u c h * /
mtspr c c r0 ,r1
/*----------------------------------------------------------------*/
/* Initialize debug */
/*----------------------------------------------------------------*/
@ -225,17 +237,6 @@ _start_440:
mtspr d b s r ,r1 / * C l e a r a l l v a l i d b i t s * /
skip_debug_init :
/*----------------------------------------------------------------*/
/* CCR0 init */
/*----------------------------------------------------------------*/
/ * Disable s t o r e g a t h e r i n g & b r o a d c a s t , g u a r a n t e e i n s t / d a t a
* cache b l o c k t o u c h , f o r c e l o a d / s t o r e a l i g n m e n t
* ( see e r r a t a 1 . 1 2 : 4 4 0 _ 3 3 )
* /
lis r1 ,0 x00 3 0 / * s t o r e g a t h e r i n g & b r o a d c a s t d i s a b l e * /
ori r1 ,r1 ,0 x60 0 0 / * c a c h e t o u c h * /
mtspr c c r0 ,r1
# if d e f i n e d ( C O N F I G _ 4 4 0 S P E )
/ * - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +
| Initialize C o r e C o n f i g u r a t i o n R e g 1 .