As both cores are similar merge the cache handling code for both CPUs to arm11 directory. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> [trini: Add hunk to arch/arm/cpu/arm1136/Makefile] Signed-off-by: Tom Rini <trini@konsulko.com>master
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y = cpu.o
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/*
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* (C) Copyright 2004 Texas Insturments |
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* |
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* (C) Copyright 2002 |
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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/*
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* CPU specific code |
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*/ |
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#include <common.h> |
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#include <command.h> |
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#include <asm/system.h> |
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static void cache_flush (void); |
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int cleanup_before_linux (void) |
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{ |
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/*
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* this function is called just before we call linux |
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* it prepares the processor for linux |
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* |
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* we turn off caches etc ... |
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*/ |
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disable_interrupts (); |
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/* turn off I/D-cache */ |
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icache_disable(); |
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dcache_disable(); |
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/* flush I/D-cache */ |
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cache_flush(); |
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return 0; |
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} |
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/* flush I/D-cache */ |
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static void cache_flush (void) |
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{ |
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/* invalidate both caches and flush btb */ |
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asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0)); |
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/* mem barrier to sync things */ |
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asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0)); |
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} |
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