Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA

All Socfpga boards from ./include/configs/socfpga_* define CONFIG_HW_WATCHDOG. To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in config ARCH_SOCFPGA (arch/arm/Kconfig) section. Signed-off-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
6 years ago · 21a9f435f3
parent a6fbf94550
commit 21a9f435f3
13 changed files with 1 additions and 24 deletions
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@ -701,6 +701,7 @@ config ARCH_SOCFPGA
 	select DM_SPI_FLASH
 	select DM_SPI
 	select ENABLE_ARM_SOC_BOOT0_HOOK
+	select HW_WATCHDOG
 	select ARCH_EARLY_INIT_R
 	select ARCH_MISC_INIT
 	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
--- a/include/configs/socfpga_arria10_socdk.h
+++ b/include/configs/socfpga_arria10_socdk.h
@ -9,8 +9,6 @@

 #include <asm/arch/base_addr_a10.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Booting Linux */
 #define CONFIG_LOADADDR		0x01000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCDK */

--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCDK */

--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */

--- a/include/configs/socfpga_de10_nano.h
+++ b/include/configs/socfpga_de10_nano.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */

--- a/include/configs/socfpga_de1_soc.h
+++ b/include/configs/socfpga_de1_soc.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB */

--- a/include/configs/socfpga_is1.h
+++ b/include/configs/socfpga_is1.h
@ -9,8 +9,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x10000000

--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on MCV */

--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCDK */

--- a/include/configs/socfpga_socrates.h
+++ b/include/configs/socfpga_socrates.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCrates */

--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SR1500 */

--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@ -8,8 +8,6 @@

 #include <asm/arch/base_addr_ac5.h>

-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on VINING_FPGA */