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@ -18,6 +18,7 @@ |
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#include <asm/arch/sys_proto.h> |
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#include <asm/gpio.h> |
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#include <asm/arch/rmobile.h> |
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#include <miiphy.h> |
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#include "qos.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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@ -207,6 +208,10 @@ void s_init(void) |
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#define SMSTPCR7 0xE615014C |
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#define SCIF0_MSTP721 (1 << 21) |
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#define MSTPSR8 0xE61509A0 |
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#define SMSTPCR8 0xE6150990 |
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#define ETHER_MSTP813 (1 << 13) |
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#define PMMR 0xE6060000 |
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#define GPSR4 0xE6060014 |
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#define IPSR14 0xE6060058 |
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@ -242,6 +247,9 @@ int board_early_init_f(void) |
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mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); |
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/* ETHER */ |
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mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813); |
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return 0; |
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} |
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@ -256,6 +264,68 @@ int board_init(void) |
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/* Init PFC controller */ |
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r8a7790_pinmux_init(); |
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/* ETHER Enable */ |
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gpio_request(GPIO_FN_ETH_CRS_DV, NULL); |
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gpio_request(GPIO_FN_ETH_RX_ER, NULL); |
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gpio_request(GPIO_FN_ETH_RXD0, NULL); |
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gpio_request(GPIO_FN_ETH_RXD1, NULL); |
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gpio_request(GPIO_FN_ETH_LINK, NULL); |
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gpio_request(GPIO_FN_ETH_REF_CLK, NULL); |
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gpio_request(GPIO_FN_ETH_MDIO, NULL); |
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gpio_request(GPIO_FN_ETH_TXD1, NULL); |
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gpio_request(GPIO_FN_ETH_TX_EN, NULL); |
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gpio_request(GPIO_FN_ETH_MAGIC, NULL); |
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gpio_request(GPIO_FN_ETH_TXD0, NULL); |
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gpio_request(GPIO_FN_ETH_MDC, NULL); |
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gpio_request(GPIO_FN_IRQ0, NULL); |
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gpio_request(GPIO_GP_5_31, NULL); /* PHY_RST */ |
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gpio_direction_output(GPIO_GP_5_31, 0); |
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mdelay(20); |
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gpio_set_value(GPIO_GP_5_31, 1); |
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udelay(1); |
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return 0; |
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} |
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#define CXR24 0xEE7003C0 /* MAC address high register */ |
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#define CXR25 0xEE7003C8 /* MAC address low register */ |
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int board_eth_init(bd_t *bis) |
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{ |
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int ret = -ENODEV; |
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#ifdef CONFIG_SH_ETHER |
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u32 val; |
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unsigned char enetaddr[6]; |
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ret = sh_eth_initialize(bis); |
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if (!eth_getenv_enetaddr("ethaddr", enetaddr)) |
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return ret; |
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/* Set Mac address */ |
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val = enetaddr[0] << 24 | enetaddr[1] << 16 | |
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enetaddr[2] << 8 | enetaddr[3]; |
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writel(val, CXR24); |
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val = enetaddr[4] << 8 | enetaddr[5]; |
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writel(val, CXR25); |
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#endif |
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return ret; |
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} |
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/* lager has KSZ8041NL/RNL */ |
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#define PHY_CONTROL1 0x1E |
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#define PHY_LED_MODE 0xC0000 |
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#define PHY_LED_MODE_ACK 0x4000 |
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int board_phy_config(struct phy_device *phydev) |
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{ |
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int ret = phy_read(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1); |
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ret &= ~PHY_LED_MODE; |
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ret |= PHY_LED_MODE_ACK; |
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ret = phy_write(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1, (u16)ret); |
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return 0; |
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} |
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