The device tree source files of at91sam9x5ek board are copied from the Linux v4.10, do the changes below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property to determine which nodes are used by the board_init_f stage. - Change the compatible of the spi flash to "spi-flash". - Add the spi0 aliases. - Fix the compilation warnings. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>master
Wenyou Yang
7 years ago
committed by
Simon Glass
parent
f8b7fff1d5
commit
25e88d406e
@ -0,0 +1,29 @@ |
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/* |
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* at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC |
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* |
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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|
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#include "at91sam9x5.dtsi" |
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#include "at91sam9x5_lcd.dtsi" |
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|
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/ { |
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model = "Atmel AT91SAM9G15 SoC"; |
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compatible = "atmel,at91sam9g15", "atmel,at91sam9x5"; |
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|
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ahb { |
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apb { |
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pinctrl@fffff400 { |
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atmel,mux-mask = < |
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/* A B C */ |
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0xffffffff 0xffe0399f 0x00000000 /* pioA */ |
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0x00040000 0x00047e3f 0x00000000 /* pioB */ |
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0xfdffffff 0x00000000 0xb83fffff /* pioC */ |
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0x003fffff 0x003f8000 0x00000000 /* pioD */ |
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>; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,26 @@ |
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/* |
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* at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board |
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* |
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* Copyright (C) 2012 Atmel, |
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "at91sam9g15.dtsi" |
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#include "at91sam9x5dm.dtsi" |
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#include "at91sam9x5ek.dtsi" |
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|
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/ { |
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model = "Atmel AT91SAM9G15-EK"; |
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compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; |
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|
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ahb { |
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apb { |
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hlcdc: hlcdc@f8038000 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,31 @@ |
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/* |
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* at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC |
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* |
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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|
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#include "at91sam9x5.dtsi" |
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#include "at91sam9x5_isi.dtsi" |
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#include "at91sam9x5_usart3.dtsi" |
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#include "at91sam9x5_macb0.dtsi" |
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|
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/ { |
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model = "Atmel AT91SAM9G25 SoC"; |
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compatible = "atmel,at91sam9g25", "atmel,at91sam9x5"; |
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|
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ahb { |
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apb { |
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pinctrl@fffff400 { |
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atmel,mux-mask = < |
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/* A B C */ |
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0xffffffff 0xffe0399f 0xc000001c /* pioA */ |
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0x0007ffff 0x8000fe3f 0x00000000 /* pioB */ |
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0x80000000 0x07c0ffff 0xb83fffff /* pioC */ |
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0x003fffff 0x003f8000 0x00000000 /* pioD */ |
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>; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,69 @@ |
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/* |
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* at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board |
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* |
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* Copyright (C) 2012 Atmel, |
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "at91sam9g25.dtsi" |
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#include "at91sam9x5ek.dtsi" |
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|
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/ { |
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model = "Atmel AT91SAM9G25-EK"; |
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compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; |
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|
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ahb { |
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apb { |
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spi0: spi@f0000000 { |
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status = "disabled"; |
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}; |
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|
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mmc1: mmc@f000c000 { |
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status = "disabled"; |
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}; |
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|
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i2c0: i2c@f8010000 { |
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ov2640: camera@0x30 { |
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compatible = "ovti,ov2640"; |
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reg = <0x30>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; |
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resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>; |
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pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>; |
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clocks = <&pck0>; |
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clock-names = "xvclk"; |
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assigned-clocks = <&pck0>; |
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assigned-clock-rates = <25000000>; |
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status = "okay"; |
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port { |
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ov2640_0: endpoint { |
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remote-endpoint = <&isi_0>; |
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bus-width = <8>; |
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}; |
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}; |
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}; |
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}; |
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macb0: ethernet@f802c000 { |
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phy-mode = "rmii"; |
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status = "okay"; |
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}; |
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isi: isi@f8048000 { |
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status = "okay"; |
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port { |
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isi_0: endpoint@0 { |
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reg = <0>; |
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remote-endpoint = <&ov2640_0>; |
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bus-width = <8>; |
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vsync-active = <1>; |
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hsync-active = <1>; |
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}; |
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}; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,30 @@ |
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/* |
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* at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC |
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* |
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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#include "at91sam9x5.dtsi" |
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#include "at91sam9x5_lcd.dtsi" |
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#include "at91sam9x5_macb0.dtsi" |
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/ { |
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model = "Atmel AT91SAM9G35 SoC"; |
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compatible = "atmel,at91sam9g35", "atmel,at91sam9x5"; |
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ahb { |
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apb { |
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pinctrl@fffff400 { |
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atmel,mux-mask = < |
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/* A B C */ |
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0xffffffff 0xffe0399f 0xc000000c /* pioA */ |
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0x000406ff 0x00047e3f 0x00000000 /* pioB */ |
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0xfdffffff 0x00000000 0xb83fffff /* pioC */ |
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0x003fffff 0x003f8000 0x00000000 /* pioD */ |
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>; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,31 @@ |
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/* |
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* at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board |
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* |
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* Copyright (C) 2012 Atmel, |
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "at91sam9g35.dtsi" |
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#include "at91sam9x5dm.dtsi" |
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#include "at91sam9x5ek.dtsi" |
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/ { |
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model = "Atmel AT91SAM9G35-EK"; |
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compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; |
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ahb { |
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apb { |
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macb0: ethernet@f802c000 { |
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phy-mode = "rmii"; |
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status = "okay"; |
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}; |
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hlcdc: hlcdc@f8038000 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,32 @@ |
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/* |
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* at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC |
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* |
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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#include "at91sam9x5.dtsi" |
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#include "at91sam9x5_usart3.dtsi" |
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#include "at91sam9x5_macb0.dtsi" |
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#include "at91sam9x5_macb1.dtsi" |
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#include "at91sam9x5_can.dtsi" |
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/ { |
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model = "Atmel AT91SAM9X25 SoC"; |
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compatible = "atmel,at91sam9x25", "atmel,at91sam9x5"; |
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ahb { |
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apb { |
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pinctrl@fffff400 { |
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atmel,mux-mask = < |
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/* A B C */ |
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0xffffffff 0xffe03fff 0xc000001c /* pioA */ |
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0x0007ffff 0x00047e3f 0x00000000 /* pioB */ |
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0x80000000 0xfffd0000 0xb83fffff /* pioC */ |
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0x003fffff 0x003f8000 0x00000000 /* pioD */ |
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>; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,30 @@ |
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/* |
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* at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board |
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* |
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* Copyright (C) 2012 Atmel, |
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "at91sam9x25.dtsi" |
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#include "at91sam9x5ek.dtsi" |
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/ { |
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model = "Atmel AT91SAM9X25-EK"; |
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compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; |
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ahb { |
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apb { |
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macb0: ethernet@f802c000 { |
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phy-mode = "rmii"; |
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status = "okay"; |
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}; |
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macb1: ethernet@f8030000 { |
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phy-mode = "rmii"; |
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status = "okay"; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,31 @@ |
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/* |
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* at91sam9x35.dtsi - Device Tree Include file for AT91SAM9X35 SoC |
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* |
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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#include "at91sam9x5.dtsi" |
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#include "at91sam9x5_lcd.dtsi" |
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#include "at91sam9x5_macb0.dtsi" |
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#include "at91sam9x5_can.dtsi" |
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|
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/ { |
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model = "Atmel AT91SAM9X35 SoC"; |
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compatible = "atmel,at91sam9x35", "atmel,at91sam9x5"; |
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|
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ahb { |
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apb { |
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pinctrl@fffff400 { |
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atmel,mux-mask = < |
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/* A B C */ |
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0xffffffff 0xffe03fff 0xc000000c /* pioA */ |
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0x000406ff 0x00047e3f 0x00000000 /* pioB */ |
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0xfdffffff 0x00000000 0xb83fffff /* pioC */ |
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0x003fffff 0x003f8000 0x00000000 /* pioD */ |
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>; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,30 @@ |
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/* |
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* at91sam9x35ek.dts - Device Tree file for AT91SAM9X35-EK board |
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* |
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* Copyright (C) 2012 Atmel, |
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
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* |
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* Licensed under GPLv2 or later. |
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*/ |
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/dts-v1/; |
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#include "at91sam9x35.dtsi" |
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#include "at91sam9x5dm.dtsi" |
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#include "at91sam9x5ek.dtsi" |
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/ { |
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model = "Atmel AT91SAM9X35-EK"; |
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compatible = "atmel,at91sam9x35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; |
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ahb { |
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apb { |
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macb0: ethernet@f802c000 { |
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phy-mode = "rmii"; |
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status = "okay"; |
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}; |
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hlcdc: hlcdc@f8038000 { |
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u-boot,dm-pre-reloc; |
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status = "okay"; |
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}; |
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}; |
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}; |
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}; |
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File diff suppressed because it is too large
Load Diff
@ -0,0 +1,71 @@ |
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/* |
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* at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 |
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* Ethernet interface. |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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#include <dt-bindings/pinctrl/at91.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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/ { |
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ahb { |
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apb { |
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pmc: pmc@fffffc00 { |
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periphck { |
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can0_clk: can0_clk@29 { |
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#clock-cells = <0>; |
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reg = <29>; |
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}; |
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can1_clk: can1_clk@30 { |
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#clock-cells = <0>; |
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reg = <30>; |
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}; |
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}; |
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}; |
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can0: can@f8000000 { |
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compatible = "atmel,at91sam9x5-can"; |
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reg = <0xf8000000 0x300>; |
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interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_can0_rx_tx>; |
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clocks = <&can0_clk>; |
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clock-names = "can_clk"; |
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status = "disabled"; |
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}; |
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can1: can@f8004000 { |
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compatible = "atmel,at91sam9x5-can"; |
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reg = <0xf8004000 0x300>; |
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interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_can1_rx_tx>; |
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clocks = <&can1_clk>; |
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clock-names = "can_clk"; |
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status = "disabled"; |
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}; |
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pinctrl@fffff400 { |
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can0 { |
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pinctrl_can0_rx_tx: can0_rx_tx { |
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atmel,pins = |
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<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */ |
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AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */ |
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}; |
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}; |
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can1 { |
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pinctrl_can1_rx_tx: can1_rx_tx { |
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atmel,pins = |
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<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */ |
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AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */ |
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}; |
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}; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,72 @@ |
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/* |
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* at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an |
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* Image Sensor Interface. |
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* |
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
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* |
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* Licensed under GPLv2. |
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*/ |
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|
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#include <dt-bindings/pinctrl/at91.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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/ { |
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ahb { |
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apb { |
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pinctrl@fffff400 { |
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isi { |
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pinctrl_isi_data_0_7: isi-0-data-0-7 { |
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atmel,pins = |
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<AT91_PIOC 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D0, conflicts with LCDDAT0 */ |
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AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D1, conflicts with LCDDAT1 */ |
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AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D2, conflicts with LCDDAT2 */ |
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AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D3, conflicts with LCDDAT3 */ |
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AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D4, conflicts with LCDDAT4 */ |
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AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D5, conflicts with LCDDAT5 */ |
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AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D6, conflicts with LCDDAT6 */ |
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AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D7, conflicts with LCDDAT7 */ |
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AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_PCK, conflicts with LCDDAT12 */ |
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AT91_PIOC 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_HSYNC, conflicts with LCDDAT14 */ |
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AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_VSYNC, conflicts with LCDDAT13 */ |
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}; |
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|
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pinctrl_isi_data_8_9: isi-0-data-8-9 { |
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atmel,pins = |
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<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D8, conflicts with LCDDAT8 */ |
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AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with LCDDAT9 */ |
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}; |
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|
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pinctrl_isi_data_10_11: isi-0-data-10-11 { |
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atmel,pins = |
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<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* ISI_D10, conflicts with LCDDAT10 */ |
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AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with LCDDAT11 */ |
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}; |
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}; |
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}; |
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|
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pmc: pmc@fffffc00 { |
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periphck { |
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isi_clk: isi_clk@25 { |
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#clock-cells = <0>; |
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reg = <25>; |
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}; |
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}; |
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}; |
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|
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isi: isi@f8048000 { |
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compatible = "atmel,at91sam9g45-isi"; |
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reg = <0xf8048000 0x4000>; |
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interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_isi_data_0_7>; |
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clocks = <&isi_clk>; |
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clock-names = "isi_clk"; |
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status = "disabled"; |
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port { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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}; |
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}; |
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}; |
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}; |
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@ -0,0 +1,146 @@ |
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/* |
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* at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an |
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* LCD controller. |
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* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
hlcdc: hlcdc@f8038000 { |
||||
compatible = "atmel,at91sam9x5-hlcdc"; |
||||
reg = <0xf8038000 0x4000>; |
||||
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; |
||||
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; |
||||
clock-names = "periph_clk","sys_clk", "slow_clk"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
pinctrl@fffff400 { |
||||
lcd { |
||||
pinctrl_lcd_base: lcd-base-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ |
||||
AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ |
||||
AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */ |
||||
AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ |
||||
AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */ |
||||
}; |
||||
|
||||
pinctrl_lcd_pwm: lcd-pwm-0 { |
||||
atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb444: lcd-rgb-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb565: lcd-rgb-1 { |
||||
atmel,pins = |
||||
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb666: lcd-rgb-2 { |
||||
atmel,pins = |
||||
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ |
||||
AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ |
||||
AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD17 pin */ |
||||
}; |
||||
|
||||
pinctrl_lcd_rgb888: lcd-rgb-3 { |
||||
atmel,pins = |
||||
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ |
||||
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ |
||||
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ |
||||
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ |
||||
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ |
||||
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ |
||||
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ |
||||
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ |
||||
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ |
||||
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ |
||||
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ |
||||
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ |
||||
AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ |
||||
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ |
||||
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ |
||||
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ |
||||
AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ |
||||
AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ |
||||
AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ |
||||
AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ |
||||
AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ |
||||
AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ |
||||
AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ |
||||
AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
lcdc_clk: lcdc_clk@25 { |
||||
#clock-cells = <0>; |
||||
reg = <25>; |
||||
}; |
||||
}; |
||||
|
||||
systemck { |
||||
lcdck: lcdck@3 { |
||||
#clock-cells = <0>; |
||||
reg = <3>; |
||||
clocks = <&mck>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,67 @@ |
||||
/* |
||||
* at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 |
||||
* Ethernet interface. |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
pinctrl@fffff400 { |
||||
macb0 { |
||||
pinctrl_macb0_rmii: macb0_rmii-0 { |
||||
atmel,pins = |
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ |
||||
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ |
||||
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ |
||||
AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ |
||||
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ |
||||
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ |
||||
AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ |
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ |
||||
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ |
||||
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ |
||||
}; |
||||
|
||||
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { |
||||
atmel,pins = |
||||
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */ |
||||
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */ |
||||
AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ |
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ |
||||
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ |
||||
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ |
||||
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ |
||||
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
macb0_clk: macb0_clk@24 { |
||||
#clock-cells = <0>; |
||||
reg = <24>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
macb0: ethernet@f802c000 { |
||||
compatible = "cdns,at91sam9260-macb", "cdns,macb"; |
||||
reg = <0xf802c000 0x100>; |
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_macb0_rmii>; |
||||
clocks = <&macb0_clk>, <&macb0_clk>; |
||||
clock-names = "hclk", "pclk"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,55 @@ |
||||
/* |
||||
* at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2 |
||||
* Ethernet interfaces. |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
pinctrl@fffff400 { |
||||
macb1 { |
||||
pinctrl_macb1_rmii: macb1_rmii-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */ |
||||
AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */ |
||||
AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */ |
||||
AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ |
||||
AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ |
||||
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ |
||||
AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */ |
||||
AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */ |
||||
AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */ |
||||
AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
macb1_clk: macb1_clk@27 { |
||||
#clock-cells = <0>; |
||||
reg = <27>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
macb1: ethernet@f8030000 { |
||||
compatible = "cdns,at91sam9260-macb", "cdns,macb"; |
||||
reg = <0xf8030000 0x100>; |
||||
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_macb1_rmii>; |
||||
clocks = <&macb1_clk>, <&macb1_clk>; |
||||
clock-names = "hclk", "pclk"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,69 @@ |
||||
/* |
||||
* at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with |
||||
* 4 USART. |
||||
* |
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
||||
* |
||||
* Licensed under GPLv2. |
||||
*/ |
||||
|
||||
#include <dt-bindings/pinctrl/at91.h> |
||||
#include <dt-bindings/interrupt-controller/irq.h> |
||||
|
||||
/ { |
||||
aliases { |
||||
serial4 = &usart3; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
pinctrl@fffff400 { |
||||
usart3 { |
||||
pinctrl_usart3: usart3-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */ |
||||
AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */ |
||||
}; |
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ |
||||
}; |
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ |
||||
}; |
||||
|
||||
pinctrl_usart3_sck: usart3_sck-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
pmc: pmc@fffffc00 { |
||||
periphck { |
||||
usart3_clk: usart3_clk@8 { |
||||
#clock-cells = <0>; |
||||
reg = <8>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
usart3: serial@f8028000 { |
||||
compatible = "atmel,at91sam9260-usart"; |
||||
reg = <0xf8028000 0x200>; |
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_usart3>; |
||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, |
||||
<&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; |
||||
dma-names = "tx", "rx"; |
||||
clocks = <&usart3_clk>; |
||||
clock-names = "usart"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,100 @@ |
||||
/* |
||||
* at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module |
||||
* |
||||
* Copyright (C) 2012 Atmel, |
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
|
||||
/ { |
||||
memory { |
||||
reg = <0x20000000 0x8000000>; |
||||
}; |
||||
|
||||
clocks { |
||||
slow_xtal { |
||||
clock-frequency = <32768>; |
||||
}; |
||||
|
||||
main_xtal { |
||||
clock-frequency = <12000000>; |
||||
}; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
pinctrl@fffff400 { |
||||
1wire_cm { |
||||
pinctrl_1wire_cm: 1wire_cm-0 { |
||||
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
rtc@fffffeb0 { |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
|
||||
nand0: nand@40000000 { |
||||
nand-bus-width = <8>; |
||||
nand-ecc-mode = "hw"; |
||||
atmel,has-pmecc; /* Enable PMECC */ |
||||
atmel,pmecc-cap = <2>; |
||||
atmel,pmecc-sector-size = <512>; |
||||
nand-on-flash-bbt; |
||||
status = "okay"; |
||||
|
||||
at91bootstrap@0 { |
||||
label = "at91bootstrap"; |
||||
reg = <0x0 0x40000>; |
||||
}; |
||||
|
||||
uboot@40000 { |
||||
label = "u-boot"; |
||||
reg = <0x40000 0x80000>; |
||||
}; |
||||
|
||||
ubootenv@c0000 { |
||||
label = "U-Boot Env"; |
||||
reg = <0xc0000 0x140000>; |
||||
}; |
||||
|
||||
kernel@200000 { |
||||
label = "kernel"; |
||||
reg = <0x200000 0x600000>; |
||||
}; |
||||
|
||||
rootfs@800000 { |
||||
label = "rootfs"; |
||||
reg = <0x800000 0x1f800000>; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
leds { |
||||
compatible = "gpio-leds"; |
||||
|
||||
pb18 { |
||||
label = "pb18"; |
||||
gpios = <&pioB 18 GPIO_ACTIVE_LOW>; |
||||
linux,default-trigger = "heartbeat"; |
||||
}; |
||||
|
||||
pd21 { |
||||
label = "pd21"; |
||||
gpios = <&pioD 21 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
}; |
||||
|
||||
1wire_cm { |
||||
compatible = "w1-gpio"; |
||||
gpios = <&pioB 18 GPIO_ACTIVE_HIGH>; |
||||
linux,open-drain; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_1wire_cm>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
}; |
||||
@ -0,0 +1,66 @@ |
||||
/* |
||||
* at91sam9x5dm.dtsi - Device Tree file for SAM9x5 display module |
||||
* |
||||
* Copyright (C) 2014 Atmel, |
||||
* 2014 Free Electrons |
||||
* |
||||
* Author: Boris Brezillon <boris.brezillon@free-electrons.com> |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
|
||||
/ { |
||||
ahb { |
||||
apb { |
||||
i2c0: i2c@f8010000 { |
||||
qt1070: keyboard@1b { |
||||
compatible = "qt1070"; |
||||
reg = <0x1b>; |
||||
interrupt-parent = <&pioA>; |
||||
interrupts = <7 0x0>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_qt1070_irq>; |
||||
wakeup-source; |
||||
}; |
||||
}; |
||||
|
||||
hlcdc: hlcdc@f8038000 { |
||||
atmel,vl-bpix = <4>; |
||||
atmel,guard-time = <1>; |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>; |
||||
|
||||
display-timings { |
||||
u-boot,dm-pre-reloc; |
||||
800x480 { |
||||
clock-frequency = <24000000>; |
||||
hactive = <800>; |
||||
vactive = <480>; |
||||
hsync-len = <128>; |
||||
hfront-porch = <64>; |
||||
hback-porch = <64>; |
||||
vfront-porch = <22>; |
||||
vback-porch = <21>; |
||||
vsync-len = <2>; |
||||
u-boot,dm-pre-reloc; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
adc0: adc@f804c000 { |
||||
atmel,adc-ts-wires = <4>; |
||||
atmel,adc-ts-pressure-threshold = <10000>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
pinctrl@fffff400 { |
||||
board { |
||||
pinctrl_qt1070_irq: qt1070_irq { |
||||
atmel,pins = |
||||
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,167 @@ |
||||
/* |
||||
* at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board |
||||
* |
||||
* Copyright (C) 2012 Atmel, |
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
||||
* |
||||
* Licensed under GPLv2 or later. |
||||
*/ |
||||
#include "at91sam9x5cm.dtsi" |
||||
|
||||
/ { |
||||
model = "Atmel AT91SAM9X5-EK"; |
||||
compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; |
||||
|
||||
chosen { |
||||
bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; |
||||
stdout-path = "serial0:115200n8"; |
||||
u-boot,dm-pre-reloc; |
||||
}; |
||||
|
||||
ahb { |
||||
apb { |
||||
mmc0: mmc@f0008000 { |
||||
pinctrl-0 = < |
||||
&pinctrl_board_mmc0 |
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0 |
||||
&pinctrl_mmc0_slot0_dat1_3>; |
||||
status = "okay"; |
||||
slot@0 { |
||||
reg = <0>; |
||||
bus-width = <4>; |
||||
cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
}; |
||||
|
||||
mmc1: mmc@f000c000 { |
||||
pinctrl-0 = < |
||||
&pinctrl_board_mmc1 |
||||
&pinctrl_mmc1_slot0_clk_cmd_dat0 |
||||
&pinctrl_mmc1_slot0_dat1_3>; |
||||
status = "okay"; |
||||
slot@0 { |
||||
reg = <0>; |
||||
bus-width = <4>; |
||||
cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>; |
||||
}; |
||||
}; |
||||
|
||||
dbgu: serial@fffff200 { |
||||
u-boot,dm-pre-reloc; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
usart0: serial@f801c000 { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
usb2: gadget@f803c000 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&pinctrl_board_usb2>; |
||||
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
i2c0: i2c@f8010000 { |
||||
status = "okay"; |
||||
|
||||
wm8731: wm8731@1a { |
||||
compatible = "wm8731"; |
||||
reg = <0x1a>; |
||||
}; |
||||
}; |
||||
|
||||
adc0: adc@f804c000 { |
||||
atmel,adc-ts-wires = <4>; |
||||
atmel,adc-ts-pressure-threshold = <10000>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
pinctrl@fffff400 { |
||||
camera_sensor { |
||||
pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 { |
||||
atmel,pins = |
||||
<AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_MCK */ |
||||
}; |
||||
|
||||
pinctrl_sensor_power: sensor_power-0 { |
||||
atmel,pins = |
||||
<AT91_PIOA 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; |
||||
}; |
||||
|
||||
pinctrl_sensor_reset: sensor_reset-0 { |
||||
atmel,pins = |
||||
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; |
||||
}; |
||||
}; |
||||
|
||||
mmc0 { |
||||
pinctrl_board_mmc0: mmc0-board { |
||||
atmel,pins = |
||||
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */ |
||||
}; |
||||
}; |
||||
|
||||
mmc1 { |
||||
pinctrl_board_mmc1: mmc1-board { |
||||
atmel,pins = |
||||
<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */ |
||||
}; |
||||
}; |
||||
|
||||
usb2 { |
||||
pinctrl_board_usb2: usb2-board { |
||||
atmel,pins = |
||||
<AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB16 gpio vbus sense, deglitch */ |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
spi0: spi@f0000000 { |
||||
status = "okay"; |
||||
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>; |
||||
spi_flash@0 { |
||||
compatible = "spi-flash"; |
||||
spi-max-frequency = <50000000>; |
||||
reg = <0>; |
||||
}; |
||||
}; |
||||
|
||||
watchdog@fffffe40 { |
||||
status = "okay"; |
||||
}; |
||||
|
||||
ssc0: ssc@f0010000 { |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
|
||||
usb0: ohci@00600000 { |
||||
status = "okay"; |
||||
num-ports = <3>; |
||||
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */ |
||||
&pioD 19 GPIO_ACTIVE_LOW |
||||
&pioD 20 GPIO_ACTIVE_LOW |
||||
>; |
||||
}; |
||||
|
||||
usb1: ehci@00700000 { |
||||
status = "okay"; |
||||
}; |
||||
}; |
||||
|
||||
sound { |
||||
compatible = "atmel,sam9x5-wm8731-audio"; |
||||
|
||||
atmel,model = "wm8731 @ AT91SAM9X5EK"; |
||||
|
||||
atmel,audio-routing = |
||||
"Headphone Jack", "RHPOUT", |
||||
"Headphone Jack", "LHPOUT", |
||||
"LLINEIN", "Line In Jack", |
||||
"RLINEIN", "Line In Jack"; |
||||
|
||||
atmel,ssc-controller = <&ssc0>; |
||||
atmel,audio-codec = <&wm8731>; |
||||
}; |
||||
}; |
||||
Loading…
Reference in new issue