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@ -1,5 +1,5 @@ |
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/*
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* (C) Copyright 2000-2007 |
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* (C) Copyright 2000-2008 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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@ -35,6 +35,8 @@ DECLARE_GLOBAL_DATA_PTR; |
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#define DEBUGF(fmt,args...) |
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#endif |
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
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#if defined(CONFIG_405GP) || defined(CONFIG_405CR) |
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void get_sys_info (PPC4xx_SYS_INFO * sysInfo) |
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@ -201,7 +203,126 @@ ulong get_PCI_freq (void) |
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#elif defined(CONFIG_440) |
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#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ |
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#if defined(CONFIG_460EX) || defined(CONFIG_460GT) |
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static u8 pll_fwdv_multi_bits[] = { |
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/* values for: 1 - 16 */ |
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0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c, |
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0x05, 0x08, 0x07, 0x02, 0x0b, 0x06 |
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}; |
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u32 get_cpr0_fwdv(unsigned long cpr_reg_fwdv) |
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{ |
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u32 index; |
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for (index = 0; index < ARRAY_SIZE(pll_fwdv_multi_bits); index++) |
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if (cpr_reg_fwdv == (u32)pll_fwdv_multi_bits[index]) |
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return index + 1; |
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return 0; |
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} |
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static u8 pll_fbdv_multi_bits[] = { |
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/* values for: 1 - 100 */ |
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0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4, |
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0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb, |
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0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96, |
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0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde, |
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0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb, |
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0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91, |
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0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b, |
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0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95, |
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0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4, |
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0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc, |
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/* values for: 101 - 200 */ |
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0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3, |
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0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90, |
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0x20, 0xc0, 0x01, 0x83, 0x77, 0xff, 0x1f, 0xbf, 0x7f, 0xfe, |
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0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6, |
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0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd, |
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0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1, |
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0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6, |
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0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9, |
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0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e, |
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0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf, |
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/* values for: 201 - 255 */ |
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0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae, |
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0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2, |
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0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2, |
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0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98, |
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0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81, |
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0x03, 0x87, 0x0f, 0x9f, 0x3f /* END */ |
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}; |
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u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv) |
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{ |
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u32 index; |
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for (index = 0; index < ARRAY_SIZE(pll_fbdv_multi_bits); index++) |
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if (cpr_reg_fbdv == (u32)pll_fbdv_multi_bits[index]) |
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return index + 1; |
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return 0; |
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} |
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/*
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* AMCC_TODO: verify this routine against latest EAS, cause stuff changed |
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* with latest EAS |
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*/ |
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void get_sys_info (sys_info_t * sysInfo) |
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{ |
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unsigned long strp0; |
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unsigned long strp1; |
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unsigned long temp; |
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unsigned long m; |
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unsigned long plbedv0; |
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/* Extract configured divisors */ |
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mfsdr(sdr_sdstp0, strp0); |
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mfsdr(sdr_sdstp1, strp1); |
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temp = ((strp0 & PLLSYS0_FWD_DIV_A_MASK) >> 4); |
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sysInfo->pllFwdDivA = get_cpr0_fwdv(temp); |
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temp = (strp0 & PLLSYS0_FWD_DIV_B_MASK); |
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sysInfo->pllFwdDivB = get_cpr0_fwdv(temp); |
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temp = (strp0 & PLLSYS0_FB_DIV_MASK) >> 8; |
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sysInfo->pllFbkDiv = get_cpr0_fbdv(temp); |
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temp = (strp1 & PLLSYS0_OPB_DIV_MASK) >> 26; |
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sysInfo->pllOpbDiv = temp ? temp : 4; |
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/* AMCC_TODO: verify the SDR0_SDSTP1.PERDV0 value sysInfo->pllExtBusDiv */ |
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temp = (strp1 & PLLSYS0_PERCLK_DIV_MASK) >> 24; |
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sysInfo->pllExtBusDiv = temp ? temp : 4; |
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temp = (strp1 & PLLSYS0_PLBEDV0_DIV_MASK) >> 29; |
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plbedv0 = temp ? temp: 8; |
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/* Calculate 'M' based on feedback source */ |
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temp = (strp0 & PLLSYS0_SEL_MASK) >> 27; |
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if (temp == 0) { |
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/* PLL internal feedback */ |
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m = sysInfo->pllFbkDiv; |
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} else { |
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/* PLL PerClk feedback */ |
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m = sysInfo->pllFwdDivA * plbedv0 * sysInfo->pllOpbDiv * |
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sysInfo->pllExtBusDiv; |
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} |
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/* Now calculate the individual clocks */ |
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sysInfo->freqVCOMhz = (m * CONFIG_SYS_CLK_FREQ) + (m >> 1); |
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sysInfo->freqProcessor = sysInfo->freqVCOMhz/sysInfo->pllFwdDivA; |
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sysInfo->freqPLB = sysInfo->freqVCOMhz / sysInfo->pllFwdDivA / plbedv0; |
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sysInfo->freqOPB = sysInfo->freqPLB / sysInfo->pllOpbDiv; |
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sysInfo->freqEBC = sysInfo->freqOPB / sysInfo->pllExtBusDiv; |
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sysInfo->freqDDR = sysInfo->freqPLB; |
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sysInfo->freqUART = sysInfo->freqPLB; |
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return; |
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} |
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#elif defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ |
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defined(CONFIG_440EPX) || defined(CONFIG_440GRX) |
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void get_sys_info (sys_info_t *sysInfo) |
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{ |
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